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Disable SDIO card clock when there are no commands/
data transfers on the SD bus.
Bug 958954
Bug 955742
Bug 952344
Change-Id: I7390be0406f7e46c0eb88ede2ae6f904b2181306
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/95390
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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There is a chance that we might read an TD request which
has just arrived after fence read in a interrupt handler.
Added fence read in unmap urb to avoid this issue.
Bug 964879
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/95916
(cherry picked from commit 8d8415820014710052eef088ed2d579d0531cd52)
Change-Id: Ia682654a25c685cf3dd2e76c8b9ea30427a06d89
Reviewed-on: http://git-master/r/97507
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Set minimum sclk,pclk and hclk rate same at 12Mhz for power optimization
bug 939415
Change-Id: I579eeca780357b02f65333ffea58301040943506
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/96922
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This reverts commit 037bc840859c0d52abedeb576888714698f04bcf.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: I89fa9aad8e56628ebb8932c694d37ab92daaab22
Reviewed-on: http://git-master/r/96796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 55f0f45a45263ba26bd473f50f867d29dd836e46.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: I036e0bd4e391a17dec8fa0fe86da7eb6b98d503a
Reviewed-on: http://git-master/r/96795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 46d9f14943770c24603ef7cdfd8eb2dbcd3c1248.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: Iee732d8137043240902201d7783d2c3fede98fbe
Reviewed-on: http://git-master/r/96794
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 5682179d980e1a70bcf37fd97a14e27a2ddde822.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: Ieb44d89a8361d1fa59b3d6375234f06f57c1c717
Reviewed-on: http://git-master/r/96793
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 16e0bb8c46656b1d902d422e0065c746af161a1c.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: Ifa115c4030c48cbd0b629cf02899ca8c6f25d314
Reviewed-on: http://git-master/r/96792
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 11a2e1bb69affe9e8273bc6d1452cd9282ddd27a.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: Ibace368a190a14d24e1cc963e8e2a7ed6fdbba6a
Reviewed-on: http://git-master/r/96791
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit a27cd62bb4934abe2af420ba7ca5115fbfb653be.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: I826224a4aea4bac78f9d2d1ce6797e8585fc148b
Reviewed-on: http://git-master/r/96790
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This restores commit 607d5ec8bb46f95473533f611da1ffc97907d16e.
The common ARM CPU state suspend/resume code does not work with
and external L2 cache controller (like a PL310) enabled. This
change fixes corruption of the current PMD by the MMU resume code.
cpu_resume_mmu modifies the currently active page tables to add
a flat (VA==PA) section mapping of cpu_resume_turn_mmu_on to
handle MMU off-to-on transition. It turns off the L1 data cache
but it knows nothing of the L2 cache. Since page table walks are
L2 cacheable, other CPUs in the system can pick up the corrupted
PMD which will eventually result in a kernel panic.
The workaround for this is to modify push_ctx_regs to save the
current TTB0 and CONTEXID registers in the CPU register context
and switch to the private tegra_pgd before saving the rest of the
CPU context. The tegra_pgd already has a flat mapping for the
code in question, so it can't be damaged by the actions of
cpu_resume_mmu. Likewise, pop_ctx_regs is modified to restore
the actual TTB0 and CONTEXTID registers when restoring the CPU
registers.
Bug 967887
Change-Id: Iaf98c46359860531874354e8cddabe299ea90d57
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96789
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit e6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f.
Bug 967887
Change-Id: I60927a93ebdf6ba4da14311f8ffcc1edf4f56391
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96788
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit f31ca2d9e0580b58dc51fde31fc8ace190dd253b.
Bug 967887
Change-Id: I3fe975f7a6939cace5e208947bcb82e09008c0ac
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96787
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 209209a303742d6312f66896b4351dd97e48e24c.
Bug 967887
Change-Id: I2464db28b5a4970d6e60ef79c89c2107c64cb6d3
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96786
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit 743c03fbeb5908faf4aef6bee7702a2ad4caac22.
Bug 967887
Change-Id: Ie4477e3b5fa9773c9e60b5cace47b3ff240a4bf1
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96785
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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bug 949219
Change-Id: I5942ba86bd1cbe1f1bd06a7c9f51a10d83e6cabb
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92819
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Remove T30 FPGA support as it will conflict with downstreaming mainline
way of using chipid and revision.
Change-Id: Ic1fd1107801de13c265c7dde8571e0537c43f4fd
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95872
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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bug 949219
Change-Id: I52969e8dd1a5ed4dc76ac360ec08b0afb18cd4a5
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92833
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 949219
Change-Id: I875f8688a272c415ebf345b8f30e4afdf7551b29
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/91523
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Enabling the 3v3 voltage rail during boot.
bug 822562
Change-Id: I15318b0c30bae716f40985cbee06cd9eaff54ee3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96685
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding support for protocol mangling I2C_M_NOSTART.
Change-Id: I6cc0c96b3c374d452ea886a0f983dc5d31c4575c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92573
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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vbus int can be generated from pmu and directly from port
when host mode is reqruied, we use vbus int and pmu int
is not required as usb clock is not disabled.
Bug 961166
Change-Id: I96fde7daf052a7c5b8e94414e309b0be6354ec80
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/96338
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Use SMB349 regulator instead of irq to controll USB1 VBUS
Bug 961166
Bug 966874
Change-Id: I68884444883277ef169f3eb066ea50d6d49b708d
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/96441
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Addition of reglator interface to detect the usb cable
plug/unplug detection.
Bug 961166
Bug 966874
Change-Id: Ida297bc39df9aca8cffe60c29bc24f2d32819f56
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/96440
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Disable Hard Reset on long press of power key.
Bug 893517
Change-Id: Ic328a04e917aa1bed6780e6f9a2f1c575f84fb68
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/96687
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Currently udc driver is dependent on otg driver.
Added irq work to make gadget driver work with
disabling otg driver.
Bug 962366
Change-Id: Id782d8003da12ace553b8b812fa410567c281b34
Reviewed-on: http://git-master/r/95106
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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AVDD_DSI_CSI is shared by modem and dsi. If DSI turns
off this rail then HSIC fails after wakeup from modem.
This patch provides a way to turn on this rail from
modem as well as from DSI. Create two virtual power rails
from avdd_csi_dsi to control it from both the drivers separately.
This is enterprise specific change as per the power rail layout.
Bug 920881
(cherry picked from commit ab52b51c59f776ae770d48a28a2744e2db2e5d2f)
Reviewed-on: http://git-master/r/85656
Change-Id: I2e9c04a8f4e8d6fd20584b4e75657c1cb6d5c8bd
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/89134
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added tegra_dma_get_channel_id API to determine the id
of a given channel.
Bug 969125
Change-Id: Ibad67d65c87dc267a4e6942557c02acbd0f6e938
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/96714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
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The VDD2 supply the power to three rails: 1.5V, LDO1 and LDO2.
LDO1 is used for PEX and LDO2 is used for SATA.
By default making the VDD2 off and enabling when
consumer requires.
Change-Id: I283f62277246214966e7635bc31b6eb066f9282b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96451
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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fix typo in pre-power wifi code
Bug 956238
Change-Id: Iee794da508d39131e3166bba71b1c46c60d19a3b
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/96821
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Change-Id: Ib1b0fc6015a9dd45982a97231972dadba6b5a92e
Reviewed-on: http://git-master/r/96966
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add support for setting & reading back OTG state with sysfs
bug 947300
Change-Id: I178c3eb6e2b227ca11fee8916e38c6677d3e4cb0
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/96660
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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The bias control must be done after the default register value
been restored.
Bug 964400
Change-Id: Iefbd96506573d5ea0e1b3123bb34c38e34e75068
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-on: http://git-master/r/96658
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Bug 939292
Change-Id: Ib0c849418c6c426518948785082fcceb180f3d64
Reviewed-on: http://git-master/r/96250
Tested-by: Liang Cheng (SW) <licheng@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Mark Peters <mpeters@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Apply shared bus ceiling regardless of whether Tegra3 SHARED_CEILING
user is enabled or disabled. Thus, we no longer need to enable ceiling
user - and the bus itself via child-parent relations - to cap the bus
rate.
Bug 954896
Change-Id: I7f96f03f05fd39334c9ee977cd1ac18d86a1fc0d
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 07b1a707aa14dcab37f095a3bb78af79a54c399b)
Reviewed-on: http://git-master/r/95739
Reviewed-by: Daniel Solomon <daniels@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Tune *timer_rate* used to increase cpu frequency.
bug 943712
Change-Id: I3ded757e21825c475606976c2dcfcd75d9467ef8
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/96525
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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usb driver needs to be suspended late and resumed early even
before irqs are disabled/enabled. Without this change the following
two issues are seen during lp0 and lp1 states.
In lp0, when there is a usb wakeup event (by unplugging the usb device)
we get the following error:
"tegra-ehci tegra-ehci.2:fatal error"
"tegra-ehci tegra-ehci.2: HC died; cleaning up"
The above error comes because an irq is generated even before the
usb_resume was called.
A similar issue is seen in lp1 as well.
Bug 954564
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: Id25fd2588ec034bd6aa54c17607e322f412adc5c
Reviewed-on: http://git-master/r/95778
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Modified touch setup and init calls to support DirectTouch
in E1198 19x12 system.
Change-Id: Ide208c4759af15200fb57530e7fbdc023d074c5c
Signed-off-by: Ali Ekici <aekici@nvidia.com>
Reviewed-on: http://git-master/r/91260
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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acm_disconnect() should not kill the anchored URB because
they are already killed by stop_data_traffic().
Submit read URBs before control urb is sent because there is a
possibility of response coming immediately after ctrl is sent.
Bug 957744
Bug 961808
(cherry picked from commit 05c10cbe01f0275e5fe121d763692261c51987fc)
Reviewed-on: http://git-master/r/93673
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Change-Id: I5597e239ec3722afb6b4c1cd5fbe228e30af2a2d
Reviewed-on: http://git-master/r/96585
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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before point reference check valid.
it prevents null point reference panic.
Bug 954883
Signed-off-by: Shawn Joo(Seongho) <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/88781
(cherry picked from commit aac87c7d9c7cf7563bb79a29d517a6ffdba5874f)
Change-Id: Ica17acb6cc2a1a7ed03f41d8b569fdb6e2098fc9
Reviewed-on: http://git-master/r/96464
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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add shutdown handler to turn off CP when power off
and disable irq for ap wake.
Bug 942968
Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/88188
(cherry picked from commit d37a1900afb9982115f18989b0114bad8f2602bd)
Change-Id: I1541453e21b46149bba08eafb0eadf9a598aa182
Reviewed-on: http://git-master/r/96455
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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modify CP power sequence timing based on modem vendor
spec information.
> 20 ms : REST low and ON low
> 400 us : RESET high and ON low
> 60 us : RESEET high and ON high
Bug 943280
Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/85964
(cherry picked from commit 8a6e64228f11d46f502c654bd9a1b508af93a67b)
Change-Id: I01f4fae493627d46707ebfcad676fc0a25b5258d
Reviewed-on: http://git-master/r/96453
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This is necessary to introduce DMA iommu mapping API in nvmap.
Change-Id: I9c043460ca08cc25c4688811a2021820aed5c9f7
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/96378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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This commit reorganizes the usb chr driver for
(1) Application does not have to rmmod & insmod
(2) Application recovery mechanism to restart download
(3) Change memory allocation policy to accommodate in low-mem
situations.
(4) Avoid kernel panic when module is not removed
Bug 947621
Bug 956211
Reviewed-on: http://git-master/r/91373
(cherry picked from commit bb5a148979a92191e0dfb4d97d4942f877f18309)
Change-Id: I2679d1d5f94cfe6e7dc98df0026f64cab703fe5c
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/96334
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Anchored urbs needs to put ref count after unanchoring
them at resume.
Bug 944250
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/86015
(cherry picked from commit eb88ad392bdc05ce216d6adeec54c4f4856ec78a)
Change-Id: I7e5413fb8866db9a15da57166402cb567f07391a
Reviewed-on: http://git-master/r/96333
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Check for valid interface after system resume and before
enabling runtime pm.
Bug 944052
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/85330
(cherry picked from commit a32495671f104e1ba0f5a4940bde17d34b9c87f2)
Change-Id: I77dc559ac0d4b31be756d3e770c04b8e5e7bfe36
Reviewed-on: http://git-master/r/96332
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Consume skb buffers only in success case. In fatal error
case stop tx transmission instead. This prevents many retries
and possible kernel crash.
Bug 937178
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/83290
(cherry picked from commit 974ffdc61f26d86744e1a7b1003117da50df9020)
Change-Id: Ib2b982c0cea91d2ba5e30c04869c4f22dca7ed31
Reviewed-on: http://git-master/r/96331
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
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a6ecc18e92 removed the sources for the interrupt_key driver, this
removes the include file as well. There are no in-tree users of this
header file.
Change-Id: I90a8c25e8aed5daa6480407b095ebb82d83f7137
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/96262
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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0cb53fae65 removed the sources for the gpio-switch-regulator, but missed
the header file. There are no in-tree users of this header file.
Change-Id: Ib497e97b9374025c18c7b20a2006d0c66e2b68a7
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/96258
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Multiple queue were getting scheduled leading to race condition.
Bug 955259
Change-Id: I7dd8d0d15b17552c3a611449642439ae21fa4b5d
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93097
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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