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2011-11-30arm: tegra: cardhu: Add support for hsic baseband power managementSeshendra Gadagottu
Added required Cardu specific changes for hsic baseband xmm modem power management. BUG 828389 Original-Change-Id: I119f541544cd34e1584608826714d2bfd9cbfe34 Reviewed-on: http://git-master/r/40789 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1a257f5c0a78f8936de4c740026c60378e12fcf2
2011-11-30nvhost: Set gr2d clocks to minimum and set timeout=0Mandar Potdar
Set gr2d and related clocks (epp, emc) to minimum. Set Timeout for 2D only to 0. bug: 845598 bug: 843716 Original-Change-Id: I1367274469ef290a08c3fb1f348664b3a38fecd7 Reviewed-on: http://git-master/r/39992 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5436a0af9c1ef813d06e4201e18d853488fb85ef
2011-11-30ARM: tegra: ventana: support power sequence timingKen Chang
below variables should be defined according to power sequence specifications of panels. - timing between panel power on to lvds singal enable - timing between lvds signal enable to backlight enable bug 818959 (cherry picked from commit 38c3b4bc7fcda70df84bd4a10112cc1468f0a856) (reviewed on http://git-master/r/41669) Original-Change-Id: I4844baf2cb680e3e898bcf0907be57f29e0c71da Reviewed-on: http://git-master/r/42967 Tested-by: Ken Chang <kenc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: ChihJen Hsu <chhsu@nvidia.com> Rebase-Id: R09cc1fef411f47de9431aeb1e750d47309b79e89
2011-11-30arm: tegra: whistler: add tca6416 deviceVarun Wadekar
the gpio used for vdd_fuse is powered on by the i2c expander (GPIO_P02) present on the pmu board. Bug 836963 Reviewed-on: http://git-master/r/#change,41738 (cherry picked from commit f0a8261c68a5a7512c940b4098341b98d239580e) Original-Change-Id: Iea34da2f4d86a55a5fcd8748a8512bee3f3480f6 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/42822 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R832f0dc5a3b300de59452c608812782c428e7231
2011-11-30arm: tegra: fuse: declare tegra_fuse_regulator_en() as externVarun Wadekar
platforms need to implement their fuse power on functions if they do not use regulators to power on the fuse block Bug 836963 Reviewed-on: http://git-master/r/#change,41737 (cherry picked from commit 02747e1ddd8391dbb73ee04493417846508ebfbc) Original-Change-Id: I1f462c1e92574e8f64ce2158a4fee8be7f5441ce Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/42821 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rf223f5756750cd010c55c69d68628107d46c5fa0
2011-11-30ARM: Tegra: Cardhu: Adding SDMMC drive strengthsPavan Kunapuli
Configuring the drive strengths for SDMMC1, SDMMC3 and SDMMC4. Bug 799568 Bug 826694 Original-Change-Id: Ib18c002993eddaf622f48faa0b4e4c9deb0f8e3c Reviewed-on: http://git-master/r/42608 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Raf1d57275c48839cdb4913c3b028b4c2ad176952
2011-11-30tegra: nand: Added features in the driverBhavesh Parekh
Added 4K page support. Added 16-bit support Added sys interfaces for various operations. Added support for un-aligned page read. Added setting timing values based on vendor-id/device-id. Moved support for setting clock to platform from the driver. Fixed OOB-Read/Write issues. Original-Change-Id: Idf920c1cb0352dcda0282fa399d6c1f57a20736c Reviewed-on: http://git-master/r/42347 Tested-by: Bhavesh Parekh <bparekh@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Refa8b8aa651f824a27513bfe663c57237dde2beb
2011-11-30usbnet: Adding power management for raw ip driverSeshendra Gadagottu
Added PM calls for raw usbnet ipc drivers. This is basic version and needs to be extented for complete power management. BUG 828389 Original-Change-Id: I77fbf3bf6badfb624f805f68b73fdb5ba617e30c Reviewed-on: http://git-master/r/40790 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rc0f0ac64afd3c36d2178ed011e345bf36958229c
2011-11-30arm: tegra: usb_phy: Separating ulpi and uhsic phy configurationSeshendra Gadagottu
Avoided mixing of ulpi and uhsic configuration in usb_phy code. Added postsuspend function for uhsic. BUG 793840 Original-Change-Id: If24fe1d9f13db53bfe51a7f9a2728bd042ea1912 Reviewed-on: http://git-master/r/40771 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rc23e2617ffff6fe925e6bb8b59753e2a1ae90adb
2011-11-30arm: tegra: Implement HSIC power management for baseband devices.Seshendra Gadagottu
Add power management for HSIC baseband power module. Currently the power module implemented state handling for L0->L3 and L3->L0 state transitions. BUG 828389 Original-Change-Id: I46b7da66bfa85fac57261ec68668435855739981 Reviewed-on: http://git-master/r/33065 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R2d04847c5dc12db17b49ec62a4e12f061bca29fe
2011-11-30video: tegra: dc: disable underflows for fpgaJon Mayo
For non-silicon platforms(fpga and simulation) disable all underflow interrupts. Original-Change-Id: Idda78cd5a8e1fda7fac672a259ed05c95876752b Reviewed-on: http://git-master/r/42286 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rd37cc00d1ad527fae58834be3b225238d1ec8c49
2011-11-30arm: tegra: cardhu: Provide list of clock source to spi driverLaxman Dewangan
Providing list of clock source to the spi driver so that driver can select best clock source which gives minimum error for desired speed. bug 851642 Original-Change-Id: Id7e4b332f57b209f0ebd3f03cc8190b4c8d7ab6a Reviewed-on: http://git-master/r/41241 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R534fda0233310be9cb61ae63a02acad4cbe13f12
2011-11-30spi: tegra: Select best clock source for required rateLaxman Dewangan
Providing the different clock source option through platform data to select best clock source based on required interface frequency. bug 851642 Original-Change-Id: I18bf817b63cf1afac7db3969f266cc5fcaeee81e Reviewed-on: http://git-master/r/41226 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Ra4e4573414ef2c4e72cdcb4cd5625e242cfb4ec6
2011-11-30media: video: tegra: disable ov2710 AWBCharlie Huang
set manual white balance otherwise it will conflict with isp bug 829281 Original-Change-Id: Id89ae1dd7e607beb35b43db5991742d3b8dcc345 Reviewed-on: http://git-master/r/42709 Reviewed-by: Chonglei Huang <chahuang@nvidia.com> Reviewed-by: Andrei Denissov <adenissov@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Gary Zhang <garyz@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Tested-by: Chonglei Huang <chahuang@nvidia.com> Rebase-Id: R9db77cef2efc133d03b637488e647d4cb0ab98fe
2011-11-30usb: ehci: tegra: Enable/disable usb clockSuresh Mangipudi
Disable usb clock when no cable is connected. Bug 829628, 849248 Reviewed-on: http://git-master/r/39353 (cherry picked from commit 6a78f2d2e72a2a5f20b784c0efc4917ece4776c5) Original-Change-Id: I94d954d735226341095d7161b8dce3888f2d31a2 Reviewed-on: http://git-master/r/42546 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Rebase-Id: R285481d5be43ad74ec209e18bcfa8dded6ee9401
2011-11-30ARM: tegra: enterprise: Updating EMC tableTom Cherry
Bug 842373 Original-Change-Id: I769d084a6086d6ec7f263f6886a3e4a49075eb3d Reviewed-on: http://git-master/r/41975 Tested-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Rebase-Id: R1a185294d8c369d176dacd1ccf5e76a7ef0528a7
2011-11-30ARM: tegra: baseband: modem flashless boot and remote wakeupSteve Lin
Support modem reboot and re-enumeration. Support modem remote wakeup. Bug 814261 Bug 814271 Bug 846135 Original-Change-Id: I103722d0248bcb1565d5f5799a2e4317c2579a95 Reviewed-on: http://git-master/r/31441 Tested-by: Szming Lin <stlin@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rd1a0b91d4708fc039648df0cd491c9a382b5fcb2
2011-11-30usb: otg: tegra: disable usbd clock at end of probePrashant Gaikwad
In the function tegra_otg_probe(), usbd clock is kept on after probe function completes. Fix this by disabling the clock before exiting the probe function if usb hotplug is not enabled. Bug 829628, 849248 Reviewed-on: http://git-master/r/39354 (cherry picked from commit 5115ea5375912d9c35487d3d3b6e51c3c81be25c) Original-Change-Id: I9786a7eaa6c5ffc6bb7cd2fd792b0831a7ed788c Reviewed-on: http://git-master/r/42375 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Rebase-Id: Rb5a33439a4a2c0a2ccf45cf46b4b9c64788cdb2e
2011-11-30usb: host: tegra: transaction based clock enableSuresh Mangipudi
enable the emc and sys clock when a transfer is requested and disabled after a timeout of 2 sec after the last transfer request. Bug 817794 Original-Change-Id: I3da037b051dccaaed49cc81379ca79217d553c4c Reviewed-on: http://git-master/r/41216 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Rebase-Id: R1cbcc4dd752e1f02610a17390a3bb4713d254d4d
2011-11-30ARM: tegra: cardhu: Add IO power detection consumersAlex Frid
Bug 853132 Original-Change-Id: I59cc6b2025926695ebee12d808fb49f556ffaa6d Reviewed-on: http://git-master/r/42264 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rbd0d325e54141db2187dff6b11d5c0b20ff046d9
2011-11-30ARM: tegra: power: Control IO pad configuration dynamicallyAlex Frid
Tegra IO pads are automatically re-configured when IO power level is changed. Current code keeps auto-detection cells in default, active state all the time. This change will allow turning off cells when IO power is stable, and activate them only during power transitions. In addition IO pads will be set into "no-io-power" state after the respective regulator is disabled, and re-configured back for regular operations before regulator is re-enabled. Dynamic IO pad control introduced in this commit is still disabled by default on all tegra platforms. Bug 853132 Original-Change-Id: Ifc7bbe2ac34929c14f8f8e9feaa4290b78fe6cf6 Reviewed-on: http://git-master/r/42263 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R8b7c7863c1580816a2f3b28bdb3c228a97a18736
2011-11-30arm: tegra: ahci/sata: enable sata rails/partition at initYen Lin
Enable sata rails and sata partition when driver initializes - add sata_oob and cml1 clocks to sata powergate partition. - set sata and sata_oob clock source using clk_set_parent API. - fix a bug in while(timeout) loop Bug 836589 Original-Change-Id: Iddc08bf851ffc83d45bd6aed4df85cde3b13f0e4 Reviewed-on: http://git-master/r/41314 Tested-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Rhyland Klein <rklein@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R500e99ac50d1e3c0851958b1c83316dded00d617
2011-11-30regulator: Expand regulator notifier eventsAlex Frid
Add regulator enable notifications (not sent by the current code). Add voltage notifications sent only if regulator output is actually changed (keep intact existing voltage change notification that is sent unconditionally - even if voltage change was not allowed by constraints, or no actual change since regulator is disabled): PRE_ENABLE Regulator is to be enabled POST_ENABLE Regulator was enabled OUT_PRECHANGE Regulator is enabled and its voltage is to be changed OUT_POSTCHANGE Regulator is enabled and its voltage was changed Bug 853132 Original-Change-Id: I2759ada1c5d1e43f746f6c866f9b3c203b68aed6 Reviewed-on: http://git-master/r/42262 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Rdac9b19d1f999e889aae8e2eb72f9b60057dd05a
2011-11-30hwmon: tegra: tsensor: lp0 save/restore configurationBitan Biswas
tsensor configuration needs to be saved before lp0 and restored after lp0 resume else POR values are seen after lp0 resume. - Config0, Config1 and Config2 registers are saved and restored bug 851791 Original-Change-Id: I95532d995af4fa71e169209bb1788fc4152290fe Reviewed-on: http://git-master/r/41819 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Raceac7154fc86486f2726cdd13637d7e8d1e6828
2011-11-30video: tegra: nvmap: Fix cache flush issue during page alloc.Krishna Reddy
Bug 39790 Original-Change-Id: I5ce0e35501442ed1a6818aebfeae1670ebb9d08d Reviewed-on: http://git-master/r/39867 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R5679d529af4779bde735d3055b04d368b765c620
2011-11-30video: tegra: check for hdmi peripheral during resumeSanjay Singh Rawat
As HDMI is not a wakeup source. To detect HDMI peripheral which is connected after suspend, we scan for it during HDMI resume. Bug 846365 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/39776 (cherry picked from commit fd1134f413845f8e0b3944153eb7406f713a9709) Original-Change-Id: Idee461e66edce494214814ced3854f716e8a44e3 Reviewed-on: http://git-master/r/41545 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R01d0a5d61afb386240ae35da73fe12f38e26ed28
2011-11-30ARM: tegra: power: Add throttling enable reference countingAlex Frid
Added throttling enable reference counting, so that it can be controlled by drivers for different thermal sensors (e.g, on chip and device skin sensors). Fixed possible dead-lock when cancel delayed work synchronous is called while locked with the very same mutex that protects work function. Bug 837005 Original-Change-Id: If2aa8aa16f4a3b3497def592503213522fd38e54 Reviewed-on: http://git-master/r/40534 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R893b5a7b402d327b40acb7adbadb53f930804c0d
2011-11-30ARM: tegra: clock: Unify CPU set rate pathsAlex Frid
Made sure that CPU thermal and edp limits are applied on all CPU set rate paths: cpufreq governor, thermal throttling, edp notification, power management notification. Also included auto-hotplug governor state update in all these paths (current code does not apply the limits, or does not include auto-hotplug on some rate change paths). One exception - keep current functionality for suspend notification: set pre-defined CPU rate, and force auto-hotplug idle state. Original-Change-Id: I54531f8f919ce248b2b56f5aa56f39e2efcb568a Reviewed-on: http://git-master/r/40533 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1471a5f318644fa5a7f436d8ed73c12de8b76245
2011-11-30ARM: tegra: power: Re-factor power headers.Alex Frid
Renamed and moved tegra cpu related function prototypes from power.h to tegra-cpu.h. No functional changes. Original-Change-Id: I24c25c9434bf7008e0875d1f74be502cd902c4ba Reviewed-on: http://git-master/r/40532 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R3d90799453a86a5a9ed012d2bfe373715de6d5c3
2011-11-30arm: tegra: cardhu: Add DVFS table for Elpida memoryRay Poudrier
Bug 852560 Original-Change-Id: I68c9877c43507bf154ab38462866f2e45375f71c Reviewed-on: http://git-master/r/42017 Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R82c2041d99f8696b37c3c0aa7b932c7dddb757d7
2011-11-30ARM: tegra: ventana: change TPS6586x SMx slew rateXin Xie
Currently Ventena reference design is using the wrong LC values in tps6586x, we need reduce the slew rate of SMx in order to prevent voltage undershoot. BUG 815933 Original-Change-Id: Ib44bd9a61769ef6c2af14174347181ce7426a5b3 Reviewed-on: http://git-master/r/40265 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfe48ec428553eed008c70244d4872a9a1bd3e36c
2011-11-30arm: tegra: cardhu: AVP driver selectionGajanan Bhat
Enable RPC based AVP driver or channel based AVP driver based on kernel config setting. Original-Change-Id: I64c21724b55004fa4d7aaf801b47e57b6587b91e Reviewed-on: http://git-master/r/37769 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd00f3fb6f0d75dd2b279b203cb25bee3dfdae112
2011-11-30media: tegra: avp: Add channel based AVP driverGajanan Bhat
New AVP driver based on channel model. The AVP acts as s/w host1x channel and has a syncpoint allocated to synchronize audio/video operation submitted by the host. The driver is responsible for loading the AVP kernel and initializing s/w channel. Original-Change-Id: I20b68fc3cbb88b7c95542bae0a1acf5edc52c715 Reviewed-on: http://git-master/r/37420 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfa4a49bb322192861df6c9cc16ada6ae1040f8be
2011-11-30regulator: tps6586x: add SMx slew rate settingXin Xie
bug 815933 Original-Change-Id: I3b8f8910b12ff4f8a5f9588615bd0bb6452bdc3b Reviewed-on: http://git-master/r/40263 Reviewed-by: Xin Xie <xxie@nvidia.com> Tested-by: Xin Xie <xxie@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R18292e6e68c95b9f67d24281a9f2b80439452ba8
2011-11-30crypto: tegra-se: add support to use sskVarun Wadekar
support to use ssk for some special encrypt decrypt operations. algo names changed to match the ones accessed by /dev/tegra-crypto Bug 850434 Original-Change-Id: I8f13ae1fd15ffeae4aceee5799552d173560479a Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/41012 Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Rebase-Id: R86620bd834ae7740377f43c285ba86aee74bb4cc
2011-11-30nvhost: Enable 3D powergatingTerje Bergstrom
Enables 3D power gating on chips that support it. Bug 793861 Original-Change-Id: Iadc40b65ac4897550d3b0d2076cc7efe98c95dfa Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/37821 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Tested-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R14eebcaa38b71d81b5286f922d0d10e15a121b13
2011-11-30arm: tegra: renaming tegra3_mc_stats sysfs to tegra3_mcDonghan Ryu
this change is the follow-up patch to change replace tegra3_mc_stats to tegra3_mc. Original-Change-Id: I50e97a122553746d025eb4628c76e6d744967e28 Reviewed-on: http://git-master/r/41478 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Donghan Ryu <dryu@nvidia.com> Tested-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Rebase-Id: Rb4bc285d1d3b5ff888a8b7d7ee68fa17c5e37151
2011-11-30ARM: Tegra: dvfs: Separate proc array size for CPU and COREDiwakar Tundlam
Original-Change-Id: I0e6b40bf8379404410dd40bc83fe4da5bd50e4e0 Reviewed-on: http://git-master/r/37973 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R75d67a71f0c54b4a368d48fb89c3185030d5ab8a
2011-11-30video: tegra: host: Channel based AVP driverSoumen Kumar Dey
Reserving syncpoint for channel based AVP driver. Original-Change-Id: I2829341417a9bdc010ba51f4416d8648b7068b17 Reviewed-on: http://git-master/r/41148 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gajanan Bhat <gbhat@nvidia.com> Tested-by: Gajanan Bhat <gbhat@nvidia.com> Reviewed-by: Chris Johnson <cwj@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Rffd00ab1a181b331fc5e309f68f61748b8d2bd65
2011-11-30video: tegra: update copyright and commentsJon Mayo
added correct copyright comment. removed funny block comments. Original-Change-Id: I1a86083e3467bba208e5cafc3886a3800cb52e1d Reviewed-on: http://git-master/r/39246 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R50e415ae0c7d0f52ab7313a55ad757cec8910d9f
2011-11-30nvhost: Do not crash if wait syncpt > maxTerje Bergstrom
If user space is waiting for a syncpt value higher than max, nvhost_wait_timeout() panics the kernel. This panic is based on the assumption that nobody should wait for sync points higher than indicated by a submit from user space. As the API has nothing to disallow waiting for future sync points not indicated by any submit, this patch removes the panic and treats this as a normal case. Bug 843238 Original-Change-Id: I367c46e42bd683f1023e7fe04e523a99ab3d666b Reviewed-on: http://git-master/r/36470 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R18a509f85dfd657c3dcbbd7db1fa95d71113cea0
2011-11-30ARM: tegra: clock: Set Tegra3 LPDDR2 minimum rate to 25MHzAlex Frid
Original-Change-Id: I8cd5cfef8a040ffa5f0959b5a294b25a21fcfa8b Reviewed-on: http://git-master/r/41141 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R47886089e5b3b73c58372645ec7ea282a0cfa698
2011-11-30ARM: tegra: power: Added global EDP Capping tablePeter Boonstoppel
- Added table with EDP Capping values for different SKUs/regulator currents in new file edp.c - New entry point tegra_init_cpu_edp_limits() - Added DebugFS entry under debug/edp to list the currently selected EDP table - Populated EDP table in edp.c with data from Bug 844268 - edp.c keeps main EDP table; cpu-tegra.c and board-cardhu-power.c both read from there Bug 840255 Original-Change-Id: I55c2ee16278be8cd3005218bedebe76846d137d8 Reviewed-on: http://git-master/r/40938 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9a5f2bcfc1e6e0b5aee37cd700d75f9ef5cea30b
2011-11-30misc: nct1008: extended mode first reading fixBitan Biswas
nct1008 first temperature reading in extended mode is incorrect. A valid temperature is available in next measurement cycle after changing temperature range. - using table with delay expected for supported conversion rate of nct1008. bug 852754 Original-Change-Id: Id68cbf6a83fe2a11ae2a6d94f0df51a3ebd37ac7 Reviewed-on: http://git-master/r/41506 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9fc8a721f1b25372324f7e38c3c477b9769d51bf
2011-11-30ARM: tegra: enterprise: Add front cameraCharlie Huang
modify enterprise board files to add support for ov9726 bug 829399 Original-Change-Id: I9ebbb9926820d9209224906d2a3aa8dcde072a12 Reviewed-on: http://git-master/r/40467 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rb444bad59ae0f7ce83b79c8326175fa15964d069
2011-11-30ARM: tegra: cardhu: Fixed backlight brightness issueGaurav Sarode
Fixed incorrect size of array that was causing Blank display on maximum brightness. Bug 852481 Original-Change-Id: I54f8e9724eff1ca15bb3d87c78e6b0b5823e7866 Reviewed-on: http://git-master/r/41517 Tested-by: Gaurav Sarode <gsarode@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Rebase-Id: R55db5712582df547e1786c2a1782491feb4ce3ec
2011-11-30media: video: tegra: enable ov9726 sensorCharlie Huang
initial support for sensor ov9726 bug 829399 Original-Change-Id: I67315dfce7baf2c14f49bf526c10fe19cf32d1d3 Reviewed-on: http://git-master/r/40472 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Chonglei Huang <chahuang@nvidia.com> Tested-by: Chonglei Huang <chahuang@nvidia.com> Rebase-Id: R31312b2b0fda96348bb14461651ccb27aa30b0de
2011-11-30ARM: tegra: clock: Fix activity monitor resumeAlex Frid
Move call to clock get rate API (can sleep) outside of activity monitor resume section protected by spin lock. Original-Change-Id: I78d5bb8728f3a728a6ff952b1f3cba19b9dec0a0 Reviewed-on: http://git-master/r/41626 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R1ab0bb59a88f078f85f125b968546c09aab9d176
2011-11-30ARM: tegra: Add GPIO_PEE3 for Tegra3Harry Hong
Original-Change-Id: I9a02b7a79b4bbf0139b5f0a6ad26f7c2eaf9582d Reviewed-on: http://git-master/r/40144 Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R79516993533f5681445de76470cb90025e073474
2011-11-30video: tegra: dc: Fix no_vsync hang issue.Gaurav Sarode
no_vsync was causing random hangs due to unwanted interrupts were enabled on default. Fix bug 801463 Original-Change-Id: I8dabf4b9b7b98cd64f2caff94efe949e2768bdd2 Reviewed-on: http://git-master/r/40616 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R2aeb2a584b04dd36317bbd405e907ab6f45c2a41
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-13 13:06:13 +0000