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Add support to query syncpoint ID assigned
to the AVP by nvhost driver.
Change-Id: Id963e6c32f97e095da253de4b7d83ee8fa8d62a8
Reviewed-on: http://git-master/r/49702
Tested-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Isaac Richards <irichards@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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get_rom_info() retrieves precalibrated INF and MAC, and stores
them for ODM to use. This function is added back.
bug 866141
Change-Id: Ibe4ca3751b2dacc83c2483e9eec80f340ebc7d7d
Reviewed-on: http://git-master/r/48812
Reviewed-by: Qinggang Zhou <qzhou@nvidia.com>
Tested-by: Qinggang Zhou <qzhou@nvidia.com>
Reviewed-by: Gary Zhang <garyz@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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There is no guarantee that every element in the pin group array
will be used (i.e., initialized) for a particular SOC. Prevent
access to pin group array elements that are not initialized.
Change-Id: I90ea3616f8508b12ffe4a7daf9ff4b2bac057075
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/50059
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Add delay after switching the clock source for sclk
Reviewed-on: http://git-master/r/48603
(cherry picked from commit 523934da7227984d05597bac8a9dcd533de2f2b4)
Change-Id: I36c399d95a1f7348b61d01843997fd4f54aa85bd
Reviewed-on: http://git-master/r/49725
Reviewed-by: Luke Huang <lhuang@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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Register clocks that are shared amongst modules (emc, epp) as separate
clocks. This way setting EMC clock for 2D does not interfere with EMC
clock needs for 3D or MPE.
Bug 868554
Change-Id: I5c7dddc8f1d67969865918e577bd24b274d9e897
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/49603
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Fuse programming is possible only on silicon platforms.
Do not enable it for simulation or FPGA platforms.
Change-Id: If1bec072eeaae1ee95720a37e37fcb7c8e8ee464
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/49724
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Enabling Spi Slave functionality.
Change-Id: Ic179c1280c668c43569e0eba1aa574b4547c6312
Reviewed-on: http://git-master/r/49662
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Set HDMI audio frequency source from HDA driver during
hotplug-in of HDMI device instead of restarting HDA alsa
stream.
Bug 861185
Change-Id: I36dc7a0debd5caebbf1287e5cf5cedfd1cd36dbf
Reviewed-on: http://git-master/r/49868
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Supporting the ES2.0 Ricoh583 based pmu. This pmu has
the core current maximum upto 3A and so no need to have
external dcdc regulator for the core supply.
bug 822562
Change-Id: I47e9a3468501b0999a68aa093df623ac1bde5041
Reviewed-on: http://git-master/r/49853
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding support for PM305.
bug 846246
Change-Id: Ib036c67c12984668e0b7153f76a1a1d44c5be14f
Reviewed-on: http://git-master/r/49820
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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This adds the necessary platform data to support HDMI on Harmony
devices.
Bug 868732
Change-Id: Ia972cd2a9695072563478036a7fd1b9c3fd18135
Reviewed-on: http://git-master/r/49729
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Tested-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
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The phy should not be powered off if the a device/hub is connected,
Check if a device is connected before turning off the phy.
Bug 867985
Change-Id: Id3ef2d39a04450028378350415848305448b693a
Reviewed-on: http://git-master/r/49676
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
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Aggregate code for dsi deep sleep
Bug 862427
Change-Id: I5296e6659112642f9fe0fb84bec1d5938014c33a
Reviewed-on: http://git-master/r/49506
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Use a memcpy with less overhead in tegra_move_framebuffer, this makes
this function about 30 times faster.
Bug 843089
Change-Id: I4ae9127db6d5ff5d9680e3ff2c3d28463395e39b
Reviewed-on: http://git-master/r/49735
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
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configure ordered dithering for 18bpp internal lcd.
Bug 869395
Change-Id: I4e9391773f783992820e85a201d29403455bc100
Reviewed-on: http://git-master/r/49508
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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This change implements the TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID ioctl in
the dc_ext interface.
It first adds a way for the tegra dc EDID module to export EDID data
safely, without the risk of reading an incomplete or corrupted EDID in
the presence of hotplug, by moving the actual data to a substructure
with a lifetime maintained by a kref. Then, that support is plumbed
through the hdmi block (which is currently the only way to get at the
EDID) and out to userspace.
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Bug 817119
Change-Id: I78cd170e15322011b428cb71ffad2c0c3ea058ac
Reviewed-on: http://git-master/r/49127
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Fix regulator_get error and reset the sensor/focuser properly
in the camera power on routine for PM269.
Bug 842713
Change-Id: Ia3820ec9e7bcca850b090a48963606af855f5ad2
Reviewed-on: http://git-master/r/49101
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Separate Tegra2 and Tegra3 code paths for 3D context switching.
Bug 839973
Change-Id: I5cfece1c9835a3de329f390aed55c47ad00f87e8
Reviewed-on: http://git-master/r/46887
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Exporting with GPL flag of the api spi_tegra_register_callback()
for registering for callback.
Change-Id: Ic3cbbca226071002824f1b6089dc2ccec796cc07
Reviewed-on: http://git-master/r/49663
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Picture Aspect Ratio for 576p mode was wrong, it was always 4:3
if aspect ratio is 16:9. It is fixed.
Bug 863854
Reviewed-on: http://git-master/r/49120
(cherry picked from commit 5537288a3faf4ba7b6677dab8790a022d06d638b)
Change-Id: I7e4ff4e2908a9809f9681f1a09c4f56118418674
Reviewed-on: http://git-master/r/49586
Reviewed-by: BK Kim <bkk@nvidia.com>
Tested-by: BK Kim <bkk@nvidia.com>
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
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the errdiff dithering mode is limited to 1280 pixels per line. There was
some confusion and 640 was used in code and documentation.
Bug 803059
Change-Id: Ia802cc5bca72cf55621487f18369278be254de72
Reviewed-on: http://git-master/r/49538
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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CONFIG_TEGRA_IOVMM_SMMU now can be independently disabled and
the kernel still builds.
Change-Id: I009319352f4b125941a58132d2be8d5f36411aab
Reviewed-on: http://git-master/r/49278
Tested-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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RIL and FIL require GPIOs access from user space.
This is possible with this change using sysfs.
Bug 866051
Change-Id: Ie6ee4e305ae709a4eae467e27b269b9327031a17
Reviewed-on: http://git-master/r/49206
Tested-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-by: Frederic Bossy <fbossy@nvidia.com>
Reviewed-by: Szming Lin <stlin@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 861419
Change-Id: Icff68a821f5088af62962ccadaabbd01e4b5af7b
Reviewed-on: http://git-master/r/45966
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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This change makes tegra2_pll_clk_set_rate() will process for p field is greater
then 2. It helps to increase VCO.
Bug 852217
Bug 842032
Reviewed-on: http://git-master/r/47492
(cherry picked from commit e1fefd8a7fb9751ddfad95e469666f3c876123a8)
Change-Id: Id49b33cd8e568c6e5b619988a148242a85867eca
Reviewed-on: http://git-master/r/49585
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add RTC driver for Maxim PMU MAX77663.
Bug 849360
Change-Id: Ia7c910a852527f6a7bf5d2622cb1f76fd72222cd
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/49584
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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- Use 0x0ff00000 (last 1MB of IOVM).
- For Tegra3 A01, use 0xeff00000.
Change-Id: Ieb21d2bf38158171b97434e04ede7417823b3603
Reviewed-on: http://git-master/r/37742
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Enabling RICOH583 MFD and regulator driver.
bug 822562
Change-Id: I2521623b71ab6179d4df141bf0ce0f1acf99b9ad
Reviewed-on: http://git-master/r/48987
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Integrating the PMIC RICOH583 based PM299 pmu board
with cardhu boards. The correct pmu will get registered
based on the boardID of pmu.
bug 822562
Change-Id: I4c3fad1a0c71e07792e8261c0edcff747d9b5ccc
Reviewed-on: http://git-master/r/48985
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Add support for Sony PS3 game controller for
Bluetooth and USB interface.
Bug 847075
Change-Id: Ic67069b6e0f0b3c97cedcfe19315cd45441b2314
Reviewed-on: http://git-master/r/48421
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Currently, dc_ext only takes a single nvmap memory ID per overlay, even
in the YUV case (the U and V planes are expected to be differentiated
using an offset from the beginning of the nvmap allocation).
This is problematic for some software flows, such as certain video
interlacing algorithms that will vary the luma plane while keeping the
chrome plane constant.
This change allows dc_ext clients to specify a different nvmap
allocation for each of the Y, U, and V planes. If a YUV surface is
used and no U or V plane allocation is specified, the old behavior is
preserved: the U and V offsets are assumed to be within the same
allocation as Y.
Note: this changes the behavior of the offset parameter: the old code
added offset to offset_u and offset_v when using it. The new code
treats all three offsets as relative to the beginning of the allocation.
It also fixes a bug in the code where offset was applied twice to the Y
plane. I believe this is safe because the presence of this bug means
that no existing clients are using offset != 0 (or if they are, they're
already broken).
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Bug 850882
Change-Id: I230e03db25baaae73a3bdc0d45a2aec162b87fa4
Reviewed-on: http://git-master/r/41471
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Avoid schedule while atomic error backtrace while setting termios, by
giving back lock taken before calling api which internally requests
mutex lock.
Bug 867218
Change-Id: I43afed41856c0b23324a1a5280c7e7963600d2e3
Reviewed-on: http://git-master/r/49431
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Sometimes it is observed that the POR value of RTC
interrupt register is having Alarm set.
Hence clearing it before enabling RTC interrupt.
bug 867362
Change-Id: Id84db407880d4c1f5fb3023218c2b21e82cf515d
Reviewed-on: http://git-master/r/49372
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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use fractional guardband accurately per chip sku
bug 844025
Change-Id: I1137e39b5aa9babae740d2c9e438275183683756
Reviewed-on: http://git-master/r/49317
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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to adjust for sku specific guardbanding of temperatures
bug 844025
Change-Id: I1193eae50736ae3dbf3ce0a26653e01962c21c8d
Reviewed-on: http://git-master/r/49316
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Setting the dsi_csi rails to 1200mV.
bug 869063
Change-Id: If1bd3d804b5f3888e4bbd377ab2105c4ca7a2dda
Reviewed-on: http://git-master/r/49175
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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bug 864482
Fix the acif setting based on stream format change
Added support of i2s mono recording to set acif properly.
Change-Id: Ia1cb93e9f606064da48293411b861df6914e7e9c
Reviewed-on: http://git-master/r/49515
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
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SoC core voltage is adjusted during late dvfs initialization to match
kernel clock configuration. Clocks left enabled by bootloader should
be disabled before dvfs initialization (while SoC is still running at
boot voltage) to avoid modules over-clocking.
Change-Id: Id22393f3e296393df00871d46c004c6ae1eca28d
Reviewed-on: http://git-master/r/49124
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Made sure LP3 state is reported as last entered state to cpuidle
governor in case when LP3 is entered as a fall back from LP2 path;
skipped LP2 stats in this case as well.
Change-Id: Ib2d0dd1b7c673b0b8c346a07372505d2345fe1ca
Reviewed-on: http://git-master/r/49109
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Enable battery charging with special SKU.
The board ID have the sku field and bit 0 of the sku
should be 1 for enabling battery charging.
bug 868483
Change-Id: I028bcbfbc042184a7feecb66bfbf35d6c70cd355
Reviewed-on: http://git-master/r/49416
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Enabled Home, Back, Menu are as wakeup source keys
Bug 866078
Change-Id: If009a44f1db5b7d971a61f3cab5ece2ce4c3aefd
Reviewed-on: http://git-master/r/49368
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Make sure alarm interrupt is cleared during device probing.
bug 867362
Change-Id: Iad33c0e0715de2ec68291a57c2a55d1ad1198565
Reviewed-on: http://git-master/r/49302
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Checking for valid platform data before registering the driver
as regulator.
bug 868483
Change-Id: I630d55f4e60f296d9e9a05455b97e72186f09e19
Reviewed-on: http://git-master/r/49224
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Increasing the maximum irqs of system to +64 from
internel irqs of socs.
bug 822562
Change-Id: Ib032232efd59ea7c1ccaa36b62d1fffcaa2c09b1
Reviewed-on: http://git-master/r/48984
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Nvhost has a mechanism to request a frequency to be set to module
clocks. When a client connects, it is given default requested frequency,
which was lowest possible.
When a client exits, the frequency of a module is set to maximum of all
requests. As most clients do not set frequency, this caused emc to be
set to lowest possible.
Introduce a new field, default_rate, which is set at initialization
time, and as the requested rate for each client. Client can still
override this setting by using clock setting ioctl.
Bug 859515
Change-Id: I5c62d4cb81ac29e7c9bc9195353338f0b97ac812
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/48470
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Add new sensor mode for OV5650 sensor
with QVGA and 120fps.
Bug 860670
Change-Id: I2f4dbdd5ebf771359f73d89787d88c50ec333e0f
Reviewed-on: http://git-master/r/48065
Tested-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Ravikumar Boddeti <rboddeti@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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during system suspend if wifi is on but not connected, android
sets RTC alarm to wake up system after 2 mins of system suspend
to turn off wifi. during turning off wifi it was observed that
BCM4329 MAC is giving spurious sdio interrupts which was causing
lockup issue (mmc_lock) between sdio interrupt handling process
and wifi stop process, to fix this issue sdio interrupts are
disabled before giving MAC reset from host.
Bug 834444
Bug 798783
Bug 796147
Bug 797230
Bug 780047
Bug 818687
(cherry picked from commit 113676ec197fc62b7dce23dad4e081c940319846)
Change-Id: I810894ded26bcfb44cff52aba16f2a5dbcba8f28
Reviewed-on: http://git-master/r/47478
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Tested-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Avoid power down HSIC phy during L2 suspend state.
Triggered postsuspend and preresume actions for xmm modem.
BUG 828389
Change-Id: I2cd862361d5ba0fedf7e7bffac02c0dfbf5cf0c8
Reviewed-on: http://git-master/r/46654
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Used a wakelock to follow L0->L2->L3 state transition for modem
power states. Added code for AP initiated L2->L0.
BUG 828389
Change-Id: Iad90364d27a0fac204c12880d6aa17a6e032b7d2
Reviewed-on: http://git-master/r/45486
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
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Use a 48% efficiency factor when calculating EMC clock.
Bug 868860
Change-Id: I469c8120d754210951936b49465b0a2d31fa6825
Reviewed-on: http://git-master/r/49312
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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