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2010-03-08Tegra RM: Removed 50MHz floor for MIPI PLL output.tegra-9.12.7Alex Frid
Removed 50MHz floor for MIPI PLL high speed output frequency. This floor kept MIPI PLL low speed output (= high speed output / 8) above DSI panel specification - bug 651446. Change-Id: Id1d3314b46896cc8f6fb48d238ffed01fd6b4e4a Reviewed-on: http://git-master/r/787 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
2010-03-08[nvmap] fix strided read/write loop incrementGary King
in the process of cleaning up the implementation of do_rw so that it could be called from both ioctl and kernel contexts, the loop increment for source and distination addresses was erroneously set to the element size, rather than the provided strides. bug 660448 Change-Id: I02e2b2b980f90a2171d811192b667883f2a3ab41 Reviewed-on: http://git-master/r/805 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-08tegra uart: Make device id equal to instance idRama Kandhala
Changed the registration to use the device ID same as instance. With this change instance 0 will show up as ttyHS0 and instance 1 will show up as ttyHS1 and so on. Before this change, if the instance 0 was not used on a platform, instance 1 would have showed up as ttyHS0. Bug 656451 Tested with Harmony. Made sure that all nodes showup in the device list except the missing instance. Change-Id: Ib4e04b12f16002deb899b38630de102c24e588b0 Reviewed-on: http://git-master/r/735 Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-08tegra: Commenting the error prints for memory pin/Unpin functionsNinad Malwade
- On behalf of Gautam Moharir - Bug 660462 Change-Id: I66e22e247ce5df6135f31c75ae91ec5d0b11e666 Reviewed-on: http://git-master/r/792 Reviewed-by: Ninad Malwade <nmalwade@nvidia.com> Tested-by: Ninad Malwade <nmalwade@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-05[arm] implement TLS register workaround for Tegra errata 657451Gary King
tegra 2 systems have a hardware errata which causes bit 20 of the TLS register (CP15 c13, operations 2-4) to be unreliable. in common user space threading libraries (glibc pthreads, bionic pthreads), the value stored in this register is guaranteed to be at least word-aligned, leaving bit 0 free. the work-around for this hardware errata is storing bit 20 of the user space-provided TLS value into bit 0 of the register inside __set_tls, and restoring it in the get_tls helper. Change-Id: I06439378edc01dc897708e3298cd91b5721c6e50 Reviewed-on: http://git-master/r/779 Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Arthur Spence <aspence@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-05[tegra iovmm] implement stubs for no-iovmm caseGary King
nvmap build fails when CONFIG_TEGRA_IOVMM is not selected. add stubs to allow that combination to work. Change-Id: Ie7e47a987feaeffd987996d11a594b2c8551311e Reviewed-on: http://git-master/r/785 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-05Tegra pm:disable pllp pll during system suspend. other code cleanupNarendra Damahe
Change-Id: I02aa2fd9d5a4faa830e838d2705ee81058fe001d Change-Id: I02aa2fd9d5a4faa830e838d2705ee81058fe001d Reviewed-on: http://git-master/r/750 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-05tegra-nvodm-touch: Remove unneed condition check width[0] == 0xfHoang Pham
This condition check width[0] == 0xf is not need based on spec and it is causing second finger samples are ignored many times. Fixes bug 653317 Change-Id: I2ada2732f0c4965817a0ed1dca1b6351e01d256a Reviewed-on: http://git-master/r/769 Reviewed-by: Gary King <gking@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2010-03-05tegra: EHCI bus suspend/resume requires CONFIG_PMScott Williams
If CONFIG_PM is not selected, don't compile EHCI bus suspend/resume. Change-Id: Ia89612fa3d82dc671accc597e4d1ca05f56eaa5c Reviewed-on: http://git-master/r/783 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-05[nvmap] handle NULL return for pin multiple, fix infinite loopGary King
the handle alignment parameter query had an off-by-one bug in its loop initializer which caused any carveout handle to trigger an infinite loop. the only caller of this API was the debug EGL driver, which used it to verify that the allocation matched the requested alignment. also, if the user passes NULL as the address array when pinning multiple handles to ioctl_pinop, pin the handles and skip the output write, rather than returning a permission error. big thanks to antti for finding the infinite loop. bug 660526 Change-Id: I90f819a231b5a8bef5b473252122cdbefc744efb Reviewed-on: http://git-master/r/782 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-04tegra ODM: Added new Whistler PMU revision support.Alex Frid
Added support for the new Whistler PMU revision that preserves CPU voltage across LP2 (it will allow to enable core voltage scaling on E1109 processor boards). Change-Id: I0724414c5148f39b3c6fa4f0d3f84963231d2520 Reviewed-on: http://git-master/r/726 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-04[usb mass storage] return -EINVAL on NULL requestGary King
there appears to be a race condition which causes req to be NULL. issue a warning and return -EINVAL in this case, rather than dereferencing a NULL pointer Change-Id: I46d7fdd63ec6fb09bdda18e1a1e5509af079beab Reviewed-on: http://git-master/r/768 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-04tegra usb: Save/Restore context for dedicated host mode only.sgadagottu
Save/Restore context works only for dedicated host. Earlier it was enabled even for OTG. This is corrected by modifying the check in nvddk_usbphy.c. Checking for host mode instead of "IsHostMode" flag. Bug 658225: USB host is not working on android/whistler USB port1 in OTG mode. Tested on : Whistler USB1 OTG + USB3 host Now OTG host is getting detected Change-Id: Ia5a1e0744074a6486d8853ea10f6c860b3abb4f3 Reviewed-on: http://git-master/r/741 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-04nvmap: implement nvmap as a full memory manager driverGary King
previously, the task of managing RM-managed memory handles was split between nvos (OS page allocation), the RM (heap management for carveout & IRAM heaps, and handle life-time management), nvreftrack (abnormal process termination) and nvmap (user-space read/write/map of memory handles). this resulted in an opaque system that was wasteful of kernel virtual address space, didn't support CPU cache attributes for kernel mappings and couldn't fully unwind leaked handles (e.g., if the application leaked a pinned handle the memory might never be reclaimed). nvmap is now a full re-implementation of the RM memory manager, unifying all of the functionality from nvreftrack, nvos, nvmap and nvrm into one driver used by both user and kernel-space clients. add configs to control paranoid operation. when paranoid is enabled, every handle reference passed into the kernel is verified to actually have been created by nvmap; furthermore, handles which are not global (the GET_ID ioctl has not been called for it) will fail validation if they are referenced by any process other than the one which created them, or a super-user process (opened via /dev/knvmap). each file descriptor maintains its own table of nvmap_handle_ref references, so the handle value returned to each process is unique; furthermore, nvmap_handle_ref objects track how many times they have been pinned, to ensure that processes which abnormally terminate with pinned handles can be unwound correctly. as a compile-time option, fully-unpinned handles which require IOVMM mappings may be stored in a segmented (by size) MRU (most-recently unpinned) eviction cache; if IOVMM space is over-committed across multiple processes, a pin operation may reclaim any or all of the IOVMM areas in the MRU cache. MRU is used as the eviction policy since graphics operations frequently operate cyclically, and the least-recently used entry may be needed almost immediately if the higher-level client starts (e.g.) rendering the next frame. introduce a concept of "secure" handles. secure handles may only be mapped into IOVMM space, and when unpinned their mapping in IOVMM space will be zapped immediately, to prevent malicious processes from being able to access the handle. expose carveout heap attributes for each carveout heap in sysfs, under the nvmap device with sub-device name heap-<heap name> * total size * free size * total block count * free block count * largest block * largest free block * base address * name * heap usage bitmask carveout heaps may be split at run-time, if sufficient memory is available in the heap. the split heap can be (should be) assigned a different name and usage bitmask than the original heap. this allows a large initial carveout to be split into smaller carveouts, to reserve sections of carveout memory for specific usages (e.g., camera and/or video clients). add a split entry in the sysfs tree for each carveout heap, to support run-time splitting of carveout heaps into reserved regions. format is: <size>,<usage>,<name> * size should be parsable with memparse (suffixes k/K and m/M are legal) * usage is the new heap's usage bitmask * name is the name of the new heap (must be unique) carveout heaps are managed using a first-fit allocator with an explicit free list, all blocks are kept in a dynamically-sized array (doubles in size every time all blocks are exhausted); to reduce fragmentation caused by allocations with different alignment requirements, the allocator will compare left-justifying and right-justifying the allocation within the first-fit block, and choose the justification that results in the largest remaining free block (this is particularly important for 1M-aligned split heaps). other code which duplicated functionality subsumed by this changelist (RM memory manager, NvOs carveout command line parser, etc.) is deleted; implementations of the RM memory manager on top of nvmap are provided to support backwards compatibility bug 634812 Change-Id: Ic89d83fed31b4cadc68653d0e825c368b9c92f81 Reviewed-on: http://git-master/r/590 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-04tegra init: register iovmm deviceGary King
register the GART (for harmony & whistler) with IOVMM, to instantiate the IOVMM device node. Change-Id: I0d8eba7fd056e2c2db979abbc3ddd0bb650d4312 Reviewed-on: http://git-master/r/446 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-03nvodm_battery:Correcting the sizeof when NvOdmOsMemsetSachin Nikam
The sizeof parameter provided to NvOdmOsMemset() was having the wrong value. It can create unpredictable results if NvEcOpen() fails. Change-Id: I19a6adabc1b8d780160a017df7b3fb03ac8c8a60 Reviewed-on: http://git-master/r/760 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-03tegra ODM: Adding new GUID for EMP M570 modem and GUID filterSteve Lin
Adding new GUID for EMP M570 ULPI modem and the GUID filter in nvodm_query_discovery. The GUID will be filtered out according to the RIL option in odmdata. Change-Id: I6bb2093e35d89c7945c82829f0283cf5a36b804a Reviewed-on: http://git-master/r/713 Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-03nvec_battery:Adding a new sysfs attribute "status_poll_period"Sachin Nikam
The default Battery status poll period is 30 Sec. Adding a new sysfs attribute by which this polling period can be modified. To view the polling period:- cat /sys/devices/nvec/nvec_battery/status_poll_period To modify polling period:- echo <newvalue> > /sys/devices/nvec/nvec_battery/status_poll_period bug 646822 Synopsis:[Harmony/android] Battery status is not updated whenever there is any change in battery/power supply property Change-Id:I3b17be7f01fcf91f1c268fdb36fe348ddcf5f626 Reviewed-on: http://git-master/r/742 Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-03tegra usb: Making USB busy hints off on resume, when there is no adbsgadagottu
cable/usb device connection Currently on resume from LP1, though there is no adb cable/USB device connected to USB1/USB3 then also usb busy hints are getting on. With this change on resume: For gadget driver, if cable is not connected then busy hints made off. For host driver, if device(s) are not connected then busy hints are off. Code Clean-up for power improvement Tested on : Whistler board USB1 OTG + USB3 host Tested with all possible connection on USB1 and USB3 Change-Id: I6d210bba1264d9c0134d586d3f67ff609ba2b3fe Reviewed-on: http://git-master/r/745 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02Proper fix for commit I5c6914ef8906eed80cba15249b0760d71e3d0255Venkata(Muni) Anda
csd_struct version on some of the cards is 4.4 cards is 3. This change skips the check for that verison. Change-Id: Ib44344237c99e1a52e1b3eb864e96194b090929b Reviewed-on: http://git-master/r/739 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra:EC receive a transaction request that slave address 0 from T20Ninad Malwade
- Sometimes AP acts as a I2C master and drives address lines to 0 causing transaction errors. - Enable NEW_MASTER_FSM in slave as suggested - Already verified on harmony + ce6 - Bug 614917 Change-Id: I0563e8472fc4bd5b1fb0d8c9e9508b6a39b68d76 Reviewed-on: http://git-master/r/727 Reviewed-by: Ninad Malwade <nmalwade@nvidia.com> Tested-by: Ninad Malwade <nmalwade@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra power: Use scratch33 to save return address for hotplug/lp2.tkasivajhula
Scratch1 is also used by lp1, which causes issues with hotplugging a cpu. Use scratch33 instead as no one else is using it. Change-Id: Ib6b757d577e0e3d8e0efe2049ffb7127fe4f8a0a Reviewed-on: http://git-master/r/724 Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-02tegra udc: Add USB charger supportVenkat Moganty
Adding support for usb charger detection and setting the charging current limit through the regulator for drawing the vbus current. Bug 631316 USB charging support in Android Tested on: whistler/Android Change-Id: Ib73ac660d1546fbbdc0ed19ca0f25e04b3676886 Reviewed-on: http://git-master/r/693 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra gart: do not free savedata in suspendGary King
the GART context save region is only allocated once at probe time, so it should not be freed in the resume path. Change-Id: I79dbf03b84b5d23d6aa3fbd0a6b1ca45568c30d0 Reviewed-on: http://git-master/r/740 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra: define I/O virtual memory manager interfaceGary King
tegra SoCs include a mechanism to remap discontiguous system memory into a contiguous region in the addressable virtual address space of DMA devices (GPU, APB and AHB peripherals, etc.). On tegra and tegra 2 devices, this is called the GART. the IOVMM manager provides an abstraction for client drivers and OS subsystems to access this functionality using concepts familiar from the operating system's virtual memory system: reserving and decommiting of virtual address regions, adding virtual-to-physical translations into reserved regions and context-switching between multiple address spaces. IOVMM provides a driver HAL to allow for future enhancements to the hardware (additional address spaces, larger translation regions, demand-loading of translations), while keeping the exposed client API stable. IOVMM uses a best-fit allocator implemented as a double red-black tree - one tree of all blocks ordered by address to facilitate efficient merging of free blocks, and one tree ordered by size to facilitate efficient allocation. add kernel configurations for support IOVMM devices (currently GART, supported by Tegra and Tegra 2 SoCs), and a top-level IOVMM kernel config which is selected automatically whenever a device is enabled. enable IOVMM by default for Harmony. Change-Id: Ic3c85d45654300a09bc7f1f824b32824ec956ea6 Reviewed-on: http://git-master/r/398 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra rm: remove memory manager ioctl implementationsGary King
all memory manager functions should be ioctl'd on nvmap, not on nvrm; the implementation that was provided in nvrm was incomplete and potentially broken, in addition to being unnecessary. Change-Id: Ic08b4e21d9ea89093d4d0c6172538962632acf64 Reviewed-on: http://git-master/r/658 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02tegra power: Use the scheduler to figure out when to go into LP2tkasivajhula
Still being tested for performance. Change-Id: I5be5619f90ada7bd277b1c042cd1cb4de4ff5124 Reviewed-on: http://git-master/r/710 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-02tegra usb: Clean up of host initializationRama Kandhala
Usb host initialization code clean up for using native calls instead of Rm APIs. Change-Id: I98af3666f310cf44554f78bcdec47eb860d71f18 Reviewed-on: http://git-master/r/717 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-02tegra RM: Added NO-MIPI-PLL HDMI clocks configuration.Alex Frid
Added support for HDMI clocks configuration from PLLP (SD HDMI) or PLLC (HD HDMI). This option is selected automatically when DDK does *not* explicitly request MIPI PLLD as HDMI source. No changes in the PLLD based HDMI clock configuration when it is explicitly requested by DDK. Bug 656706. Change-Id: I3da656b6e5127fcd9f08ff48180584866c5c6b2f Reviewed-on: http://git-master/r/725 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Arthur Spence <aspence@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-02mmc.c: support ext_csd revisions in eMMCv4.4 specPavan Kunapuli
eMMC v4.4 cards report ext_csd version of 5. Mmc card enumeration fails for these cards. Included the latest version numbers. Change-Id: I5c6914ef8906eed80cba15249b0760d71e3d0255 Reviewed-on: http://git-master/r/734 Reviewed-by: Jitendra Aditya Lanka <jlanka@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-02[ALSA] Fixed buffer overrun & random crashesRavindra Lokhande
Replace NvOsSemaphore functions with linux semaphore. Fixed repeated playback of last few samples. Fixes bugs 652423, 652406 Change-Id: I679e67585a00884eb6169a39cb14dd5389e28ab8 Reviewed-on: http://git-master/r/706 Reviewed-by: Vijay Mali <vmali@nvidia.com> Tested-by: Vijay Mali <vmali@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-01tegra RM: Increased LP1 entry/exit frequencies.Alex Frid
Increased LP1 entry/exit frequencies to match core voltage target 1.0V (instead of pushing clocks into low corner). This would allow to reduce entry/exit time without compromising LP1 power. Change-Id: I30d6db88545a158a697db0c2b4ff705f55ce26f0 Reviewed-on: http://git-master/r/722 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-01tegra regulator: Add regulator driverVenkat Moganty
Adding regulator driver to set the pmu charging current limit for drawing the current through the USB charger/USB host. Bug 631316 Change-Id: I65581af883fd8b86c9ddd2ddf93aac9cc88d3f56 Reviewed-on: http://git-master/r/692 Reviewed-by: John Davis <jodavis@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-01tegra uart: Resetting baudrate variable if controller get reset.Laxman Dewangan
Resetting the baudrate variable which stores the current baudrate after resetting the controller. Change-Id: Ia1abf68738897941690644252dbc3d3e4bf6bb0f Reviewed-on: http://git-master/r/712 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-01tegra RM: Explicitly set core voltage on LP1 entry.Alex Frid
Explicitly set core voltage when DVFS is suspended to avoid LP1 entry at high voltage caused by "last minute" system activity. Change-Id: Iefa6ac3c0c76482871c9cd10d993c03a6a6c00c3 Reviewed-on: http://git-master/r/718 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-02-26tegra mmc: update card_detect before calling callbackGary King
the card detect callback needs card_detect to be set correctly in order to properly handle error cleanup when the card is removed during transfer. Change-Id: I6540f47875c56582edb4f62d4615687d59d67d93
2010-02-26Merge "tegra NVEC: Bus driver architecture for nvec drivers" into ↵Gary King
android-tegra-2.6.29
2010-02-26Merge "tegra touch: handle second finger transitions" into android-tegra-2.6.29Gary King
2010-02-26Merge "tegra-w1: Add support read_bit, write_bit and touch_bit routines ↵Gary King
Change-Id: I313de2e32b1dd64470ce7eb9f21a60c590e689c6" into android-tegra-2.6.29
2010-02-26Merge "Tegra-nand: Busy hints modification" into android-tegra-2.6.29Gary King
2010-02-26Merge "tegra uart: Removing the modification of the mctrl" into ↵Gary King
android-tegra-2.6.29
2010-02-26tegra NVEC: Bus driver architecture for nvec driversNinad Malwade
- nvec_user is the bus driver - tegra-nvec [keyboard], nvec_mouse [touchpad], nvec_battery are the client drivers for nvec. - verified: suspend-resume ordering: This is synchronous now. - Issues: after few suspend-resume EC is failed to suspend. [working on this issue] - Bug 648447 - Adding device_unregister for nvec bus driver. Change-Id: I3c30ceb50a89f67d71050089766897bd7691848d
2010-02-26Tegra-nand: Busy hints modificationvbyravarasu
Following modifications were done with this change list: 1. Modified the busy hints timeout period to 50ms so that CPU frequency is not held at 240 Mhz continuously. 2. Removed busy hints setting from SuspendClocks as it is no more required. 3. Set the CPU freq to 350 Mhz to compensate the performance drop observed due to controlling Nand clock with each access to the Nand flash. Frequency and timeout numbers were arrived by running read/write tests multiple times on Harmony with the aim to keep the performance as is. Bug 641677 - [AP20 \Harmony \ Android] Nand driver does not report idle when not in use reviewed by: bbiswas Change-Id: I27f9989c94ae7a9546a06ba1d572a7a0188ffb94
2010-02-25Merge "tegra pm: enable wake from EC keyboard (for harmony)" into ↵Gary King
android-tegra-2.6.29
2010-02-25tegra: support embedded controller clock rate besides 100 KHz.Vick Yu
bug 638587 Change-Id: I0957f019c1db5e22ed476dfb2c7b7caec5c20425
2010-02-25[tegra ALSA] replace enums by #defines in sndfx headerVijay Mali
In order to keep this file in sync with audiofx header file replcaing all enums by #defines, for better grouping of properties. As ALSA transoprt is tightly coupled to audiofx transport, adding a member in middle of existing enum was causing regressions in ALSA. #defines will allow adding new properties without breaking existing functionality. Change-Id: Iab57b14af3bcc318f6d83436ffecbc16808bb2ce
2010-02-25tegra-w1: Add support read_bit, write_bit and touch_bit routinesHoang Pham
Change-Id: I313de2e32b1dd64470ce7eb9f21a60c590e689c6
2010-02-25tegra ODM: Disabled SDIO card detection wake on Whistler.Alex Frid
Disabled SDIO card detection wake on Whistler, since it is triggering immediately after LP1 entry (bug 657116). Change-Id: Ib9a18680864d58bf026b097cdec9e84fb644f159
2010-02-25tegra mmc: Fixed data getting copied on write protected sdcardAbhishek Aggarwal
The issue was due to incorrect card present check in sdhci-tegra.c because of which the ro status of card was always returned as -1. This implied that host does not support reading ro switch and the card was assumed to be write enabled. Fixed by correcting the card present check. Bug 657078 ([AP20/Android/Whistler/Storage]: Able to copy data even though sdcard is write-protected)
2010-02-25tegra touch: handle second finger transitionsVarun Wadekar
second finger transitions were not being handled properly and due to this apps were not able to distinguish individual finger movements. tested on whistler with MultiTouch Visualizer Bug 653317 Change-Id: I34e07fe71f20e63a5dfa23582c9066d2cd3c74e2
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-12 04:13:08 +0000