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2012-08-03ARM: zImage: allow supplementing appended DTB with traditional ATAG dataNicolas Pitre
Some old bootloaders can't be updated to a device tree capable one, yet they provide ATAGs with memory configuration, the ramdisk address, the kernel cmdline string, etc. To allow a device tree enabled kernel to be used with such bootloaders, it is necessary to convert those ATAGs into FDT properties and fold them into the DTB appended to zImage. Currently the following ATAGs are converted: ATAG_CMDLINE ATAG_MEM ATAG_INITRD2 If the corresponding information already exists in the appended DTB, it is replaced, otherwise the required node is created to hold it. The code looks for ATAGs at the location pointed by the value of r2 upon entry into the zImage code. If no ATAGs are found there, an attempt at finding ATAGs at the typical 0x100 offset from start of RAM is made. Otherwise the DTB is left unchanged. Thisstarted from an older patch from John Bonesio <bones@secretlab.ca>, with contributions from David Brown <davidb@codeaurora.org>. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Chinmay Kamat <ckamat@nvidia.com> Change-Id: Ifb96adf6976da0f518c9c2cdad6be85f94c8ad1c Original: b90b9a38251e9c89c34179eccde57411ceb5f1aa Reviewed-on: http://git-master/r/107423 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-03ARM: zImage: Allow the appending of a device tree binaryJohn Bonesio
This patch provides the ability to boot using a device tree that is appended to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb). Signed-off-by: John Bonesio <bones@secretlab.ca> [nico: ported to latest zImage changes plus additional cleanups/improvements] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Chinmay Kamat <ckamat@nvidia.com> Change-Id: I93c54694a59b357eb550587b94c986dcb19ab954 Original: e2a6a3aafa9862c4a4b59f2a59b8f923d64a680e Reviewed-on: http://git-master/r/107422 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-01ARM: 7017/1: Use generic BUG() handlerVishal Singh
ARM uses its own BUG() handler which makes its output slightly different from other archtectures. One of the problems is that the ARM implementation doesn't report the function with the BUG() in it, but always reports the PC being in __bug(). The generic implementation doesn't have this problem. Currently we get something like: kernel BUG at fs/proc/breakme.c:35! Unable to handle kernel NULL pointer dereference at virtual address 00000000 ... PC is at __bug+0x20/0x2c With this patch it displays: kernel BUG at fs/proc/breakme.c:35! Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP ... PC is at write_breakme+0xd0/0x1b4 This implementation uses an undefined instruction to implement BUG, and sets up a bug table containing the relevant information. Many versions of gcc do not support %c properly for ARM (inserting a # when they shouldn't) so we work around this using distasteful macro magic. v1: Initial version to replace existing ARM BUG() implementation with something more similar to other architectures. v2: Add Thumb support, remove backtrace whitespace output changes. Change to use macros instead of requiring the asm %d flag to work (thanks to Dave Martin <dave.martin@linaro.org>) v3: Remove old BUG() implementation in favor of this one. Remove the Backtrace: message (will submit this separately). Rebase to linux-2.6.git master. v4: Allow BUGS in modules (these were not reported correctly in v3) (thanks to Stephen Boyd <sboyd@codeaurora.org> for suggesting that.) Remove __bug() as this is no longer needed. v5: Add %progbits as the section flags. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 87e040b6456fd3416a1f6831c1eedaef5c0a94ff) Change-Id: Ic7692288dff6e4a15c732eb030295bd196a87fb4 Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/117356 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Vishal Singh <vissingh@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> (cherry picked from commit 6708ffd0b44f4d09d8fe745471641545655091fb) Reviewed-on: http://git-master/r/119328 Reviewed-by: Bob Johnston <bjohnston@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-06-20ARM: config for PCIe frameworkVidya Sagar
Bug 815499 Change-Id: I6ce9a2bb4afbfd797fc5a0bf0d1027bdc0c1459d Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/109745 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-06ARM: Config for cpuquiet frameworkSai Charan Gurrappadi
Change-Id: I61b19497d88821f39cec8605f24028c7d7fda126 Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com> Reviewed-on: http://git-master/r/105268 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-21ARM: tegra: define/enable ARCH_HAS_SUSPEND_PAGETABLEChris Johnson
For Tegra, the CPU suspend code path installs its own 1:1 pagetable setup once at init time. This pagetable is used by all CPUs doing suspend/resume. We want to use the common ARM code for CPU suspend/resume, but don't want the MMU reenable code to patch the current pagetable as it's shared (and could cause problems if the pagetable loads/stores were were interleaved). The installed pagetable already covers the cpu_resume_turn_mmu_on VA, so we're able to just use the existing pagetable. This sets up the CONFIG option to skip this part of the MMU reenable. Bug 929856 Change-Id: Ibbac258122df6def7f7a2d511778a6f11d474938 Signed-off-by: Chris Johnson <cwj@nvidia.com> Reviewed-on: http://git-master/r/92350 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Ahung Cheng <ahcheng@nvidia.com> Tested-by: Ahung Cheng <ahcheng@nvidia.com> Reviewed-on: http://git-master/r/103205 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-04ARM: errata: 716044: an uncacheable load multiple can cause a deadlock.Krishna Reddy
Under some rare circumstances, an uncacheable load multiple instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause a processor deadlock. Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/95914 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-03-30arm: include: make module space configurableMursalin Akon
Make the module space a configurable option. The default value remains 16. The main goal of this CL is to enable large module, such as resman module of nvidia. Change-Id: I8a775a6a23c1a75562917d8ab8e4bbe29f08d7e5 Signed-off-by: Mursalin Akon <makon@nvidia.com> (cherry picked from commit 40aaad75bd32822137033fc7972d41ee30ff7bc9) Reviewed-on: http://git-master/r/91322 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Eric Brower <ebrower@nvidia.com> Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-02-22ARM: tegra: Reduce ARCH_NR_GPIOS to 512Dan Willemsen
We don't need 1024 gpios for our current platforms. Change-Id: Id0e27f56697b76c681315ef0701b1baca67ce52b Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83498 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-18ARM: 7240/1: Make ARCH_NR_GPIO a Kconfig variablePeter De Schrijver (NVIDIA)
Change ARCH_NR_GPIO into a Kconfig variable as suggested by Russel King. This makes ARCH_NR_GPIO single zImage friendly. The default value for tegra is defined as well. Upstream v3.3 commit 44986ab056076e9dc9fb9f8b4729afef7fa72616 Change-Id: Ia1ae996fc5209b22eb7ea942d90e86cfae56318e Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83219 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-15arch: arm: config: disabling pcie in defconfigJay Agarwal
Pcie powermanagement issues are yet to be resolved, so modifying the defconfig to not to enable the driver by default bug: 878874 Change-Id: Ie8787342b1ccf9e22486129633d15d566d50e4e0 Signed-off-by: Krishna Kishore <kthota@nvidia.com> Reviewed-on: http://git-master/r/64772 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-12-14Merge branch 'linux-3.1.5' into android-tegra-nv-3.1Varun Wadekar
Conflicts: arch/arm/Kconfig Change-Id: If8aaaf3efcbbf6c9017b38efb6d76ef933f147fa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-09ARM: 7161/1: errata: no automatic store buffer drainWill Deacon
commit 11ed0ba1754841316d4095478944300acf19acc3 upstream. This patch implements a workaround for PL310 erratum 769419. On revisions of the PL310 prior to r3p2, the Store Buffer does not automatically drain. This can cause normal, non-cacheable writes to be retained when the memory system is idle, leading to suboptimal I/O performance for drivers using coherent DMA. This patch adds an optional wmb() call to the cpu_idle loop. On systems with an outer cache, this causes an explicit flush of the store buffer. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-30Merge branch 'korg-android-tegra-3.1' into after-upstream-androidDan Willemsen
Conflicts: arch/arm/mach-tegra/Kconfig arch/arm/mach-tegra/board-ventana.c drivers/misc/Kconfig drivers/video/tegra/dc/hdmi.c Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-11-30ARM: errata: 752520: Faulty arbitration between PLD and Cacheable TLB ↵vdumpa
requests may create a system deadlock. Under rare circumstances, PLDs may interfere with a Cacheable page table walk, creating a processor deadlock. The erratum can only happen when the Data Cache and MMU are enabled, with the TLB descriptors marked as L1 cacheable, so that Page Table Walks are performed as cache linefills. This workaround sets a bit in the diagnostic register of the Cortex-A9, causing PLD operations treated as NOP. (cherry-picked from b501cafea7328bc578f67e3e846ab9d25b7ec1b0) Change-Id: Ic4039b83de43530bae7ce705162441bea74e1e98 Reviewed-on: http://git-master/r/54095 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Ra35e48e21c1d62b6480a9d67d1413dd5d0df3f53
2011-11-30ARM: Cortex-A9: Enable dynamic clock gatingTodd Poynor
Enable dynamic high level clock gating for Cortex-A9 CPUs, as described in 2.3.3 "Dynamic high level clock gating" of the Cortex-A9 TRM. This may cut the clock of the integer core, system control block, and Data Engine in certain conditions. Add ARM errata 720791 to avoid corrupting the Jazelle instruction stream on earlier Cortex-A9 revisions. Original-Change-Id: I48e51d907e593f26982ea91b0a811553f68e3c86 Signed-off-by: Todd Poynor <toddpoynor@google.com> Rebase-Id: R7ae4d4825e9171bca2471fe776ecf363e75b9ca6
2011-11-30Merge branch 'korg-android-3.1' into korg-android+linux-tegra-3.1Dan Willemsen
Conflicts: arch/arm/mm/cache-l2x0.c drivers/misc/Kconfig drivers/misc/Makefile Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-11-30ARM: add option to flush console before rebootDima Zavin
If the console_lock was held while the system was rebooted, the messages in the temporary logbuffer would not have propogated to all the console drivers. This force releases the console lock if it failed to be acquired. Change-Id: I193dcf7b968be17966833e50b8b8bc70d5d9fe89 Signed-off-by: Dima Zavin <dima@android.com>
2011-11-30[ARM] tegra: add FIQ supportIliyan Malchev
Signed-off-by: Iliyan Malchev <malchev@google.com>
2011-11-30[ARM] tegra: Add arch-specific udelay using TMRUSColin Cross
Change-Id: If075117642a725ee2ee24a622068274e588a5bc1 Signed-off-by: Colin Cross <ccross@android.com>
2011-11-30[ARM] Add ARCH_PROVIDES_UDELAY config optionColin Cross
Change-Id: Ife690c9d055fc0f17a52d2b29048af5062a664a6 Signed-off-by: Colin Cross <ccross@android.com>
2011-09-17ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeedWill Deacon
This patch implements a workaround for erratum 764369 affecting Cortex-A9 MPCore with two or more processors (all current revisions). Under certain timing circumstances, a data cache line maintenance operation by MVA targeting an Inner Shareable memory region may fail to proceed up to either the Point of Coherency or to the Point of Unification of the system. This workaround adds a DSB instruction before the relevant cache maintenance functions and sets a specific bit in the diagnostic control register of the SCU. Cc: <stable@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss ↵Catalin Marinas
enabled This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible cache data corruption with hit-under-miss enabled). It sets the undocumented bit 31 in the auxiliary control register and the FI bit in the control register, thus disabling hit-under-miss without putting the processor into full low interrupt latency mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-10ARM: drop experimental status for ARM_PATCH_PHYS_VIRTRussell King
This has now been well tested, and several platforms are now selecting this directly. It's time to drop its experimental status. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-28Merge branch 'imx/dt' into next/dtArnd Bergmann
2011-07-28irq: add irq_domain translation infrastructureGrant Likely
This patch adds irq_domain infrastructure for translating from hardware irq numbers to linux irqs. This is particularly important for architectures adding device tree support because the current implementation (excluding PowerPC and SPARC) cannot handle translation for more than a single interrupt controller. irq_domain supports device tree translation for any number of interrupt controllers. This patch converts x86, Microblaze, ARM and MIPS to use irq_domain for device tree irq translation. x86 is untested beyond compiling it, irq_domain is enabled for MIPS and Microblaze, but the old behaviour is preserved until the core code is modified to actually register an irq_domain yet. On ARM it works and is required for much of the new ARM device tree board support. PowerPC has /not/ been converted to use this new infrastructure. It is still missing some features before it can replace the virq infrastructure already in powerpc (see documentation on irq_domain_map/unmap for details). Followup patches will add the missing pieces and migrate PowerPC to use irq_domain. SPARC has its own method of managing interrupts from the device tree and is unaffected by this change. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-26Merge branch 'next/devel' of ↵Linus Torvalds
ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits) ARM: S5P64X0: External Interrupt Support ARM: EXYNOS4: Enable MFC on Samsung NURI ARM: EXYNOS4: Enable MFC on universal_c210 ARM: S5PV210: Enable MFC on Goni ARM: S5P: Add support for MFC device ARM: EXYNOS4: Add support FIMD on SMDKC210 ARM: EXYNOS4: Add platform device and helper functions for FIMD ARM: EXYNOS4: Add resource definition for FIMD ARM: EXYNOS4: Change devname for FIMD clkdev ARM: SAMSUNG: Add IRQ_I2S0 definition ARM: SAMSUNG: Add platform device for idma ARM: EXYNOS4: Add more registers to be saved and restored for PM ARM: EXYNOS4: Add more register addresses of CMU ARM: EXYNOS4: Add platform device for dwmci driver ARM: EXYNOS4: configure rtc-s3c on NURI ARM: EXYNOS4: configure MAX8903 secondary charger on NURI ARM: EXYNOS4: configure ADC on NURI ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs ... Fix up tons of silly conflicts: - arch/arm/mach-davinci/include/mach/psc.h - arch/arm/mach-exynos4/Kconfig - arch/arm/mach-exynos4/mach-smdkc210.c - arch/arm/mach-exynos4/pm.c - arch/arm/mach-imx/mm-imx1.c - arch/arm/mach-imx/mm-imx21.c - arch/arm/mach-imx/mm-imx25.c - arch/arm/mach-imx/mm-imx27.c - arch/arm/mach-imx/mm-imx31.c - arch/arm/mach-imx/mm-imx35.c - arch/arm/mach-mx5/mm.c - arch/arm/mach-s5pv210/mach-goni.c - arch/arm/mm/Kconfig
2011-07-26Merge branch 'next/cross-platform' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: Consolidate the clkdev header files ARM: set vga memory base at run-time ARM: convert PCI defines to variables ARM: pci: make pcibios_assign_all_busses use pci_has_flag ARM: remove unnecessary mach/hardware.h includes pci: move microblaze and powerpc pci flag functions into asm-generic powerpc: rename ppc_pci_*_flags to pci_*_flags Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
2011-07-26Merge branch 'next/soc' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: MAINTAINERS: add maintainer of CSR SiRFprimaII machine ARM: CSR: initializing L2 cache ARM: CSR: mapping early DEBUG_LL uart ARM: CSR: Adding CSR SiRFprimaII board support OMAP4: clocks: Update the clock tree with 4460 clock nodes OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts OMAP4: ID: add omap_has_feature for max freq supported OMAP: ID: introduce chip detection for OMAP4460 ARM: Xilinx: merge board file into main platform code ARM: Xilinx: Adding Xilinx board support Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
2011-07-25Merge branch 'next/deletion' of ↵Linus Torvalds
git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/deletion' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: mach-loki: delete ARM: mach-s3c2400: delete ARM: mach-s3c24a0: delete
2011-07-25Merge branch 'next/cleanup' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits) ARM: EXYNOS4: Change devname for FIMD clkdev ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210 ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100 ARM: S3C24XX: Use generic s3c_set_platdata for devices ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND ARM: SAMSUNG: Use generic s3c_set_platdata for NAND ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON ARM: SAMSUNG: Use generic s3c_set_platdata for FB ARM: SAMSUNG: Use generic s3c_set_platdata for TS ARM: S3C64XX: Add PWM backlight support on SMDK6410 ARM: S5P64X0: Add PWM backlight support on SMDK6450 ARM: S5P64X0: Add PWM backlight support on SMDK6440 ARM: S5PC100: Add PWM backlight support on SMDKC100 ARM: S5PV210: Add PWM backlight support on SMDKV210 ARM: EXYNOS4: Add PWM backlight support on SMDKC210 ARM: EXYNOS4: Add PWM backlight support on SMDKV310 ARM: SAMSUNG: Create a common infrastructure for PWM backlight support clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0 ... Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c
2011-07-24Merge branch 'next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] s5pv210: make needlessly global symbols static [CPUFREQ] exynos4210: make needlessly global symbols static [CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation [CPUFREQ] S5PV210: Add reboot notifier to prevent system hang [CPUFREQ] S5PV210: Adjust udelay prior to voltage scaling down [CPUFREQ] S5PV210: Lock a mutex while changing the cpu frequency [CPUFREQ] S5PV210: Add pm_notifier to prevent system unstable [CPUFREQ] S5PV210: Add arm/int voltage control support [CPUFREQ] S5PV210: Add additional symantics for "relation" in cpufreq with pm [CPUFREQ] S3C64xx: Notify transition complete as soon as frequency changed [CPUFREQ] S3C6410: Support 800MHz operation in cpufreq [CPUFREQ] s5pv210-cpufreq.c: Add missing clk_put [CPUFREQ] Move compile for S3C64XX cpufreq to /drivers/cpufreq [CPUFREQ] Remove some vi noise that escaped into the Makefile. [CPUFREQ] Move ARM Samsung cpufreq drivers to drivers/cpufreq/ [CPUFREQ/S3C64xx] Move S3C64xx CPUfreq driver into drivers/cpufreq [CPUFREQ] Handle CPUs with different capabilities in acpi-cpufreq
2011-07-24Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
2011-07-22Merge branch 'devel-stable' into for-nextRussell King
Conflicts: arch/arm/kernel/entry-armv.S
2011-07-21Merge branch 'next-samsung-devel' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/devel
2011-07-21Merge branch 'next-samsung-cleanup' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
2011-07-21ARM: S5P: Add support for MFC deviceKamil Debski
Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210: - clock support - memory mapping and reserving - s5p_device_mfc platform device Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-21clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0Chanwoo Choi
Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to the generic mmio clocksource infrastructure Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-21ARM: EXYNOS4: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> [kgene.kim@samsung.com: removed changes of mach-exynos4/time.c] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-20ARM: S5PV210: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-20ARM: S5PC100: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-20ARM: S5P64X0: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-20ARM: S3C64XX: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-20ARM: S3C24XX: Add clkdev supportThomas Abraham
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-19ARM: Consolidate the clkdev header filesKyungmin Park
Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-07-18ARM: mach-loki: deleteNicolas Pitre
This was introduced more than 3 years ago, and since then only generic janitorial changes were made without further addition of actual support for "real" devices. This is therefore a cost with no benefits to keep in the tree. If someone wishes to revive this code, it is always possible to retrieve it from the Git repository. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> CC: Ke Wei <kewei@marvell.com> CC: Saeed Bishara <saeed@marvell.com> CC: Lennert Buytenhek <buytenh@wantstofly.org>
2011-07-18ARM: mach-s3c2400: deleteNicolas Pitre
On Tue, 28 Jun 2011, Ben Dooks wrote: > On Tue, Jun 28, 2011 at 11:22:57PM +0200, Arnd Bergmann wrote: > > > On a related note, what about mach-s3c2400? It seems to be even more > > incomplete. > > Probably the same fate awaits that. It is so old that there's little > incentive to do anything with it. So out it goes as well. The PORT_S3C2400 definition in include/linux/serial_core.h is left there to prevent a reuse of the same number for another port type. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-07-17Merge branch 'zynq/master' of ↵Arnd Bergmann
git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/soc Conflicts: arch/arm/Kconfig arch/arm/mm/Kconfig
2011-07-17Merge branches 'cns3xxx/devel', 'davinci/devel', 'imx/devel', ↵Arnd Bergmann
'lpc32xx/devel', 'pxa/devel', 'tegra/devel' and 'stericsson/master' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/devel
2011-07-13[CPUFREQ] Move compile for S3C64XX cpufreq to /drivers/cpufreqKukjin Kim
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Dave Jones <davej@redhat.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-15 17:12:57 +0000