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2014-07-09ARM: dts: dra7: add routable-irqs property for gic nodeR Sricharan
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-17ARM: dts: dra7-evm: remove interrupt bindingSourav Poddar
The qspi node defines crossbar number as its interrupt number. But, the crossbar dts patches are not yet there, this causes a warning during boot. So interrupts = < > property should be removed from DT and added later by crossbar series. Reported-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-16ARM: DTS: dra7/dra7xx-clocks: ATL related changesPeter Ujfalusi
Modify the clock nodes for the ATL clocks to use the ATL clock driver to handle them. Add the ATL device node at the same time for DRA7. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-02Merge tag 'dt-for-3.16' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
2014-05-19ARM: dts: dra7: add support for parallel NAND flashMinal Shah
DRA7xx platform has in-build GPMC and ELM h/w engines which can be used for accessing externel NAND flash device. This patch: - adds generic DT binding in dra7.dtsi for enabling GPMC and ELM h/w engines - adds DT binding for Micron NAND Flash (MT29F2G16AADWP) present on dra7-evm *Important* On DRA7 EVM, GPMC_WPN and NAND_BOOTn are controlled by DIP switch So following board settings are required for NAND device detection: SW5.9 (GPMC_WPN) = LOW SW5.1 (NAND_BOOTn) = HIGH Signed-off-by: Minal Shah <minalkshah@gmail.com> Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-14ARM: dts: dra7: Add USB related nodesRoger Quadros
Add nodes for the Super Speed USB controllers, omap-control-usb, USB2 PHY and USB3 PHY devices. Remove ocp2scp1 address space from hwmod data as it is now provided via device tree. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-14ARM: dts: dra7: add OCP2SCP3 and SATA nodesBalaji T K
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY. [Roger Q] Clean up. Updated IRQ for interrupt crossbar. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-08Merge branch 'pull/l3noc/dts-fixes' of ↵Tony Lindgren
https://github.com/nmenon/linux-2.6-playground into omap-for-v3.16/fixes-not-urgent
2014-05-06ARM: dts: dra7: Add qspi deviceSourav Poddar
These add device tree entry for qspi controller driver on dra7-evm. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-06ARM: dts: Add support for DRA72x family of devicesRajendra Nayak
DRA722 is part of DRA72x family which are single core cortex A15 devices with most infrastructure IPs otherwise same as whats on the DRA74x family. So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively. Also add a minimal dra72-evm dts file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: linux-doc@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> [tony@atomide.com: updated for Makefile sorting] Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-05ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-nocRajendra Nayak
We have currently marked the DRA7 L3 as being compatible with omap4-l3-noc This is not true considering the differences in data involved. Now that we have proper support for ti,dra7-l3-noc, add the clock modules clk1 and clk3 (clk2 submodule will be handled by the driver) and switch compatibility flag to use the proper data. Signed-off-by: Rajendra Nayak <ranayak@ti.com> [nm@ti.com: map up full address range] Signed-off-by: Nishanth Menon <nm@ti.com>
2014-04-18ARM: dts: Grammar /that will/it will/Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-18ARM: dts: Grammar /is uses/ is used/Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-09Merge tag 'mmc-updates-for-3.15-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.15: Core: - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V - Add GPIO descriptor based slot-gpio card detect API Drivers: - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c - mmci: Support HW busy detection on ux500 - omap: Support MMC_ERASE - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23 - rtsx: Support pre-req/post-req async - sdhci: Add support for Realtek RTS5250 controllers - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs" * tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits) mmc: sdhci-acpi: Intel SDIO has broken card detect mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller mmc: sdhci-msm: Add platform_execute_tuning implementation mmc: sdhci-msm: Initial support for Qualcomm chipsets mmc: sdhci-msm: Qualcomm SDHCI binding documentation sdhci: only reprogram retuning timer when flag is set mmc: rename ARCH_BCM to ARCH_BCM_MOBILE mmc: sdhci: Allow for irq being shared mmc: sdhci-acpi: Add device id 80860F16 mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14 mmc: slot-gpio: Add GPIO descriptor based CD GPIO API mmc: slot-gpio: Split out CD IRQ request into a separate function mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform" mmc: sdhci-spear: use generic card detection gpio support mmc: sdhci-spear: remove support for power gpio mmc: sdhci-spear: simplify resource handling mmc: sdhci-spear: fix platform_data usage mmc: sdhci-spear: fix error handling paths for DT mmc: sdhci-bcm-kona: fix build errors when built-in ...
2014-03-05ARM: dts: DRA7: Add device nodes for ABBNishanth Menon
Add ABB device nodes for DRA7 family of devices. Data is based on DRA7 Technical Reference Manual revision I (Sept 2013) Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-04ARM: dts: add pbias dt nodeBalaji T K
Add pbias regulator node as a child of system control module - syscon. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-03-02Merge tag 'for_3.15/dts_signed' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.15/dt Add craneboard devices Add more N900 devices Add am43x-epos-evm and am437x-gp-evm devices Add OMAP4 DMM devices Conflicts: arch/arm/boot/dts/am43x-epos-evm.dts arch/arm/boot/dts/dra7.dtsi
2014-03-02ARM: dts: omap4+: Add DMM bindingsArchit Taneja
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices. DMM only requires address and irq information. Add documentation for the DMM bindings. Originally worked on by Andy Gross <andygro@gmail.com> Cc: Andy Gross <andygro@gmail.com> Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2014-02-28ARM: dts: OMAP3+: add clock nodes for CPUNishanth Menon
OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock. OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use dpll_mpu clock. Latency used is the generic latency defined in omap-cpufreq driver. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-28ARM: dts: DRA7: Add hwspinlock nodeSuman Anna
Add the hwspinlock device tree node for DRA7 SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-17ARM: dts: dra7 clock dataTero Kristo
This patch creates a unique node for each clock in the DRA7 power, reset and clock manager (PRCM). TODO: apll_pcie clock node is still a dummy in this version, and proper support for the APLL should be added. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-10-22ARM: dts: DRA7: Add CPU OPP tableJ Keerthy
Add DT OPP table for DRA7xx family of devices. This data is decoded by OF with of_init_opp_table() helper function. The data is based on DRA75x, DRA74x Data Manual revision F (Sept 2013). TODO: add OPP_HIGH after AVS-Class0 is functional NOTE: The voltage and frequency values work well only on NOM samples and it is mandatory to use ABB/AVS Class 0 support for all OPPs. Clock nodes are pending clock node alignment. [nm@ti.com: cleanups and rebase to latest] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-22ARM: dts: dra7-evm: add smps123 supply for CPUJ Keerthy
regulator smps123 supply from Palmas PMIC powers CPU0 on DRA7 EVM. [nm@ti.com: rebase to latest] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-22ARM: dts: OMAP3+: Add i2c aliasesNishanth Menon
Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl dependencies. This changes the i2c ID each bus is registered with in i2c-dev interface. As a result of this, many userspace tools break and there is no consistent manner to fix the same if the i2c dev interface have no consistent numbering. Since this could happen for other OMAP derivatives, provide i2c alias for all OMAP3+ SoCs to allow ordering the i2c devices correctly. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-08ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm boardR Sricharan
Add minimal device tree source needed for DRA7 based SoCs. Also add a board dts file for the dra7-evm (based on dra752) which contains 1.5G of memory with 1G interleaved and 512MB non-interleaved. Also added in the board file are pin configuration details for i2c, mcspi and uart devices on board. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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