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path: root/arch/arm/boot/dts/stih415.dtsi
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2015-01-11stmmac: dwmac-sti: Pass sysconfig register offset via syscon dt property.Peter Griffin
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, we should not be mixing address spaces in the reg property like this driver currently does. This patch updates the driver, dt docs and also the existing dt nodes to pass the sysconfig offset in the syscon dt property. This patch breaks DT compatibility! But this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-31ARM: STi: DT: Add sdhci controller for stih415Peter Griffin
This patch adds device tree config for the sdhci controller on the stih415 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-17ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6Peter Griffin
This patch fixes two problems: - 1) The device tree isn't currently providing sti-ethclk which is required by the dwmac glue code to correctly configure the ethernet PHY clock speed. This means depending on what the bootloader/jtag has configured this clock to, and what switch/hub the board is plugged into you most likely will NOT successfully negotiate a ethernet link. 2) The stmmaceth clock was associated with the wrong clock. It was referencing the PHY clock rather than the interconnect clock which clocks the IP. This patch also brings us closer to not having to boot the upstream kernel with the clk_ignore_unused parameter. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-21ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12Gabriel FERNANDEZ
Patch adds DT entries for clockgen A0/1/10/11/12 Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-21ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysinGabriel FERNANDEZ
all-caps node name is not very usual. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-21ARM: STi: DT: add keyscan for stih415Gabriel FERNANDEZ
Add keyscan support for stih415. It is put disabled by default because it is not enabled on all boards Also there are PIOs conflict with already claimed lines. Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-03-11ARM: STi: STIH415: Add IR support.Srinivas Kandagatla
This patch adds IRB support to STiH415 platforms. Tested on B2000 and B2020 development boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2014-03-11ARM: STi: STiH415: Add ethernet support.Srinivas Kandagatla
This patch adds support to STiH415 SOC, which has two ethernet snps,dwmac controllers version 3.610. With this patch B2000 and B2020 boards can boot with ethernet in MII and RGMII modes. Tested on both B2020 and B2000. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2014-03-11ARM: STi: STiH415: Add soft reset controller support.Srinivas Kandagatla
This patch adds soft reset controller support for STiH415 and adds new softreset lines required for other device tree nodes in the header file. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2014-03-11ARM: STi: STiH415: Add reset controller support.Srinivas Kandagatla
This patch adds a reset controller node to the SOC device tree and also adds new header files with reset lines required for other device tree nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2013-12-04ARM: STi: Supply I2C configuration to STiH415 SoCMaxime COQUELIN
This patch supplies I2C configuration to STiH415 SoC. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2013-06-25ARM: sti: Add STiH415 SOC supportSrinivas Kandagatla
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>