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this patch adds A9-M4 power management, including
below features:
1. busfreq: M4 is registered as a high speed device
of A9, when M4 is running at high speed, busfreq
will NOT enter low bus mode, when M4 is entering
its low power idle, A9 will be able to enter low
bus mode according to its state machine;
2. low power idle: only when M4 is in its low power
idle, busfreq is staying at low bus mode, low
power idle is available for kernel;
3. suspend: when M4 is NOT in its low power idle,
when linux is about to suspend, it will only
force SOC enter WAIT mode, only when M4 is in
its low power idle in TCM, linux suspend can
enter DSM mode. M4 can request/release wakeup
source via MU to A9.
as M4 can NOT switch its clk parent due to glitch MUX,
to handle this case, A9 will help switch M4's clk
parent, the flow is as below:
M4:
1. enter low power idle, send bus use count-- to A9;
2. enter wfi and only wait for MU interrupt;
3. receive A9's clk switch ready message, go into low
power idle;
4. receive interrupt to exit low power idle, send request
to A9 for increase busfreq and M4 freq, enter wfi
and only wait for MU interrupt;
5. receive A9 ready message, go out of low power idle.
A9:
1. when receive M4's message of entering low power idle,
wait M4 into wfi, hold M4 in wfi by hardware, gate
M4 clk, then switch M4's clk to OSC, ungate M4 clk,
send ready command to wake up M4 into low power idle;
2. when receive M4's message of exiting low power idle,
wait M4 into wfi, hold M4 in wfi by hardware, gate
M4 clk, then switch M4's clk to origin high clk,
ungate M4 clk, send ready command to wake up M4
to exit low power idle;
Signed-off-by: Anson Huang <b20788@freescale.com>
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1. improve imx6q_set_int_mem_clk_lpm routine;
2. export rbc enable interface for cpuidle;
3. enable low power idle for i.MX6SX:
WFI -> first level idle;
WAIT mode -> second level idle;
Low power idle -> third level idle, only when system is in low bus mode.
In low powe idle mode, below operations will be done:
ARM power off;
AHB freq lower to 3MHz;
PERCLK freq lower to 6MHz;
MMDC freq lower to 1MHz;
Anatop will be put into low power mode, and regular band-gap will
be off and low power band-gap will be enabled instead.
Also, in low power idle mode, 24MHz XTAL power will be off and 24MHz clk
source will be switched to RC-OSC to save power, this feature is only
enabled on i.MX6SX TO1.2.
Signed-off-by: Anson Huang <b20788@freescale.com>
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