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2019-03-28Merge remote-tracking branch 'remotes/fslc/4.9-2.3.x-imx' into ↵Colibri-iMX7_LXDE-Image_2.8b6.184-20190401Colibri-iMX6_LXDE-Image_2.8b6.184-20190401Colibri-iMX6ULL_LXDE-Image_2.8b6.184-20190401Apalis-iMX6_LXDE-Image_2.8b6.184-20190401Marcel Ziswiler
toradex_4.9-2.3.x-imx-next
2019-03-28Merge tag 'v4.9.166' into 4.9-2.3.x-imxMarcel Ziswiler
This is the 4.9.166 stable release
2019-01-13ARM: imx: update the cpu power up timing setting on i.mx6sxAnson Huang
[ Upstream commit 1e434b703248580b7aaaf8a115d93e682f57d29f ] The sw2iso count should cover ARM LDO ramp-up time, the MAX ARM LDO ramp-up time may be up to more than 100us on some boards, this patch sets sw2iso to 0xf (~384us) which is the reset value, and it is much more safe to cover different boards, since we have observed that some customer boards failed with current setting of 0x2. Fixes: 05136f0897b5 ("ARM: imx: support arm power off in cpuidle for i.mx6sx") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2018-12-24arm: imx: fix handling power stuff without psciMarcel Ziswiler
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-24arm: imx: gpc: do not poweroff M/F mix in suspendMax Krummenacher
The Colibri iMX6ULL 256MB crashes in resume if the M/F mix domain is powered down when suspending. With this workaround this does not happen. Crash looks as follows: root@colibri-imx6ull:~# echo +3 > /sys/class/rtc/rtc1/wakealarm; echo mem > /sys/power/state [ 52.800741] PM: Syncing filesystems ... done. [ 52.856715] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 52.865669] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 52.875024] Suspending console(s) (use no_console_suspend to debug) [ 52.950638] PM: suspend of devices complete after 68.211 msecs [ 52.952506] PM: late suspend of devices complete after 1.835 msecs [ 52.954292] PM: noirq suspend of devices complete after 1.757 msecs [ 52.954300] Disabling non-boot CPUs ... [ 52.954307] Turn off M/F mix! [ 52.955663] PM: noirq resume of devices complete after 1.222 msecs [ 52.956767] imx-sdma 20ec000.sdma: loaded firmware 3.3 [ 52.957669] PM: early resume of devices complete after 1.411 msecs [ 52.959140] gpmi-nand 1806000.gpmi-nand: use legacy bch geometry [ 53.005653] Suspended for 2.907 seconds [ 53.012207] PM: resume of devices complete after 54.507 msecs [ 53.073751] Restarting tasks ... done. root@colibri-imx6ull:~# [ 55.049753] gpmi-nand 1806000.gpmi-nand: DMA timeout, last DMA :2 [ 55.056377] gpmi-nand 1806000.gpmi-nand: Show GPMI registers : [ 55.062835] gpmi-nand 1806000.gpmi-nand: offset 0x000 : 0x00000000 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-12-24ARM: imx: mach-imx7d: configure clock source per FEC instanceStefan Agner
Configure Ethernet clock source for each FEC instance individually. This allows to use different clock source setting for the two FEC controllers. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-24ARM: imx: mach-imx7d: put external ethernet clock in error caseStefan Agner
Exit early in case General-Purpose Registers are missing. This makes sure that clock is always freed properly (clk_put). Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-24ARM: imx: gpc: Fix undefined references when using GPCv2Stefan Agner
When compiling a kernel with only GPCv2 support (e.g. only for i.MX 7) linking fails with the following errors: arch/arm/mach-imx/built-in.o: In function `imx_anatop_pre_suspend': platform-imx-dma.c:(.text+0xf50): undefined reference to `imx_gpc_usb_wakeup_enabled' platform-imx-dma.c:(.text+0xf5c): undefined reference to `imx_gpc_enet_wakeup_enabled' arch/arm/mach-imx/built-in.o: In function `imx_anatop_post_resume': platform-imx-dma.c:(.text+0x10cc): undefined reference to `imx_gpc_usb_wakeup_enabled' platform-imx-dma.c:(.text+0x10d8): undefined reference to `imx_gpc_enet_wakeup_enabled' Make sure the function exist even if GPC(v1) is not compiled in. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-12-24imx: Fix 'Expose SoC unique ID' for newer i.MX6Max Krummenacher
i.MX6 SL/UL/ULL use a different node in the device tree for with ocotp. So change to the relevant compatible string for these SoCs. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit 7b02a99744e495f630bdb5081c516d40e8112685)
2018-12-24busfreq-imx: only use existing global variablesMax Krummenacher
The struct arm_reg and soc_reg are declared in by a extern statement in include/linux/busfreq-imx.h. However they are only declared when imx6-cpufreq.c is compiled and linked. Qualify the use of arm_reg and soc_reg with the relevant config option and change KConfig to switch that option on for the SoCs which use it. This fixes the following build issue when building for i.MX 7 with option ARM_IMX6Q_CPUFREQ not set: arch/arm/mach-imx/built-in.o: In function `imx6ull_lower_cpu_rate': platform-imx-dma.c:(.text+0x5514): undefined reference to `arm_reg' platform-imx-dma.c:(.text+0x551c): undefined reference to `arm_reg' platform-imx-dma.c:(.text+0x553c): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x5544): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x5598): undefined reference to `arm_reg' platform-imx-dma.c:(.text+0x55a0): undefined reference to `arm_reg' platform-imx-dma.c:(.text+0x55ac): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x55b4): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x55c8): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x55d0): undefined reference to `soc_reg' platform-imx-dma.c:(.text+0x55f0): undefined reference to `arm_reg' platform-imx-dma.c:(.text+0x55f8): undefined reference to `arm_reg' Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com> (cherry picked from commit 3f68dc7c600c0354f5df7f06b931661319addafb)
2018-12-24ARM: imx: spare the first 16KiB of OCRAM_S for Cortex-M4Stefan Agner
The Cortex-M4 boot vector table is located in the OCRAM_S. When building a firmware with a complete vector table at 0x00000000 Linux overwrites the vector table with suspend information. Use the higher 16KiB for suspend related information so that we can use the lower 16KiB for the Cortex-M4 core. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit a8e0d437843393309b6db46c0e19f9da0b5d213b)
2018-12-24apalis-imx6: use stopmode for poweroffMax Krummenacher
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 051ee1a1c24058db62f10a177b1271daebbd2ebe)
2018-12-24pm-imx6.c: fix power off by stop modeMax Krummenacher
With the 3.14.28 release of the kernel imx6_stop_mode_poweroff() does not enter stop mode. Thus the function does not switch of power but returns. This seems to be caused by the second processor which has been stopped. Set the WFI event mask for the stopped processor works around the issue. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry-picked from commit 2acff0eaece38533e85e08431e7ae9f3027c677a) (cherry picked from commit 894914718e9e563eb601e0090e1ae2ddadf426a9)
2018-12-24colibri-imx6: use stopmode for poweroffMax Krummenacher
After the system has been shutdown with PMIC_ON_REQ and VCC_BATT is supplied from a battery it will never restart either by RESET or power cycle. So use the PMIC_STBY_REQ after shutdown to switch off power rails. Conflicts: arch/arm/mach-imx/pm-imx6.c drivers/regulator/pfuze100-regulator.c (cherry-picked from commit c8b186404065c4502b485820ad4a51515924795c) (cherry-picked from commit ee4c5c4da3b32f65528a2d523ca4bce574dee3c5) Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 29ff2389ecf7cb4e30924c80b8d42165cf306936)
2018-12-24ARM: imx: mu: let Cortex-M4 know about A7 stateStefan Agner
Introduce two new messages to let the Cortex-M4 know in what state the Linux system is in. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit a86db1f7117a62019106e343ff894c6bd4da053d)
2018-12-24ARM: imx: busfreq: do not force high frequency during suspendStefan Agner
If the M4 core is running and in a low frequency mode, the A7 core should make sure that the AXI bus is left in a low frequency mode when entering suspend. So far the code unconditionally increased the high frequency variable which essentially forced the AXI bus to run in high frequency mode when entering suspend. With this change we leave the system in the state it was last in and also make sure that the last state change is actually applied before going to sleep. Typically high_bus_count ends up to be 0 because all devices requiring a high bus frequency release the bus during suspend, allowing the AXI bus to switch to 24MHz only. If the M4 is not running we don't want to artificially slow down the suspend process, hence let the bus run at full speed (it will get disabled anyway by hardware mechanism). Similar, when the M4 is running at high speed we likely need the bus capacity. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 9e05354060550645ad21a0455468e142c7fdb201)
2018-12-24ARM: imx: busfreq: initialize M4 frequency depending boot stateStefan Agner
Set low frequency state in case M4 start with 24MHz. This makes sure that Linux is aware of the M4 state and makes sure the bus frequency is not accidentally increased during suspend (bus_freq_pm_notify). Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 70f901b01c4ac4dfe741f91b76967a433674a37d)
2018-12-24imx: Expose SoC unique IDBhuvanchandra DV
Expose SoC unique ID read from OCOTP registers. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit 9090b5b90ccc350611a769230eab3fbc20c9d302)
2018-12-24mach-imx6q.c: handle RESET_MOCI when PCIe is disabledMax Krummenacher
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 02110528b45ae331d89f7e7bb6a29b5494ec0be1) (cherry picked from commit 8d07763eb1d6a2a11e9b237ac94b8de43183b02e) Conflicts: arch/arm/mach-imx/mach-imx6q.c (cherry picked from commit bea05755680df306e93e5a13f730fd1db203f947)
2018-12-13mach-imx7d.c: use enet_out clk to decide on PHY clockMax Krummenacher
The i.MX 7 can provide a reference clock to the PHY or use a reference clock from an external circuit. If the device-tree node with compatible "fsl,imx7d-fec" has a clock named enet_out then provide the clock from the i.MX 7, if such a clock is missing use a clock provided from an external circuit. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit 73c06d69321c45b69ffc864cbaaa7143da87d186) (cherry picked from commit d46df0826a9f948f05b71da80aa9397cb9337537)
2018-12-13ARM: imx: enet1: output reference clockMax Krummenacher
Enable output driver of Ethernet reference clock. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit dab46121a94916a253d7283c8b85ea6dcfb6e628) (cherry picked from commit 0adde3fe0129ae91e71e079c495b5c28974663c8)
2018-08-24MLK-19149 ARM: imx: fix low bus mode hang on i.MX7DAnson Huang
Per design requirement, AHB clock parent switch and divider change needs to keep previous/current parent enabled but when we switch the clock parent, previous AHB clock parent may be disabled by common clock framework if the use count is 0, so here we have to make sure AHB's previous parent pfd2_270m is enabled during AHB set rate. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
2018-08-24MLK-19047-2 ARM: imx: busfreq: Prevent double reduce_bus_freqLeonard Crestez
The low_bus_freq_handler can be scheduled again between when it starts executing and when it takes the bus_freq_mutex. This can result in calling reduce_bus_freq twice as shown in the following trace: [ 762.101949] set_low_bus_freq(743): begin [ 762.101971] set_low_bus_freq(768): schedule low_bus_freq [ 762.114111] set_low_bus_freq(771): scheduled low_bus_freq [ 765.125161] reduce_bus_freq_handler(722): lock... [ 765.125174] bus_freq_daemon_handler(1043): lock... [ 765.125191] bus_freq_daemon_handler(1048): call set_low_bus_freq [ 765.125200] set_low_bus_freq(743): begin [ 765.125210] set_low_bus_freq(768): schedule low_bus_freq [ 765.125228] set_low_bus_freq(771): scheduled low_bus_freq [ 765.125239] bus_freq_daemon_handler(1052): unlock... [ 765.160624] reduce_bus_freq_handler(726): call reduce [ 765.166952] reduce_bus_freq(685): begin [ 765.170865] busfreq_notify(159): notify low enter [ 765.176095] Bus freq set to 24000000 start... [ 765.182731] Bus freq set to 24000000 done! cpu=0 [ 765.192646] imx_busfreq soc:busfreq: Bus freq set to low mode. Count: high 0, med 0, audio 0 [ 765.203912] reduce_bus_freq(717): end [ 765.208903] reduce_bus_freq_handler(733): unlock... [ 768.166631] reduce_bus_freq_handler(722): lock... [ 768.172386] reduce_bus_freq_handler(726): call reduce [ 768.186330] reduce_bus_freq(685): begin [ 768.191310] busfreq_notify(159): notify low enter Prevent this scenario by explicitly calling cancel_low_bus_freq_handler from inside reduce_bus_freq_handler. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-19047-1 ARM: imx: busfreq: Add debug check for double notifyLeonard Crestez
The only user of busfreq notifiers is imx_thermal and if it receives a double LOW_BUSFREQ_ENTER it will incorrectly decrease the reference count on its clk. Since tempmon uses pll3 directly this can cause problems like uart hangs. Guard against this scenario with an explicit check and warn inside busfreq_notify. This is not a high-performance path so it's better to be safe. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-18025: ARM: imx: Fix suspend initialization for Optee on imx7ulpClement Faure
Before the kernel starts, optee uses M4 SRAM to allocate its suspend function. When imx7ulp_pm_map_io() executes, the psci driver and psci_ops.cpu_suspend are not initialized yet. This causes the memset to always wipe the optee suspend code in the M4 SRAM. Signed-off-by: Clement Faure <clement.faure@nxp.com>
2018-08-24MLK-18308-2: ARM: imx: imx7ulp: add poweroff featureRobin Gong
On i.mx7ULP, poweroff kernel by sending rpmsg message to M4, and M4 poweroff CA7. Then M4 can power on CA7 again by type 'V' command in its console or press POWERON key once M4 support POWERON. Note: CA7 should enter VLLS mode firstly before poweroff by M4. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2018-08-24MLK-18051 arm: imx: fix the audio bus hang when tee enabledBai Ping
fix audio bus mode hang issue on imx6sl. The root cause of this issue is that busfreq mode passed to TEE side is wrong, it will lead to ccm setting is wrong in TEE. Signed-off-by: Bai Ping <ping.bai@nxp.com> Tested-by: Anson huang <anson.huang@nxp.com>
2018-08-24MLK-18004: ARM: imx: pm-imx7ulp: fix resume failure in freeze modeRobin Gong
This patch fix resume failure in freeze suspend mode on i.mx7ULP ("echo freeze > /sys/power/state") while pressing onoff key or enabling rtc alarm wakeup. In freeze mode, kernel can only be woken up by drivers which register wakup source such as 'device_init_wakeup' or 'irq_set_irq_wake', otherwise, kernel will wait for irq handler freeze_wake(). Unfortunately, our NMI interrupt which used to wakeup A7 by M4 is not a common device and request irq as 'IRQF_NO_SUSPEND' which means feeze_wake() never get chance to run while wakeup by any event from M4 such as RTC, ONOFF. In this case, use pm_system_wakeup() instead in NMI interrupt handle to trigger freeze_wake() directly. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com> (cherry picked from commit e069300629d4cba26a2812c85f37ccaf0bd2e683)
2018-08-24MLK-17583-2: arm: imx: Fix imx6sl cpuidle build fail without CONFIG_SOC_IMX6SLLLeonard Crestez
Fixes commit 91558864ab21 ("MLK-13344-05 ARM: imx: Add cpuidle support on imx6sll") Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2018-08-24MLK-17583-1: arm: imx: Fix ifdef check on imx6sll_lpddr2_freq_changeLeonard Crestez
Fixes commit e9f330efbe16 ("MLK-13344-04 ARM: imx: Add busfreq support on imx6sll") Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2018-08-24MLK-17735 ARM: imx: pm-rpmsg: ensure the pm is late suspended and early resumedFugang Duan
Since some drivers using rpmsg io as wakeup source enable the wakeup in suspend stage, then it has to ensure pm rpmsg driver pm sleep is late suspended and early resumed, otherwise M4 will wakeup A core directly even if there has no wakeup signal. Reviewed-by: Robin Gong<yibin.gong@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-17332: ARM: imx: pm-rpmsg: remove workqueue delayRobin Gong
With the latest M4 image on i.mx7ULP, which assume life cycle rpmsg is the first channel sending message during AP bootup, we should remove the delay timing window which other rpmsg channel may fall in, otherwise, such rpmsg channel may probe failed as pf1550 regulator rpmsg driver. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-17320 arm: imx: update copyright for i.mx7ulpAnson Huang
Correct copyright issue introduced by commit: (468f38d MLK-17317 arm: imx: add no_console_suspend support for i.mx7ulp vlls mode) Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-08-24MLK-17317 arm: imx: add no_console_suspend support for i.mx7ulp vlls modeAnson Huang
LPUART driver currently turns off clocks during device suspend phase, but in i.MX7ULP platform low level suspend routine, lpuart will be saved/restored during suspend/resume, to avoid system hang caused by accessing lpuart registers without clocks enable, add console_suspend_enabled check for lpuart register save/restore. SCG1 SOSCDIV register needs to be saved/restored anyway, move it to asm code, all SCG1 registers will be restored there. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Rviewed-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK-17314-2 arm: imx: fix build warningAnson Huang
Fix build warning introduced by below commit: (556d2d5 MLK-16750-5: arm: imx: support using psci to handle power stuff) arch/arm/mach-imx/pm-imx7ulp.c: In function 'imx7ulp_pm_common_init': arch/arm/mach-imx/pm-imx7ulp.c:747:17: warning: 'sram_paddr' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK-17314-1 arm: imx: remove snvs pcc save/restoreAnson Huang
On i.MX7ULP B0, SNVS is located in M4 domain, remove snvs pcc save/restore to avoid imprecise abort after resume: Restarting tasks ... Unhandled fault: imprecise external abort (0x1c06) at 0x00040000 pgd = b173c000 [00040000] *pgd=9169d835, *pte=00000000, *ppte=00000000 done. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK-17082-01 ARM: imx: Add psci support in cpuidle for imx6sl/sllBai Ping
Using PSCI to handle low power idle when linux is running in no secure world. If the kernel is running in secure world, keep using the method we used before. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-08-24MLK-16750-6 arm: imx7d: cpuidle: Fix missing decrement of master_lpiPeng Fan
This fixes commit ("MLK15034: ARM: cpuidle imx7d: Check IPIs manually before LPI"). In this patch, also need to take care of psci part. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16750-5: arm: imx: support using psci to handle power stuffPeng Fan
Support using PSCI to handle Power stuff. Use PSCI to differentiate secure/non-secure kernel. i.MX7 LPSR mode not implemented now. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16750-3 arm: imx6sx: busfreq: lock L2 cache instead of disabling itPeng Fan
In non-secure mode, L2 cache can NOT be disabled, lock L2 cache instead of disabling it to avoid L2 cache access DDR. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16750-2 arm: imx: busfreq: lock L2 cache instead of disabling itAnson Huang
In non-secure mode, L2 cache can NOT be disabled, lock L2 cache instead of disabling it to avoid L2 cache access DDR. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan<peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-14409-01 ARM: imx: Add speed grading fuse check for 900MHz on i.mx6ullBai Ping
According to the latest datasheet(Rev.1,02/2017), when the internal LDO is enabled, the ARM core can run at 900MHz. We need to check the speed grading fuse to determine the max ARM core frequency. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK-16266-02 ARM: imx: Enhance the code to support new TO for imx6qpBai Ping
Previous code don't take care about the i.MX6QP revision update of new TO. So improve the code to include future TO support for i.MX6QP. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK-16266-01 ARM: imx: improve the soc revision calculation flowBai Ping
On our i.MX6 SOC, the DIGPROG register is used for represent the SOC ID and silicon revision. The revision has two part: MAJOR and MINOR. each is represented in 8 bits in the register. bits [15:8]: reflect the MAJOR part of the revision; bits [7:0]: reflect the MINOR part of the revision; In our linux kernel, the soc revision is represented in 8 bits. MAJOR part and MINOR each occupy 4 bits. previous method does NOT take care about the MAJOR part in DIGPROG register. So reformat the revision read from the HW to compatible the revision format used in kernel. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-08-24MLK15034: ARM: cpuidle imx7d: Declare longer exit_latency/target_residencyLeonard Crestez
Low power idle exit latency is much longer than declared, in the milisecond range. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK15034: ARM: cpuidle imx7d: Use a single counter for lpi flowLeonard Crestez
The current code for deciding which CPU runs the complete lpi flow is too complicated. Since all enter/exit code now runs under the same lock we can just use a single non-atomic counter of cpus inside lpi. Another variable is used to make num_online_cpus() available to ASM code but idle code can treat it as a constant. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2018-08-24MLK15034: ARM: cpuidle imx7d: Check IPIs manually before LPILeonard Crestez
The GPC will wake us on peripheral interrupts but not IPIs. So check them manually by reading the GIC's GICD_SPENDSGIR* registers and aborting idle if something is pending. We do this only for the last cpu and after taking the required locks. We know that at this stage the other cpu is in WFI itself or waiting for the imx_pen_lock and can't trigger any additional IPIs. This means that the check is not racy. This fixes occasional lost IPIs causing tasks to get stuck in the TASK_WAKING 'W' state for long periods. This eventually manifested as rcu stalls. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2018-08-24MLK15034: ARM: cpuidle imx7d: Extend imx_pen lock to cover entire flowLeonard Crestez
This makes the code much easier to reason about. In particular it o makes sure the imx7d cpuidle driver respects the requirements for cpu_cluster_pm_enter/exit: * cpu_cluster_pm_enter must be called after cpu_pm_enter has been called on all cpus in the power domain, and before cpu_pm_exit has been called on any cpu in the power domain. * cpu_cluster_pm_exit must be called after cpu_pm_enter has been called on all cpus in the power domain, and before cpu_pm_exit has been called on any cpu in the power domain. This fixes interrupts sometimes getting "stuck" because of improper save/restore of GIC DIST registers. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-15047-2: ARM: imx: add IMX_SOC_IMX7Octavian Purdila
IMX_SOC_IMX7 is referenced in makefiles and kconfig but it is not defined, so define it and select it for both IMX7D and IMX7ULP. Fixes the following build errors: arch/arm/mach-imx/built-in.o: In function `update_lpddr2_freq_smp': platform-imx-dma.c:(.text+0xf7c): undefined reference to `imx_scu_base' platform-imx-dma.c:(text+0xf88): undefined reference to `imx_scu_base' arch/arm/mach-imx/built-in.o: In function `update_ddr_freq_imx_smp': platform-imx-dma.c:(text+0x330c): undefined reference to `imx_scu_base' platform-imx-dma.c:(text+0x3318): undefined reference to `imx_scu_base' Makefile:969: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
2018-08-24MLK-15056 arm: imx: use static mapping for imx7ulp AIPSx memory spaceBai Ping
The AIPSx address space of i.MX7ULP need to be mapped as SZ_1M block in iRAM tlb for suspend code use. If we use ioremap to map these address region into kernel space, we can't make sure that the returned virtual address is 1M alignment. So we can map this address regions as static, then if we use the ioremap to map these memory regions, it will always return the virtual address of static mapping. So we can make sure the virtual address is 1M aligned. Signed-off-by: Bai Ping <ping.bai@nxp.com>
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