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deprieved from boundary msi support patch
add the following modifications
* use the RC's line address 0x01FF8000 instead of one
actual physical memory as the msi start address.
The physical memory address is not mandatory required by the
msi start address.
* set PCI_MSI_FLAGS_ENABLE in RC's msi capability
structure when the msi int is enabled.
* the data of msg is only 16bit, set the upper 8bit
cputype, and the msi int num to the lower 8bit.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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MX6SL EVK board uses Silex SX-SDMAN board for bluetooth.
Add rfkill interface to control SX-SDMAN reset.
The reset signal is required before using bluetooth.
Signed-off-by: Lionel Xu <R63889@freescale.com>
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In current linux BSP USB H1 driver default load before otg driver load,
which cause USBx not match the ehci controller number. like bellow:
root@freescale /sys/devices/platform/fsl-ehci.0$ ls
driver modalias pools power subsystem uevent usb2
root@freescale /sys/devices/platform/fsl-ehci.1$ ls
driver modalias pools power subsystem uevent usb1
Signed-off-by: make shi <b15407@freescale.com>
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Add HDMIdongle board for imx6Q/DL under board/freescale.
Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
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- Add USB_FSL_ARC_OTG configuration to imx6_defconfig and imx6s_defconfig,
the default configuration is selected as "y"
- add related USB_FSL_ARC_OTG configuration to Makefile
- add related USB_FSL_ARC_OTG configuration to Kconfig
Signed-off-by: make shi <b15407@freescale.com>
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start trace:
echo 1 > echo 1 >/sys/devices/etm.0/trace_running
Notes: The other cores ptm also enabled by above command.
dump trace buffer:
echo v >/proc/sysrq-trigger
Decode trace buffer:
/unit_test/etm --pft-1.1 --sourceid-match 0 < /dev/tracebuf
Notes: this version need connect JTAG to make etm work.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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When ARM enters WFI in low power IDLE state, float the DDR
IO pins to drop the power on the VDDHIGH rail.
Need to run WFI code from IRAM since DDR needs to be
put into self-refresh before changing the IO pins.
Drop AHB to 8MHz and DDR to 1MHz when ARM is in WFI when
in IDLE state.
Set IPG_PERCLK to run at 3MHz, since we want to maintain a
1:2.5 ratio between PERCLK to AHB_CLK.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Fix build break due to missing extern.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add support for DDR freq change code in IRAM.
Change PLL2 to bypass mode so that DDR is running off 24MHz OSC
directly.
ARM is now sourced from PLL1 (running at 800MHz) in this mode.
This is required for the next step in IDLE mode optmization
where all PLLs will be disabled when ARM enters WFI.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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- Copied the board file from ARM2, and consolidated the pinmux setting.
- Added a new pmic file for EVK.
- Added a new mach type.
- Added board_is_mx6sl_evk() API for late use if needed.
- Updated the defconfig
Signed-off-by: Robby Cai <R63905@freescale.com>
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- Add USB_EHCI_ARC_H1 configuration to imx6_defconfig and imx6s_defconfig,
the default configuration is selected as "y"
- add related USB_EHCI_ARC_H1 configuration to Makefile
- add related USB_EHCI_ARC_H1 configuration to Kconfig
Signed-off-by: make shi <b15407@freescale.com>
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As Mx6 dq, dl and sl have different DDR IO address, so
we need to do the DDR IO low power setting according
to different CPU type.
Also, Mx6sl has some different config in DSM, need to
separate it from other platforms.
Change mx6q_suspend to mx6_suspend, as it is a common
thing for all mx6 platforms.
Add rtc driver for mxsl platform to support suspend/resume test.
Signed-off-by: Anson Huang <b20788@freescale.com>
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1.add pmic board support file
2.add i2c support on board-mx6sl_arm2.c
3.update IOMUX setting for I2C pin for mx6sl arm2 board
Signed-off-by: Robin Gong <B38343@freescale.com>
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Add basic board file support for the i.MX 6SoloLite ARM2-based
Validation board.
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
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Add clock support for i.MX 6SoloLite. A new clock file has been created
to reflect the substantial set of changes in the clocks used between
6SoloLite and other 6 series SoCs.
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
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Add support for scaling the bus frequency (both DDR
and ahb_clk).
The DDR and AHB_CLK are dropped to 24MHz when all devices
that need high AHB frequency are disabled and the CORE
frequency is at the lowest setpoint.
The DDR is dropped to 400MHz for the video playback usecase.
In this mode the GPU, FEC, SATA etc are disabled.
To scale the bus frequency, its necessary that all cores
except the core that is executing the DDR frequency change
are in WFE. This is achieved by generating interrupts on
un-used interrupts (Int no 139, 144, 145 and 146).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add PCIE RC driver on MX6 platforms.
Based on iwl4965agn pcie wifi device, verified the following
features.
* Link up is stable
* map the CFG, IO and MEM spaces, and CFG/MEM spaces can be accessed
Signed-off-by: Richard Zhu <r65037@freescale.com>
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1. Add pfuze100's init fuction on board level
2. Add mx6q_sabresd_pmic_pfuze100.c
3. Rename to sabresd
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Add suport for i.MX 6Quad SABRE Smart Device.
Rename to SABRESD.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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1.modify some pins for support pfuze100
2.add mx6q_sabreauto_pmic_pfuze100.c to support regulator of pfuze100
3.modify imx6_defconfig to enable pfuze driver and regulator driver
Signed-off-by: Robin Gong <B38343@freescale.com>
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Change dvfs driver and cpufreq driver to use regulator API to set cpu voltage.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Add file board-mx6q_sabreauto.c. The only real difference from
board-mx6q_arm2.c is SD pin configuration is changed.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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- FEC get the default MAC address from OCOTP.
- If the MAC address is all zero, get the random address.
- But, if add para "fec_mac=xx:xx:xx:xx:xx:xx" in uboot,
FEC will get the last MAC address from uboot para.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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MSL part
Add HSIC support for Host2 and Host3, for HSIC mode, there
is not usb phy needed, the usb device is always at the board
- Validation hardware: iMX6Q Validation Port Card and Re-worked
Rev X3 board, for hardware rework detail, contact Ken Sun (b03826)
- Validation device: HSIC interface SMSC HUB(USB4640) and Host 3.
Host 2 is coding finishes, but not verified due to hardware limitation.
- Pin Conflict with Ethernet, order to use HSIC, the user need
disable ethernet function at both u-boot and linux kernel.
For u-boot: please undefine CONFIG_MXC_FEC at your board config file
For kernel: please define CONFIG_USB_EHCI_ARC_HSIC, the entry is:
Device Drivers---> USB support---> Support HSIC Host controller
for Freescale SoC
- Suspend/resume and wakeup are not supported due to IC issues,
these IC issues will be fixed at TO1.1 for i.mx6, software will
add these support after receiving TO1.1 chip.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add support for the MX6 Sabre-lite board
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Machine layer patch.
Sabreauto is an inaccurate name for the Armadillo2 board that
this code is actually meant for. So, renamed "sabreauto" board file,
configs, and code to "arm2". Created a new machine id for
ARM2 board.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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1. Add Anatop regulator support.
2. Add some dummy regulators support for audio codec.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Set the appropriate bit in CCM to allow ARM-CORE to enter WAIT
mode when system is idle.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add support for CPUFREQ for SMP system.
Added support for 1GHz, 800MHz, 400MHz and 160MHz.
Added support for scaling the voltage along with frequency.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Enable suspend/resume feature for MX6q
echo standby > /sys/power/state -> wait mode;
echo mem > /sys/power/state -> stop mode;
Currentlu only support debug uart as wakeup source;
Signed-off-by: Anson Huang <b20788@freescale.com>
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Changes at MSL
- Add usb code for mx6q
- Usb host functions (keyboard and u-disk) are verified
- USB host low power mode and wakeup are supported
- defconfig for otg port is for host port
- Using upstream platform device register method
- Delete some useless code, and fix the warning during building
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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MSL code for bring up MX6 sabreauto board with Quad core.
Enable cpu core local timer, add reset and enable cpu core control,
and enable it in default config.
Merged from testbuild:imx6_bringup branch.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Merged-by: Zeng Zhaoming <b32542@freescale.com>
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MSL code for bring up MX6 sabreauto board with Single core.
Merged from testbuild:imx6_bringup branch.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Singed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Merged-by: Zeng Zhaoming <b32542@freescale.com>
Reviewed-by: Jason Liu <r64343@freescale.com>
Reviewed-by: Frank Li <Frank.Li@freescale.com>
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