Age | Commit message (Collapse) | Author |
|
* Correct mipi-csi2 settings only one data line is used
* Add mx6q_mipi_csi1_io_init ipu-csi setting callback
use virtual channel 1 and attach it to CSI1 -> IPU0
* Set i2c slave address to 0x52
* Set ipu-csi clko_clk
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
(cherry picked from commit c8000cb42cfb6170c95ad4adc8fe4b2473612e92)
|
|
Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:
Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.
The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.
Signed-off-by: Fugang Duan <B38611@freescale.com>
|
|
Increase the NOR flash read speed.
Added weimnor driver to use cached (and page mode) reads.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
|
|
In order to save power consumption, disable sata phy
(enable PDDQ mode) in kernel level, if the sata module
is not enabled in kernel configuration.
Signed-off-by: Richard Zhu <r65037@freescale.com>
|
|
* Fix adv7180 tvin powerdown function
gpio power pin already exported in io-mux setup function
no need to request/free gpio
* Update copyrigth year 2013.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
MTD partition for SPI-NOR was not aligned to 8K.
Replace its offset from MTDPART_OFS_APPEND to MTDPART_OFS_NXTBLK.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
Fix chip select for SPI-NOR and
remove flags for no writeable partition for weim nor and
SPI-NOR
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
Didn't take more care about non-pfuze board, and there is two place in BSP will
call "mx6_cpu_regulator_init". It means regulator_get will be called twice on
every vddcore/vddsoc regulator. Then one value need set twice ,because from
regulator core view, there is two regulators share the same regulator. The non-
validate one will return error and print "COULD NOT SET GP VOLTAGE!!!!." on
Sabreauto board. The same as Sabrelite and ARM2 board.
Meanwhile, Sabreauto need be configured LDO bypass default.
Signed-off-by: Robin Gong <b38343@freescale.com>
|
|
* Aline weim-nor partition layout with u-boot expected
offtsets
"bootloader" /dev/mtd0
"bootenv" /dev/mtd1
"kernel" /dev/mtd2
"rootfs" /dev/mtd3
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
* Aline spi-nor partition layout
* set correct chip-select value
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
- remove mx6_usb_dr_init() in board specific initialization files
- Add module_init(mx6_usb_dr_init) and module_exit(mx6_usb_dr_exit)
in usb_dr.c to support the usb_dr modulization
- Export necessary function which is used in usb_dr.c
Signed-off-by: make shi <b15407@freescale.com>
|
|
* Pass csi-tx slave address for adv7280 chipset
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
Configure MUX settings for bluetooth operation over UART3.
Enable RTS,CTS and DMA only for uart3.
Affected files :
arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabreauto.h
arch/arm/mach-mx6/board-mx6solo_sabreauto.h
arch/arm/plat-mxc/include/mach/iomux-mx6q.h
On behalf of Francisco Munoz <francisco.munoz@freescale.com>.
Some modification are needed also on hciattach tool.
Signed-off-by: Israel Perez <B37753@freescale.com>
|
|
* Add ad7280 I2C device support
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Oscar Luna <r01160@freescale.com>
|
|
Add eCompass support on Sabreauto platform
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
Configuration file modified to support NAND flash, SPI-NOR,
WEIM NOR and SD card on the same image.
Bootloader arguments will be used to choose between them.
Arguments on uboot are:
spi-nor
weim-nor
By default NAND is configured if neither spi-nor or weim-nor are used
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
* Adv7180 use tvin io_init callback to configure csi0/ipu
mux settings mx6q_csi0_io_init.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
* Remove camera control lines, this gpio control lines are used by
other periherals
* GPIO_4_5 correspond to RGMII_INT
* GPIO_3_24 correspond to CSI0_DAT5 parallel tv-in
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
* Remove unsupported camera device ov5640, there is no
hardware module available for sabreauto target board.
No mechanical connector compability with existing capture
sensor.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
* Remove unsupported camera device ov3640, there is no
hardware module available for sabreauto target board.
* No mechanical connector compability with existing capture
sensors.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
* Fix i2c3 pad settings, i2c3 conflicts with weim-nor and
spi-nor only in rev b target boards.
* For rev B targets setup extra pads.
* Fix indentation.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz.
but now 498Mhz seems not stable enough, comment now, test enough to
add it. Rigel kept unchange now.
2.support adjusting VDDSOC/VDDPU when cpu frequency change.
Signed-off-by: Robin Gong <b38343@freescale.com>
|
|
Replace mx6q_version() check with hdmi_SDMA_check() to add support
for HDMI_SDMA in RIGEL TO1.1.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
If MX6q chip version is bigger than TO1.2, Select HDMI SDMA
request as SDMA event 2 for MX6Q ARM2 board. SDMA event 2 can be
configured HDMI or IPU.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
Set audio p2p playback params(sample rate, word width) for ESAI in board
init file(ARD).
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
- fix build warning about uninitialization of sd_pads_50mhz, sd_pads_100mhz,
and sd_pads_200mhz.
affected soc:
- mx6q arm2/sabreauto/sabrelite
- mx6sl arm2
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
In MFG tool will use "flash_eraseall /dev/mtd0" command to erase whole mtd0
partition, but u-boot environment params are stored in offset 0xc0000 which
exceed the u-boot patition 0x40000, it means the "flash_eraseall" command only
erase u-boot partition, but not environment area. So we need increase the size
of u-boot partition to 0x100000 as what we remain 1MB for u-boot.
Signed-off-by: Robin Gong <B38343@freescale.com>
|
|
- remove mx6_usb_h1_init() in board specific initialization files
- Add module_init(mx6_usb_h1_init) and module_exit(mx6_usb_h1_exit) in usb_h1.c
to support the usb_h1 modulization
- Export necessary function which is used in usb_h1.c
Signed-off-by: make shi <b15407@freescale.com>
|
|
Remove call memblock_free after reserve memory with memblock_allocate().
The function of memblock_free is to remove the memory block from reserve list
of memblock, it will totally lost the info about how much phy memory
we have.
Skipping call this can make the reserved memory be accountable in
memblock With no side-effect.
After doing this, we can know how much our phy memory is, then can add check
in our driver like(vpu) to check the phy memory valid or not before vpu start
use the address.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
|
|
The problem is caused because "mx6_board_init" don't add the
corresponding device node. Problem resolved after add them.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
|
|
Added enable_pins/disable_pins functions for Mx6q/dl sabreauto HDMI.
Added HDMI DDC IOMUX setting.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
Enable caam ahash feature in config.
Add caam init to other 6q platforms.
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
* enable PCIe on ARD boards
* Configure the DEEM parameters to pass PCIe GEN2 stress tests
Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
|
|
Added IOMUX,GPIO and early param support for the parallel nor to work
on the imx6 revB quad/solo. Since the parallel NOR can clash with I2C3,
and SPI, an early param was added to enable WEIM NOR chips using boot
args.
The Weim NOR needs a HW rework for it to work. This rework is going
to disable the SPI NOR. Modified files:
arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabreauto.h
arch/arm/mach-mx6/board-mx6solo_sabreauto.h
Signed-off-by: Francisco Munoz <francisco.munoz@freescale.com>
|
|
- Add variable pad speed setting per SD clk freq.
- Add SD3.0 support on SD1, SD2, and SD3.
- Enhance drive strength on SD pad to improve its compatibility.
- change the definition of pad speed changing interface
- combine pad speed setting for different SD host controllers into one function.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
Acked-by: Lily Zhang
|
|
fix a type: It should be "#if", not "#ifdef".
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
The default .config defines the GPU as a module:
"CONFIG_MXC_GPU_VIV=m"
In this case, we actually can not find the CONFIG_MXC_GPU_VIV.
We should find CONFIG_MXC_GPU_VIV_MODULE instead.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
dual camera support for mx6q and mx6dl:
1. let mipi and parallel camera working on different csi
2. the two camera can work independently and synchronously
3. the two camera will be registered and different video
device(/dev/video0, /dev/video1)
4. when both camera are working, the can not use the same
ipu channel, that is, when camera one using PRP_ENC_MEM
or PRP_VF_MEM channel, the other one can only use CSI_MEM
this is the arch part changes.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
|
|
To avoid the ARM from accepting an interrupt in the dangerous
window, reduce the ARM core freq just before the sytem is
about to enter WAIT state.
Reduce the ARM freq so as to maintain 12:5 ARM_CLK to IPG
ratio. Use the ARM_PODF to drop the frequency.
In a multicore case the frequency is dropped only when all the
4 cores are going to be in WFI.
In case of single core environment, its easy to drop the ARM core
freq just before WFI since there is no need to identify the state of
the other cores.
Some other points to note:
1. If "mem_clk_on" is added to the command line, the memory clocks will
not be gated in WAIT mode. This will increase the system IDLE power.
This mode is valid only on MX6sl, MX6DQ TO1.2 and MX6DL TO1.1.
2. In case the IPG clk is too low (for ex 50MHz) and ARM is at 1GHz,
we cannot match the 12:5 ratio using ARM_PODF only. In this case,
donot clock gate the memories in WAIT mode (available on MX6SL,
MXDQ TO1.2 and MXDL TO1.1). For MXDQ TO1.1 and MX6DL TO1.0, disable
system wide WAIT entry in this case.
In STOP mode, always ensure that the memory clocks are gated, else
power impact will be significant.
WAIT mode is enabled by default with this commit.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
The current code will reserve 128M for GPU even when it is not enabled.
It is not needed. So do not reserve the memory when the GPU is not enabled.
(this can save 128M for Mfgtool.)
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
SPI NOR will be enable through spi-nor
command line as a kernel argument
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
* only happend on sabre-auto board,atheros sdio wifi card can't be used
after suspend/resume
* Fix by keeping sdio power at suspend.
Signed-off-by: justin.jiang <b31011@freescale.com>
|
|
Steer configuration to enable AUD5_RXD signal
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
Add support for scaling the bus frequency (both DDR
and ahb_clk).
The DDR and AHB_CLK are dropped to 24MHz when all devices
that need high AHB frequency are disabled and the CORE
frequency is at the lowest setpoint.
The DDR is dropped to 400MHz for the video playback usecase.
In this mode the GPU, FEC, SATA etc are disabled.
To scale the bus frequency, its necessary that all cores
except the core that is executing the DDR frequency change
are in WFE. This is achieved by generating interrupts on
un-used interrupts (Int no 139, 144, 145 and 146).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
When system is going to enter WAIT mode, set PLL1 to 24MHz
so that ARM is running at 24MHz. This is a SW workaround for
the WAIT mode issue.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Modifications in ARD board file to support the Audio for AMFM
module for IMX6Q and IMX6DL (REV A and REV B) Supported for
kernel 3.0.15. Also it contains the I2C configuration for
the AMFM module.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
Add vdoa support on i.MX6 SOC platform
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
|
Uart 3 and NFC pins are shared.
Uart 3 enablement is done by passing an early parameter
called "uart3" from uboot. Both interfaces (Uart3 and NFC)
can NOT coexist on the same configuration at the same time.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
UART2 and CAN interface do not have pins in common.
Therefore uart2 early parameter is not required.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
|
|
set different gpr register due to mx6q or mx6dl
Signed-off-by: Tony Lin <tony.lin@freescale.com>
|