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Add support for PM315
Bug 1171138
Change-Id: I2e5461c656c41d4172aca60525655cb780eaa17e
Original-author: Mike Thompson <mikthompson@nvidia.com>
Signed-off-by: Mike Thompson <mikthompson@nvidia.com>
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/143506
(cherry picked from commit 4e66142b6990ca586e085aa88ae0bd6b819da0c4)
Reviewed-on: http://git-master/r/166814
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Tristate and pull down LCD pins D0-D23, LCD_PWR* and
LCD_CS*_N pins for E1506 DSI panel. Reduced the power
consumption on VDDIO_LCD to 0.37mW for PM269 with E1506
DSI panel.
Bug 1007512
Bug 1015349
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Change-Id: Ic54d1ca71f5ff92742f70915b7b27104c0a508a6
Reviewed-on: http://git-master/r/123172
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Tristating and pulling down LCD_PCLK,LCD_WR_N,LCD_HSYNC,LCD_VSYNC
LCD_SCK,LCD_SDOUT and LCD_SCIN for E1506 DSI panel.
Bug 999702
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Reviewed-on: http://git-master/r/111390
(cherry picked from commit 822a1c8ce2a50ff7b53cdd811c3ae1e47568d69d)
Change-Id: Icba97ddcbc4e7bd0b8c4744703e85bf8bc94ba69
Reviewed-on: http://git-master/r/117308
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Set E_INPUT and PUPD bit of GPIO_PU4 used for dock
detect event for cardhu a02+ board versions and
hence enable pcie hotplug for them.
Bug 955043
Bug 1009086
Bug 1016722
Change-Id: Ibb66e5bc6fd9cf5333a81988b975b611fe9c5312
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/115692
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added board and pinmux support for CEC
bug 894195
Change-Id: I858908bf090dae3e2043637ed22c53db4892c336
Signed-off-by: Ankit Pashiney <apashiney@nvidia.com>
Reviewed-on: http://git-master/r/105519
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Change pin used for LVDS_SHTDN_N from GMI_AD9 to VI_D4
Bug 958167
Change-Id: Ie36bbed84746aeea1e84acdbd53d905a8b2bbf20
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/#change,108612
Reviewed-on: http://git-master/r/113061
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add support for 720p DSI panel on the E1506.
Bug 978305.
Change-Id: If76d2754eebc9e612c2ce006fa73ead7ebb1a109
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/104894
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Remove unsued pinmux for pn544 nfc which was introduced in
http://git-master/r/#change,62746
Bug 978207
Change-Id: I7724e9c17c8c5717e07fbc9e091f26f6e81cb422
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/104468
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Removing tegra_gpio_enable and disable calls
from board files as they are supported through
set direction calls in the driver
Bug 984439
Change-Id: I51b17389dbb17b0e94e1635ec6d68acd01c743b4
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/102529
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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When open drian pin is set as gpio-input, the pin is set as
tristate and hence need not to set this again tristate from
pinmux controller.
Setting the pin in normal in pinmux controller and then
- setting HIGH by gpio-input and pull-up so that pin is
tristated through gpio controller.
- Setting LOW by gpio-output and drive to LOW. As pin is in
normal state in the pinmux, the output will be set to LOW.
bug 973591
bug 969182
Change-Id: Ia9518f79987c9562bb57f95a468bdc5b5e143b87
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98434
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Change-Id: I1b3797b021adadd1ad944ede45b5916500a881e6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84542
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Remove the pinmux conflicts by moving the unused pins
in reserved options.
bug 920706
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78172
(cherry picked from commit fb30d2d39e39f2effb7ea39ea6d9ff16d55de99c)
Change-Id: Ieea78535a58707dec9dc9dbe74c6ec25a40d2b26
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/79978
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabled vbus1 & vbus3 for PM311 & PM305 boards. In PM311 & PM305 the gpios
used to enable vbu1 and vbus3 are TEGRA_GPIO_PCC7 & TEGRA_GPIO_PCC6
Bug: 914114
Change-Id: Id52cf6399526cb135968370478b5ac1bd53fe364
Signed-off-by: Preetham Chandru R
Reviewed-on: http://git-master/r/72409
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enabling PCIE support in cardhu board.
Fixes bug: 637871
Reviewed-on: http://git-master/r/34474
(cherry picked from commit bde3e58d998b6e76934152219b8803327cea2fad)
Change-Id: I18c548b458ad3d17ec07d2ec5b16fd83897b44b1
Signed-off-by: Krishna Kishore <kthota@nvidia.com>
Reviewed-on: http://git-master/r/62072
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Supporting the cap sensor based key board which is used in
cardhu - A04.
bug 895616
Change-Id: I433610de6945a5d9fe6e282d80e8e5e9fa6ac5b3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I47d857f34a18a72c7aad44ae26921404b091dd14
Reviewed-on: http://git-master/r/67426
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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SND_HDA_CODEC_REALTEK config by default gets enabled when SND_HDA_INEL
config is enabled. Just enabling realek HDA codec compilation flag
does not mean board has same installed. Remove code which switches
DAP2-I2s21 path to DAP2-HDA based on CONFIG_SND_HDA_CODEC_REALTEK
check.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: I5334d156ed50dfa37fa4b5b6b2e1f34049b762a0
Reviewed-on: http://git-master/r/64402
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: Rd8d2a638041c18f4e04e58423a45eb4efad4c9d9
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1) configuring pinmux
2) create pn544_i2c_platform_data
3) register i2c device info using i2c_register_board_info
Bug 846684
Bug 873017
Change-Id: I6cc370d3ee6cc5df6b75db19bb719275e465f344
Reviewed-on: http://git-master/r/62746
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R334a9cc8f86c90214b2415b3b855d5f234ad7a11
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This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode
Bug ID : 822980
Reviewed-on: http://git-master/r/50215
(cherry picked from commit b83e795747fa860b5b7fb66b2067ebe4f15bcfd0)
Change-Id: Iabf707ded2976e9877481c215d0b1f1940781f14
Reviewed-on: http://git-master/r/60085
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re8eadc35c75fa21b0a5f3cb3bee0e8cb77dc3238
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Initializing the pins which is used in gpio to their inital state.
bug 876305
Reviewed-on: http://git-master/r/57516
(cherry picked from commit 3f33cb777295669e71e291bb05651d3c6c4b37d5)
Change-Id: Ie05862e5184bb95c85cf7aa96ce2eca497c01c93
Reviewed-on: http://git-master/r/57817
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rfb5311f9499f9e7c191cdd4203c328d3b8b2c333
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Adding support for E1257 platform.
bug 864294
Reviewed-on: http://git-master/r/50662
(cherry picked from commit 8217615021a6ffeb992327f6b010ea9deebc34e7)
Change-Id: I3429da1bca38e1ddc5b3c2156a0db6b23aeb5555
Reviewed-on: http://git-master/r/57806
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R7fadbdc30bdca30e41e0b7fdb88628dbc8c32e82
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Adding support for PM311 based system.
bug 870139
Reviewed-on: http://git-master/r/50012
(cherry picked from commit d319d9980b6b225735ac97160fdee18fbabba2f0)
Change-Id: Iaa28921761e035e8fa29956b776f9379ae326b42
Reviewed-on: http://git-master/r/57251
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R50fc9a079bd46a050084afed2b0f460e2916ebc9
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Setting touch control signal to non-tristate.
bug 862648
Change-Id: I240a5cd3815c6df99f7491d796dc383a7825b9ed
Reviewed-on: http://git-master/r/52051
Reviewed-by: Ali Ekici <aekici@nvidia.com>
Tested-by: Ali Ekici <aekici@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R6ff7c63d28b27eefe73a170db6d7f64f9cb0fd8f
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Change-Id: I156af0bdd8b37cb23aec214c3e158027252e27e1
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/51157
Rebase-Id: R795bf03590a76b6c494afd37603ed951dc2cd082
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Updating sdmmc3 and sdmmc4 drive strengths as per
characterization results.
Bug 799568
Original-Change-Id: I48256399db726e1ab6afe01c9d08e47f13a20103
Reviewed-on: http://git-master/r/49861
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6226b1f1eecadfb45f774a26295e672356076c27
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Adding support for PM305.
bug 846246
Original-Change-Id: Ib036c67c12984668e0b7153f76a1a1d44c5be14f
Reviewed-on: http://git-master/r/49820
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R9e9eb93ddcea487159854533eead3fe8eb74e42b
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Adding support for the gpio changes for E1198-A02.
bug 864282
Change-Id: I96e985882a3f2d00a66b300e85cb24661f884746
Reviewed-on: http://git-master/r/48483
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R07d861bb8832972e46a713d9ff195fef2cf6d1d2
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Resetting the modem during the kernel boot for E1291-A04.
bug 817238
Original-Change-Id: Id0862d39306b87a04a28abd205455d97dd05109e
Reviewed-on: http://git-master/r/38693
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: Rf42e80598a66f46cd0ef0e2bfacca3917eb86c45
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configuring sdmmc drive strengths as suggested
by HW team based on Characterization results
Bug 799568
Original-Change-Id: Id30505659aefb9c63a24f8baa8296a62723710b4
Reviewed-on: http://git-master/r/46949
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R4d0b228317fd12c185b735ed248818f5217d9ed4
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Corrected the pinmux group for hsic power management gpios.
Also removed E1197 references from cardhu board files.
BUG 828389
Original-Change-Id: I0488d7d6ea2fb102a5c55eb32813776e298f9b46
Reviewed-on: http://git-master/r/43451
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd551075e1633406de4cdfbf3a05b1d6bff017666
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The pin PEX_L1_PRSNT_N is configured in wrong option and so
generating the warning.
Configuring this in correct option.
bug 855392
Original-Change-Id: Ia9131d8e2d68eef1dfe02ff663ec9e1a23e180c8
Reviewed-on: http://git-master/r/43228
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re636ff84e9c3fd41afa147d91e454bca70f84581
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Added required Cardu specific changes for hsic baseband
xmm modem power management.
BUG 828389
Original-Change-Id: I119f541544cd34e1584608826714d2bfd9cbfe34
Reviewed-on: http://git-master/r/40789
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1a257f5c0a78f8936de4c740026c60378e12fcf2
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Configuring the drive strengths for SDMMC1, SDMMC3
and SDMMC4.
Bug 799568
Bug 826694
Original-Change-Id: Ib18c002993eddaf622f48faa0b4e4c9deb0f8e3c
Reviewed-on: http://git-master/r/42608
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Raf1d57275c48839cdb4913c3b028b4c2ad176952
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Making GMI_CS2 to gpio input to have low power in rail VDDIO_GMI.
bug 833087
Original-Change-Id: I9eb9728d945dc29285cbd459e08dcf94f2f43f68
Reviewed-on: http://git-master/r/41535
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Rebase-Id: R15464c7d3bd221631075f97d350aed8f579dc1b2
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setting UART3 signal drive strength to maximum.
Bug 819411
Original-Change-Id: Ie7103fe835868d8041d29bd2b85c7b43fcacc5eb
Reviewed-on: http://git-master/r/41028
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R3ca41455889e1c5c8a5c5fe7bfc3ace0dd60da2a
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Selecting proper pinmux option for sdmmc3_dat6, sdmmc_dat7, ulpi_data3
from the valid list of pinmux option to avoid any warning.
bug 849973
Original-Change-Id: I6c554e3d399afef10fd837291a808496f0f8b811
Reviewed-on: http://git-master/r/39562
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf1826cc64c5b531e7827592dd78ea6ce967a6264
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Remove the hardcoding of the numerical value for different
sku bit and fab definition and using macro for better readability.
Original-Change-Id: Idf70c7a063b5416e170b3b7e61e896250c9ad70c
Reviewed-on: http://git-master/r/37644
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd7e2bfcf6780b6b73a8438b904b8a13b0297b59d
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Putting the unused vddio_gmi pins into the low power mode.
bug 833087
Original-Change-Id: I7595d011a61d5993fee167e89ed7eb204d5cb6b6
Reviewed-on: http://git-master/r/37877
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R3fa74a5ebc7720b95f91f8da7b665e634522f210
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Define GPIO names, platform data, and platform devices for audio support
on Cardhu.
Configure/register the WM8903 IRQ gpio.
Don't statically configure most audio-related clocks; the ASoC utils code
sets this all up now.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: R77ca15a61948eefd790d97cbfe1470d2687c5b73
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Configuring the pins which are belonging to vddio_gmi to recommended state
to consume low power.
bug 807813
Original-Change-Id: I18b67688b0e45ccd5f16ac3f1f8a7f4db3142bae
Reviewed-on: http://git-master/r/29628
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R6d2cf20145cc6fc403edb9a7818f53104f8b9bf3
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Configuring gpio line for oob interrupts and providing
required resources to make oob work.
Original-Change-Id: Ia4231870854562f68b6c1486002f2abeba413b04
Reviewed-on: http://git-master/r/30322
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R18831152a2bc2a4f8d017dca1db616613dbbd1e6
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Fix mux entry for CAM_MCLK to use VI_ALT2.
bug 821540
Original-Change-Id: I7d68af22eb65b5e2ee20bf521cc73587e41b1c37
Reviewed-on: http://git-master/r/29981
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
Tested-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Shantanu Nath <snath@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Danielle Sun <dsun@nvidia.com>
Tested-by: Danielle Sun <dsun@nvidia.com>
Rebase-Id: R1d5cde9c1ff40f56c7f426aa457b9ae619933745
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On tegra3 TRM, some of the pin mux option for a given
pin group is not recommended and so not exposed in the
TRM reference table.
Updating the pinmux table accordingly. The non-recommended
pin option is set as TEGRA_MUX_INVALID.
bug 817099
Original-Change-Id: I572ee84912fe065a73e59d4f9ba0ce01223ead85
Reviewed-on: http://git-master/r/29626
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R00f44bbf5f96350c63f42519071f3c48f765a179
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Configuring the unused pins from VDDIO_GMI io rail to output/pulldown/
tristate mode to have low power consumption from this pins.
bug 807813
Original-Change-Id: I17eac7de6066a551f4729c23c5c7d232ca7881b6
Reviewed-on: http://git-master/r/28320
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Original-Change-Id: I5c7856b8e79625777216b714df7716d4879bb187
Rebase-Id: R9408202b3e78f0be3257ecf584aedb2855547011
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Registering platform device to enable low power mode for
bcm4329 chip. This feture is dependent on CONFIG_BT_BLUESLEEP.
BUG 793831
Original-Change-Id: If261a3231d465ec1caf26d2dc4e71e5573b72882
Reviewed-on: http://git-master/r/20026
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Original-Change-Id: I30082a938f239db5105b56b154e8d0bef6ede53f
Rebase-Id: R9c6f920483d9e3d2f3e3b56c992787bdeb125176
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Disabling the io reset for the VI_PCLK which controls the
hdmi power enable.
bug 812083
Original-Change-Id: I1ee25a48f1bf8996a8469ff7c12d9a9f1fefa44e
Reviewed-on: http://git-master/r/27335
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mohit Singh <mpsingh@nvidia.com>
Tested-by: Mohit Singh <mpsingh@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: I84b79ef364a64b1f21e65847eeb6fc6836e30f54
Rebase-Id: R8143d4bf216e90ec0a5affcddf0b867b76e6a44f
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Remove executable permission bit from source files.
Generated with:
find \( -name "*.c" -or -name "*.h" -or -name "*akefile" -or \
-name "*\.mk" \) -type f -perm /+x | xargs chmod -x
Original-Change-Id: Ibc520ecc2988c3599a488256a262cb5510ff0f0c
Reviewed-on: http://git-master/r/27104
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ie8b6b5a8d43913cf150838ca0c8f28ac64079af8
Rebase-Id: R11bcc4cdad6d77575c167cccd078cec072f0f9da
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Change the pull-up-down to NORMAL and enable the output drain
for i2c pins.
Original-Change-Id: I72a66cc0c348350f7459658ffdb6f54226be12f6
Reviewed-on: http://git-master/r/24438
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Original-Change-Id: Ibb8f2cddb74db035ad80952a161fa170bc577a9d
Rebase-Id: R3e6ffe1b00979741b2a8cf53e9605a180f65a7fa
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The E1291-A03 uses the following pins for the different power rail
controls:
EN_VDD_BL1 --->PEX_L0_CLKREQ_N
EN_VDD_BL2 --->PEX_L0_PRSNT_N
EN_USB1_VBUS_EN_OC --->PEX_L1_CLKREQ_N
ENUSB3_VBUS_EN_OC --->PEX_L1_PRSNT_N
bug 807504
bug 797021
Original-Change-Id: Id3703bc799373e714501b60588298a2f1e052852
Reviewed-on: http://git-master/r/24269
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Original-Change-Id: I9d7aafa7794e6d9e05f01db6bde7ed4c91e9050e
Rebase-Id: R82d96f07d2b8f4c3d9e6609ee669ef0f28e15d65
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Cleanup in the configuration related to board is done so that
it will be easier to add another board configuration on same
build configuration.
Original-Change-Id: Id030d70e4893b886ee73aaf944450526e7722e7e
Reviewed-on: http://git-master/r/22392
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mohit Singh <mpsingh@nvidia.com>
Tested-by: Mohit Singh <mpsingh@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Original-Change-Id: Id737a2668ce13470be80086e3d3764c4f9ac6096
Rebase-Id: R8325306bf83a317bd77612b6db4efcec18a3612c
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disable all NAND pins, and enable PWM0 pins for backlight.
Bug 786163
Original-Change-Id: I7cb978946d5f0acdfb708738d39cfcaf945fda98
Reviewed-on: http://git-master/r/21746
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: Iea6456e10f460c55894c4b63d42402e50f4c0242
Rebase-Id: R37543ec42a509c6588f50c4f779e8c07d8d472c4
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