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path: root/arch/arm/mach-tegra/board-common.h
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2014-10-27arm: tegra12: Enable CPU CVB supportsreenivasulu velpula
- Add cl-dvfs platform data - Add function call to get cpu clock switch cooling device trip points. Bug 1563635 Change-Id: I07e0a9e8d170543906f91979fb35b98c02fe18cb Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com> Reviewed-on: http://git-master/r/437195 (cherry picked from commit 55321cec6a72dd9b2e0ad6fb94ff2cc42937a14a) Reviewed-on: http://git-master/r/559393 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2013-12-13ARM: tegra: thermal: Re-factor trip-points APIsAlex Frid
Re-named, and re-arranged trip-points installation interfaces, so that interface name reflects module/parameter subject to thermal control, instead of designated thermal zone (the latter may change on different platforms creating a confusion with old names). Change-Id: Ie3714d14103b85720598cf9da44e0abf51326ac5 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/344606 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2013-12-06ARM: tegra12: dvfs: Add wrappers for vmin tripsAnshul Jain
This change adds wrapper functions for setting vmin trips of CPU, GPU and PLL. Bug 1364450 Change-Id: I2457798bed4b5f6e5307058320920733e3a9ce8a Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/338975 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2013-11-27ARM: tegra12: dvfs: Add core rail Vmax trip-pointsAlex Frid
Added core rail Vmax trip-points to PLL thermal zone on Tegra12 platforms. Made sure pid governor is installed in PLL zone (for consistency with all other SOC-THERM zones, and to avoid incorrect cooling device state reporting by default step-wise governor). Bug 1413311 Change-Id: Ib06fd98ab39dc9a4411b571778600569d801b242 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/335923 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2013-11-19ARM: tegra: Module for dynamic voltage limitsSai Gurrappadi
Provide userspace with an interface to dynamically adjust CPU <voltage, temperature> cap. Userspace must respect datasheet-imposed limits. Bug 1349095 Change-Id: Ie6d5834d56ad0f1d325bdfbb294c5d9189a8ea2f Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com> Reviewed-on: http://git-master/r/327986 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2013-10-03ARM: tegra: dvfs: Add GPU scaling trip-points interfacesAlex Frid
Added common interfaces to set GPU scaling trip-points. Bug 1273253 Change-Id: I25f5870c00b1e3b8fb4fdcd685900512954a9125 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/280079 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> (cherry picked from commit 840ed28c2d5f35b3c6c8f8ce9c6a044a4bc57705) Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
2013-09-25Revert "arm: tegra: user interface for voltage limiting"Shridhar Rasal
This reverts commit c68ce785a90086ac931eddaf8f7273525c63d20b. CPU Voltage capping driver is not used by any user space Module. So removing driver. Bug 1340826 Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Change-Id: I9011db3f253f53c72fdab3107d2ce22d783125dc Reviewed-on: http://git-master/r/278250 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-14arm: tegra: add voltage capping thermalsAmit Kamath
Voltage capping needs to use soc therm sensors to accurately measure temperatures. This change adds voltage capping related trip points before registering to the soc_therm driver. bug 1042409 Change-Id: I9bebaa39f88f0142c3b8ba7e07a70d86fdbc675e Signed-off-by: Amit Kamath <akamath@nvidia.com> Reviewed-on: http://git-master/r/208014 (cherry picked from commit dbd872140e5be5d4a358dd77de790f17c78b1594) Reviewed-on: http://git-master/r/214972 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-14arm: tegra: Move all tj dependent thermals from nct to soc_thermDiwakar Tundlam
Functions moved are vdd_cpu, core edp. Raised shutdown limit for nct. Added two higher temps for cpu_edp to support higher soc_therm temps. Doing this only for Dalmore, Pluto, Ceres, Pismo. No real changes to Roth. Bug 1200075 Change-Id: I2b4ac4ba7cd933bd47c30ab2ad9eabb3a3da5fbe Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/195331 (cherry picked from commit 2af79db3c5763d3a0b6e78663ccf1ad6c04be134) Reviewed-on: http://git-master/r/197096 GVS: Gerrit_Virtual_Submit
2013-09-14arm: tegra: edp changes due to thermal_trip_info use in driverDiwakar Tundlam
Bug 1200075 Change-Id: I96b01b1caa468c0d376e79b416aeb329e1cb0390 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/190820 (cherry picked from commit bedff5775d6dab5870a777a1b5a1abfc9e23b033) Reviewed-on: http://git-master/r/193896 Reviewed-by: Automatic_Commit_Validation_User
2013-09-14arm: tegra: move common edp cdev init to edp codeDiwakar Tundlam
Moved repetitive platform initalization of edp features to common areas in preparation for handling these cdevs from soc_therm. Bug 1200075 Change-Id: I8f7fe45d8f0797c72272e5ee1db3707493ec90a5 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/190765 (cherry picked from commit f36a20dd1bce7314a97f48213f2180b0a7440a97) Reviewed-on: http://git-master/r/192538 Reviewed-by: Automatic_Commit_Validation_User
2013-09-14ARM: tegra: power: Update core EDP with temperatureAlex Frid
Added core EDP thermal layer as active cooling device, and updated core EDP limits when temperature threshold are tripped. Bug 1165638 Change-Id: I37cd8ab0a94909d198f21ba02e9308ca4d23bcb6 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/168929 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arm: tegra: Add MAX1749 platform deviceSumit Sharma
Added MAX1749 vibrator platform device in cardhu board file Bug 1154522 Change-Id: I6464c0cf9739bae91d9c4d8b86b86be5a57a5b57 Signed-off-by: Sumit Sharma <sumsharma@nvidia.com> Reviewed-on: http://git-master/r/144518 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R0ab3f3e775d50ff33de06210660eb370c70568d8
2013-09-14ARM: tegra: move uart debug port initialization into common file.Laxman Dewangan
There is lots of duplicate code for initializing the debug port for all platform. Move this to board-common file so that duplicate code can be avoided. Change-Id: I3e8a10cd3db4db21d6752a0b689136bfe9828197 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/143721 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com> Rebase-Id: R0ee5cb4caae5d563a0a9df9a1d69b1846b974ebd
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