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Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.
Bug 967719
Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Set default videomode during the dc probe. This patch enables
HDMI during the probe only and fixes following issues:
1. Until Xinit there was no display on HDMI.
2. Framebuffer console on HDMI needs it to be enabled well before
Xinit.
To avoide un-necessary powering on HDMI,Check HPD and enable HDMI
only if it's present.
Bug: 930136
Bug: 977705
Change-Id: Ifb71328e5df0ccbb5751669db71fd24719fe3738
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/100656
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 953210
Change-Id: Id40b3fe90174a2a8c9a6faf3f35f61d9f7eeb642
Signed-off-by: Sayak Ghosh Choudhury <sayakc@nvidia.com>
Reviewed-on: http://git-master/r/98477
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Provide a fixed mapping for the PCIe host registers. This reduces the pressure
on the VMALLOC area significantly.
bug 969392
Change-Id: I80ea0dd5e81a005f86a26eb47aea00d78e9e0ad2
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/96748
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added tegra_dma_get_channel_id API to determine the id
of a given channel.
Bug 969125
Change-Id: Ibad67d65c87dc267a4e6942557c02acbd0f6e938
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/96714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
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Change-Id: Ib1b0fc6015a9dd45982a97231972dadba6b5a92e
Reviewed-on: http://git-master/r/96966
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Provide /sys/class/graphics/fb0/device/nvdps to change video mode
on-the-fly without resetting window layout like fb_set_var(). This
allows flicker free changes in refresh rate.
nvdps sysfs file takes an integer, and selects the closest matching mode
with the same or higher refresh rate. Reading the file displays the
current refresh rate.
Bug 560152
Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/95473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during
vblank). This elimiates the work around that requires disabling then
enabling display to change modes.
Adds a spinlock to protect irq code from updates to tegra_dc_mode structure.
Bug 560152
Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/90688
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add support to customize modem parameters for voice call.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I6a9e5918f709cbb004b66d16112346b692af477b
Reviewed-on: http://git-master/r/93096
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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When canceling dma, updating actual bytes transferred by dma,
making all requests status to aborted and deleting from channel
request queue.
Change-Id: I860780814340d54465de5b2ae11a6895319f428c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90815
Reviewed-by: Automatic_Commit_Validation_User
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Support for AHB prefetch enable and disable.
These calls are used to avoid memory coherency issues
Bug 921109
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/92256
(cherry picked from commit c992fdbe0be6e2006d65e67e6eb821a054ad401c)
Change-Id: I1599ee11652b9241b2d05d565289632901f44f44
Reviewed-on: http://git-master/r/93817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding new req status TEGRA_DMA_REQ_PENDING. This will be initial
status of the request when enqueued.
Change-Id: I67ee71dd0c64b6398305b86fbf186488f062e876
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93801
Reviewed-by: Automatic_Commit_Validation_User
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Initialize pm_caps and pm_flags through platform
data.
Bug 956238
Change-Id: I400f6e92541fa2e63ccc7f829e204d5eef4697fc
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90790
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
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PPCS physical address is different for Tegra 3x and 2x
Change-Id: If26f08f6f234786194f6642523b644e8bf4be770
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/91768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Fix compilation error for PCIe.
Change-Id: I1ab5390dfce273236bd4aa09579bf54425faf2e9
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/90045
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add the AHB EMEM to MC Flush Register
area to the statically mapped io regions
Bug 729267
Change-Id: I86542cd3ffec587e7213cbc34129e8b5124aab9c
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88283
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Update nvmap_alloc api to take heap_mask as arg.
This is to let clients specify the specific heap needed.
Change-Id: I9950b3e60e6dac0301b6dc66be3e9d0bab8e0fee
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/90471
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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We add this variable for two purposes. First, it would remind developer
to make sure actual refresh rate is larger than rated refresh rate.
Second, gralloc would read rated refresh rate for one-shot mode since
actual refresh rates of most devices are expected running at rated
refresh rate.
Bug 946370
Bug 934977
Change-Id: Ib4121337df1a388b40440b22687c39f373f08890
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89871
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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To set cpu_user_cap in tegra drivers, added tegra_cpu_user_cap_set
function.
Bug 945552
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/87109
(cherry picked from commit db954aafdfdbe1fa122466b8e8ec4ea4273efb90)
Change-Id: I765c44de4ed4ae908ef56914db53533605bd6d88
Reviewed-on: http://git-master/r/89740
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Added support for the platform data that needs to be passed for the
ASoC P1852 machine driver
Bug 948478
Change-Id: Iac2c0310bf87ceddb892fd4b1ed3c0890558f97b
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/89473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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The dma will be stop in continuous mode with following reason:
- There is no next request and dma restarted the same buffer
as it was last transfer.
- The buffer size was not enough and so latency to serve dma interrupt
is more than buffer transfer time and hence buffer completed before
interrupt served.
In the above cases, dma actually transfer more than requested
size. Returning correct transferred data in byte transferred and
return request status as ERROR.
Change-Id: I7046e0935b7261475a0f6ed49e40a6f1b86d72ec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86002
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Fixing checkpatch error/warning in dma header.
Change-Id: I86b65c25fc4b7edac9c4f1dfaf53023eb4c56036
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87544
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Some cleanups:
- Copyright year change
- Properly aligned macro.
- Defined function as static if used only in file.
- Move the macro from header to file if it is only used in driver.
- Returning proper status on callbacks.
- Adding some more comments in code.
- Rewritten some piece of code for better readability.
Change-Id: I778752668a67b849859fd7e0c11f2b7a3f3b1edc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87993
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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In order to avoid the passing of the spin lock irq flags
to different isr handler, calling the callbacks from main
isr itself. Callback function should be call without spin
lock.
Change-Id: I9e9980cef5d1de4dd4e31b8ef5fdff223b77bb22
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86873
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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This accomodates dsi second instance address space.
Bug 928423
Change-Id: I4aa3314b3227f49b3fe49552503fbdb2fd1c9ddb
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/83773
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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add support for maxim 98095 audio codec
Change-Id: I112130341363e18986158cd94a981a60a80fb0d0
Reviewed-on: http://git-master/r/75956
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/85485
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Corrected the formulas to calculate phy timing.
Added mipi d-phy constraints.
Bug 938043
Change-Id: Ie1f2dd45e7e39f83735fe28e21a62dc0415c7c00
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/85217
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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In include/linux/skbuff.h, this is already defined as max(32,
L1_CACHE_BYTES), which is identical to our define of L1_CACHE_BYTES. The
comment also mentions that there are assumptions in the code that
expects it to be at least 32.
Change-Id: If855651acf3e45b34db8d9f2c047c9fe5001b1c5
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/84106
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Configure voltage regulator.
Bug 914749
Change-Id: I6cf1924a928839249d4e62029dd14fca84b05792
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/83361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 932840
Change-Id: I12d8d2d2cd42d0dafea38463ad77b44f7e64d7c1
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/83645
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This patch fixes multiple port detection issue
in tegra pcie driver.
The issue is fixed by reserving IO resource
from ioport_resource memory and PCI MEM and
PCI PREFETCH MEM from iomem_resource. These
memory resources are common to all root
ports. The resource allocation is done in
preinit function.
MMIO space should be reserved for T30 as well.
fixes bug 637871
Signed-off-by: Manoj Chourasia<mchourasia@nvidia.com>
Change-Id: I555b90bd1e0033965c78772dbdc75ea8efd039dd
Reviewed-on: http://git-master/r/79800
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Jeremy Alves <jalves@nvidia.com>
Reviewed-by: Kaushik Sen <ksen@nvidia.com>
Tested-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Mike Thompson <mikthompson@nvidia.com>
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Bug 927513
Change-Id: Ic594fe82f004c600dc369d8323a984c7e3ec4ee7
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/82729
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
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The functon tegra_dma_dequeue() duplicates the functionality
of tegra_dma_dequeue_req().And this function does not use proper
locking before accessing the channel data.
Removing this function.
Change-Id: Ib6baaa984b038908c49adb3a0f3df3433f0a9066
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77805
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Dma user must call the function tegra_dma_get_transfer_count()
for knowing transferred count without stopping dma.
Change-Id: I5e0060fd8163b285496442268548a90bdd0e294c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77800
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Tegra3 platform may boot with one of the predefined fixed PLLP
(peripheral PLL) output rates: 216MHz, 408MHz, or 204MHz. This
commit implements auto-detection of PLLP rate, and debug uart
configuration during kernel uncompressing.
Bug 928260
Change-Id: I435c228691191434a10847fdbccef048a8d507c7
Reviewed-on: http://git-master/r/75848
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77293
Reviewed-by: Automatic_Commit_Validation_User
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Add backup clock source option in dc platform configuration. Use
backup source if fixed frequency pllp is specified as main source,
but its rate can not be divided into pixel clock within required
tolerance.
928260
Change-Id: I19bd9173276c6ea087f86361956809787875e979
Reviewed-on: http://git-master/r/76033
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76818
Reviewed-by: Automatic_Commit_Validation_User
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need to support negative values for usb calibration.
change xcvr_setup_offset from unsigned to signed.
bug 872648
(cherry picked from commit 06258b46589436b5579c8265405b1cb286c406aa)
(reviewed on http://git-master/r/66101)
Change-Id: I1ab6a63184fe48bc734152546a541085ac7c6efc
Reviewed-on: http://git-master/r/74503
Reviewed-by: Simone Willett <swillett@nvidia.com>
Signed-off-by: Ken Chang <kenc@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76464
Reviewed-by: Automatic_Commit_Validation_User
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Since dtv interface was designed based on SPI bus, it shares the same
dma configuration with SPI bus. However, it is not proper because DTV
interface has to transmit data in 4 words long constantly. The patch
added an option in tegra_dma_req to set burst size to be fixed 4 words.
fixed Bug 910227
Change-Id: I1436f0c8d108dd39edc57ae4c9cb750d9574b62c
Reviewed-on: http://git-master/r/75509
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76461
Reviewed-by: Automatic_Commit_Validation_User
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- add missing error code
- remove duplicate define
Bug 919369
Bug 919338
Change-Id: I03012050f3b6c4b7bda69657fdd5cb533dcd937e
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/74521
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-on: http://git-master/r/75544
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Added dtv interface device to Tegra3 platform.
Fixed Bug 904626
Fixed Bug 881303
Change-Id: Id2a4e6f015d3edf1ecd0e76f5586ae2ec00ed380
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/66627
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Reviewed-on: http://git-master/r/74890
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Verify the handle during conversion from user space to kernel space.
Change-Id: I7cfcc791a792f20b2df195719e28a245ba820b4e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/74467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit). This patch
implements struct iommu_ops for SMMU to be used in the standard IOMMU
API.
This H/W module supports multiple virtual address spaces(domain x4),
and manages 2 level H/W translation pagetable.
Change-Id: Iaad09401d3661bcfd6732934be9595283a46e652
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/72215
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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This is the preparation the following patches so that this header can
be referred from another directly than "arch/arm/mach-tegra".
Change-Id: I846970f306ff3daa8229e10e6f33b8e9fcf57cf9
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/73947
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: Ie1facdb47d9eae2438f1bb3928db174690dd2e4d
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/72862
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit da61c8810313729b8c8f451f6cf1586afff2bf12)
Reviewed-on: http://git-master/r/73959
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I2e7fa55c5d02ada3b203ec9627a4d91a5f17ca9b
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/73539
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit e3b0a2205133e5209a9e35c2300c03d384b1ae2a)
Reviewed-on: http://git-master/r/73954
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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mach-tegra/tegra3_tsensor.h is used for the parameterized initialization
of the tsensor device. mach-tegra/include/mach/tsensor.h is used for the
tsensor device driver.
Really, mach-tegra/tegra3_tsensor.c should go away - probably becoming a
device driver.
Change-Id: I16edae878f1e97d1654252cfee49cd9dd7f77db7
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/72481
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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-Added support for setting a pin io state to INPUT/OUTPUT.
-Exported tegra_pinmux _get_pingroup/_set_io to make them
available to loadable kernel modules.
Bug 845065
Change-Id: I7d9500f590b804d1d222dfd7e42d1dbfc6686611
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/71975
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Defined IO deep power down(DPD) APIs for tegra drivers -
tegra_io_dpd_get - returns dpd handle
tegra_io_dpd_enable - enable driver dpd
tegra_io_dpd_disable - disables driver dpd
bug 919993
Change-Id: I45976b41dca0e3e9266ace86393ef4db8b20c97b
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/72737
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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A flag, disable_ev_rep, is added to enable/disable repeat events
reported from the keyboard driver.
BUG 918758
Change-Id: I65be2f795fd64ebb7d36ad278aa2b24362c1e5ea
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/72952
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Prepare nvmap api's to be able to use Ion Memory Manger.
Change-Id: Ie7de2c4afc491290d61e8545667ffa477af32d8b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71112
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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