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path: root/arch/arm/mach-tegra/iovmm-smmu.c
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2012-05-18ARM: tegra: smmu: Use non-secure register for sync-readHiro Sugawara
Bug 973463 Change-Id: Ia2e42232e6f10d12387b2bc3bbee1f996e7aea9d Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-on: http://git-master/r/101837 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-18ARM: tegra: smmu: Save & restore correct SMMU registersHiro Sugawara
Bug 981373 Change-Id: I8617ca0ffd7df570b8ee6f3cad524decf6c26437 Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-on: http://git-master/r/101285 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-19arm: tegra: resolve compilation time warningsSanjay Singh Rawat
Bug 949219 Change-Id: I875f8688a272c415ebf345b8f30e4afdf7551b29 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/91523 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-01-12arm: tegra: smmu: Move tegra_smmu.h under "include/mach"Hiroshi DOYU
This is the preparation the following patches so that this header can be referred from another directly than "arch/arm/mach-tegra". Change-Id: I846970f306ff3daa8229e10e6f33b8e9fcf57cf9 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/73947 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-21ARM: tegra: smmu: Remove unnecessary memory barrierHiroshi DOYU
memory barrier(wmb()) doesn't affect transaction among AHB/APB bus transaction but only register read-back does. Change-Id: If8da79bc3f536bac025e408afe0f26cca2274f86 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66355 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-12-15ARM: tegra: smmu: Use BUILD_BUG_ON for build time checkHiroshi DOYU
Those checks can be done at build time. Change-Id: Ibe1bb540c5675452d5a11b34d8ff7e19d1b4bc51 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66367 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-08ARM: tegra: smmu: Fix wrong return statementHiroshi DOYU
Remove "return" in void func(). Change-Id: Icf963f976d4be2d3e930bfd201fe4e63c3456366 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66368 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-08ARM: tegra: smmu: Remove unused struct member from smmu_asHiroshi DOYU
"needs_barrier" isn't used. Change-Id: I7256dcfb5b6b0eadd409c9f6f2291e2911711b0a Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66366 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-08ARM: tegra: smmu: Use dynamic printk instead of homebrewed oneHiroshi DOYU
Replace homebrewed debug print with dynamic printk. Change-Id: I1f3222f9044f6ce42cf19a7cc28091ee5b4e7d5e Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66354 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-12-08ARM: tegra: smmu: Convert semaphore into a mutexHiroshi DOYU
The semaphore is used as a mutex, convert it to the mutex API Change-Id: I64804418c7370583a815eeb4c98475f3afbbcd11 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66353 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-12-08ARM: tegra: smmu: Remove unnecessary wmb() after L2 cache flushHiroshi DOYU
wmb() is not necessary right after outer_flush_range() because outer_flush_range() does both cache_sync () and dsb at the end of l2x0_flush_range(). Change-Id: I8de08831429ca3df7ee32e1e8871f5eccfbf69a5 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66352 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-12-08ARM: tegra: iommu: Clean up checkpatch and CodingStyle errorsHiroshi DOYU
- Fixed checkpatch.pl --strict errors. - Inserted one space around binary operators From Documentation/CodingStyle "3.1: Spaces". - Removed a file path line in the head of file. - Updated Copyright year - Removed duplicated header inclusions Change-Id: I750e31cf6e90a9f36e707a6278da6137e1a8ba05 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66351 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-12-08ARM: tegra: smmu: Fix incorrect CONFIG_TEGRA_SMMU_SYSFS nameHiroshi DOYU
Use CONFIG_TEGRA_IOVMM_SMMU_SYSFS which is defined in Kconfig file, instead of undefined CONFIG_TEGRA_SMMU_SYSFS. Change-Id: I234fac781b91497af5e5caf8e67abf44744936d2 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/66350 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-11-30arm: tegra: smmu: Remove IORESOURCE use from SMMU IOVA rangeHiro Sugawara
SMMU simply needs to know its assigned IOVA range, but does not need address space resources. Bug 874438 Change-Id: I0b9943d06c49363cfc0355586866f3bd6b217274 Reviewed-on: http://git-master/r/54534 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R3f4045ef2858960cd987a7477ec6869168ccec7d
2011-11-30arm: tegra: smmu: Add a sysfs entry for enabling page map signatureHiro Sugawara
For debugging and sanity checking, IOVA and PA are returned in each mapped page if PID matches what is set by the sysfs entry. Reviewed-on: http://git-master/r/49716 (cherry picked from commit 53e7058b8c021ad868beba6d522afd61f8b9315c) Change-Id: Ia289eeb743370366fe37b54678a7c1a657163491 Reviewed-on: http://git-master/r/54515 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: R1ba0ffd93f76001fe7b68a61c3fa0d8f44787e64
2011-11-30arm: tegra: Add sysfs entries for SMMU debuggingHiro Sugawara
CONFIG_TEGRA_SMMU_SYSFS enables /sys/devices/smmu/* entries to update various SMMU register contents from user's land. Default is "n" to allow only displaying the current values but not updating except SMMU TLB/PTC statistics enabling and disabling bits. Original-Change-Id: Icb4574c08d89006cb09da1d8d60c7ab40fefd1b1 Reviewed-on: http://git-master/r/37118 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R647d1f9a59edbbc8a60b7393cb0572a927bd6d32
2011-11-30arm: tegra: Clean up SOC conditionalsScott Williams
Change SOC conditionals to make them more forward-looking. Original-Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9 Reviewed-on: http://git-master/r/32706 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R77c675a1995116098b58f1f775bc7c3cc8722998
2011-11-30arm: tegra: iovmm: Move SMMU window to bottom 1GB for AVPHiro Sugawara
Tegra3 A01 continues to use the high address range. Tegra3 A02 (and after) uses the bottom 1GB. The new AHB register bit access has no effect to Tegra3 A01. Original-Change-Id: I90cedbb22d9aae4307908750ebeb03bef639945c Reviewed-on: http://git-master/r/23379 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: I33253f8ae32c416a9d19694e87380dbae94c2f68 Rebase-Id: Rf2d058998ea09fcbe44fe3c61493a46938505c0b
2011-11-30[arm:tegra] Adding more debug printoutsHiro Sugawara
Original-Change-Id: I291b01285f88d6bcbc74563c8667b0f17fcf8a6b Reviewed-on: http://git-master/r/19519 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I7010bbb2b06fa2c9317c76b111c511199a4c9686 Rebase-Id: Rbeb18705f6cdff98f6dea3fe2c8c25828b2254f1
2011-11-30[arm:tegra] fix deadlock inside smmu_setup_regsJin Qian
Original-Change-Id: I6862ff83d67145971304716ee418af48d433311f Reviewed-on: http://git-master/r/21147 Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: Icc9e651d6394ca933983a5df56f5cafe21299d23 Rebase-Id: R04ca6cc6abdbfa6a0de8c75d7028a5ad7f834da5
2011-11-30[arm:tegra] Adding more sysfs entries for SMMU debuggingHiro Sugawara
Original-Change-Id: I3c3fbb510e70dd98ec4bc2e89c2e4f544fef6078 Reviewed-on: http://git-master/r/17558 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I84c64f33dc61e382b2e68bffa31a479277a4294a Rebase-Id: R77c705796435c92574405bb23b9942b6313813db
2011-11-30[nvrm SMMU] Adding more precice SMMU cache controlHiro Sugawara
More precice contol of SMMU's PTC and TLB caches to eradicate page access faults. Refer to change 11647. Original-Change-Id: I5b8a4bdb313dd606b0217b2ba202c544e5e179c5 Reviewed-on: http://git-master/r/15548 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: Ib8d164c2e8fcef901188cba5c793eb0986b4e2b6 Rebase-Id: R6fe08bce725ae8138d2278f592d6ab7930daf563
2011-11-30[ARM/tegra] Add Tegra3 supportScott Williams
Bug 764354 Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046 Reviewed-on: http://git-master/r/12228 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081 Rebase-Id: R2866240384c6c24f46bd7ef54bc3dc9140d9e96b
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-02 00:48:49 +0000