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Used round rate API to determine maximum frequency of Tegra3 activity
monitoring shared users, instead of maximum rate directly. The former
takes into account available PLL/dividers and return actually
reachable frequency.
Bug 860618
Original-Change-Id: I48292c65bfbf58906ab59f86959b0e7155117558
Reviewed-on: http://git-master/r/45711
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Tested-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Rebase-Id: R2be5b1549b53d2b203ccfe6ea1d1cd2368359d91
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Move call to clock get rate API (can sleep) outside of activity
monitor resume section protected by spin lock.
Original-Change-Id: I78d5bb8728f3a728a6ff952b1f3cba19b9dec0a0
Reviewed-on: http://git-master/r/41626
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R1ab0bb59a88f078f85f125b968546c09aab9d176
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Bug 845349
Original-Change-Id: I0ce1a5da9a80cea6a4e55bc92490e6ae8508e22f
Reviewed-on: http://git-master/r/39704
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rfc2bfc89082778e43d15406b0b5e53bdf845f08e
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Added AVP clock control using Tegra3 activity monitoring device.
The target AVP frequency floor is set based on average load and
short term boost. Average AVP load time (time when AVP is not
halted by flow controller) is determined by fixed frequency count
provided by monitoring h/w featuring 1st order IIR activity filter.
The boost frequency is calculated by s/w - exponentially increasing/
decreasing when sampled AVP activity has crossed upper/lower boost
watermarks.
The implementation is interrupt driven - periodic sampling is hidden
by h/w. The tune-able debugfs parameters are:
/sys/kernel/debug/tegra_actmon/avp/boost_step - boost rate increase
step (% of max AVP frequency)
/sys/kernel/debug/tegra_actmon/avp/boost_rate_inc - boost rate
increase factor (%)
/sys/kernel/debug/tegra_actmon/avp/boost_rate_dec - boost rate
decrease factor (%)
/sys/kernel/debug/tegra_actmon/avp/boost_threshold_up - upper
activity watermark for boost increase (AVP active time in %)
/sys/kernel/debug/tegra_actmon/avp/boost_threshold_dn - lower
activity watermark for boost decrease (AVP active time in %)
Original-Change-Id: Ia82247176531f2fb67acfc277e63b9f16916a488
Reviewed-on: http://git-master/r/37175
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R995949fe30f188c16c3fa39e292a2ca56256f2a3
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Added EMC clock control using Tegra3 activity monitoring device.
The target EMC frequency floor is set based on average activity
and short term boost. Average EMC activity is obtained directly
from monitoring h/w featuring 1st order IIR activity filter. The
boost frequency is calculated by s/w - exponentially increasing/
decreasing when sampled EMC activity has crossed upper/lower boost
watermarks.
The implementation is interrupt driven - periodic sampling is hidden
by h/w. The tune-able debugfs parameters are:
/sys/kernel/debug/tegra_actmon/emc/boost_step - boost rate increase
step (% of max EMC frequency)
/sys/kernel/debug/tegra_actmon/emc/boost_rate_inc - boost rate
increase factor (%)
/sys/kernel/debug/tegra_actmon/emc/boost_rate_dec - boost rate
decrease factor (%)
/sys/kernel/debug/tegra_actmon/emc/boost_threshold_up - upper
activity watermark for boost increase (% of current EMC frequency)
/sys/kernel/debug/tegra_actmon/emc/boost_threshold_dn - lower
activity watermark for boost decrease (% of current EMC frequency)
Original-Change-Id: I385c6e0a75da42dada792db6b4018b68fea8f23b
Reviewed-on: http://git-master/r/36790
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R0ac50b162b8e86237986885e115996f755b1e00a
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