summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/tegra_cl_dvfs.h
AgeCommit message (Expand)Author
2013-02-11ARM: tegra11: dvfs: Upgrade CL-DVFS disable output opsAlex Frid
2012-10-22ARM: tegra11: dvfs: Dynamically allocate cl dvfs objectAlex Frid
2012-10-22ARM: tegra11: dvfs: Add CL-DVFS platform deviceAlex Frid
2012-10-22ARM: tegra11: dvfs: Remove CL-DVFS I2C fast clockAlex Frid
2012-10-22ARM: tegra11: clock: Add DFLL resume operationAlex Frid
2012-10-10ARM: tegra11: dvfs: Integrate dfll mode data with dvfs tableAlex Frid
2012-09-26arm: tegra: fix cl_dvfs typoTom Cherry
2012-08-14ARM: tegra11: dvfs: Rename CL-DVFS data structureAlex Frid
2012-08-14ARM: tegra11: dvfs: Add cpu cvb dvfs templateAlex Frid
2012-08-14Revert "ARM: Tegra11: cl_dvfs: change MAX_CL_DVFS_VOLTAGES from 33 to 41"Alex Frid
2012-07-30ARM: Tegra11: cl_dvfs: change MAX_CL_DVFS_VOLTAGES from 33 to 41Varun Wadekar
2012-07-27ARM: tegra11: dvfs: Update CL-DVFS clock definitionsAlex Frid
2012-07-27ARM: tegra11: dvfs: Re-factor CL-DVFS initializationAlex Frid
2012-07-27ARM: tegra11: dvfs: Update CL-DVFS configurationAlex Frid
2012-06-29ARM: tegra11: dvfs: Separate dfll and legacy dvfs min voltagesAlex Frid
2012-06-29ARM: tegra11: dvfs: Separate dfll droop and out min ratesAlex Frid
2012-06-27ARM: tegra11: dvfs: Update CL-DVFS configurationAlex Frid
2012-06-27ARM: tegra11: dvfs: Re-factor CL-DVFS supportAlex Frid
2012-06-26ARM: tegra11: clock: Add DFLL clock sourceAlex Frid
2012-06-26ARM: tegra11: dvfs: Add CL-DVFS module initializationAlex Frid
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-31 01:29:51 +0000