summaryrefslogtreecommitdiff
path: root/arch/arm/mach-vexpress/ct-ca9x4.c
AgeCommit message (Collapse)Author
2011-11-11ARM: smp: fix clipping of number of CPUsRussell King
commit a06f916b7a9b57447ceb875eb0a89f1a66b31bca upstream. Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Reported-by: Mark Salter <msalter@redhat.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-07-07ARM: 6993/1: platsmp: Allow secondary cpu hotplug with maxcpus=1Stephen Boyd
If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King
'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
2011-05-23clockevents: ARM sp804: obtain sp804 timer rate via clksRussell King
This allows platforms to specify the rate of the SP804 clockevent via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clockevents: ARM sp804: allow clockevent name to be specifiedRussell King
This allows platforms to specify the clcokevent name upon registration. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clocksource: ARM sp804: obtain sp804 timer rate via clksRussell King
This allows platforms to specify the rate of the SP804 clocksource via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clocksource: ARM sp804: allow clocksource name to be specifiedRussell King
This allows platforms to specify the clocksource name upon registration, which is necessary should they wish to register more than one sp804 clocksource. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23ARM: consolidate SMP cross call implementationRussell King
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-20ARM: 6771/1: vexpress: add support for multiple core tilesWill Deacon
The current Versatile Express BSP defines the MACHINE_START macro in the core tile code. This patch moves this into the generic board code and introduces a method for determining the current tile at runtime, allowing the Kernel to have support for multiple tiles compiled in. Tile-specific functions are executed via a descriptor struct containing the correct implementations for the current tile. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-20Merge branches 'fixes', 'pgt-next' and 'versatile' into develRussell King
2011-02-19ARM: vexpress: use new init_early for clock tree and sched_clock initRussell King
Initialize the clock tree and our sched_clock() early. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-19ARM: vexpress: switch Versatile Express to use consolidated CLCDRussell King
This switches Versatile Express to use the conslidated CLCD panel support, including the display capabilities. As Versatile Express uses a PL111, it can support the full range of pixel formats - 444, 5551, 565 in both RGB and BGR mode. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-17ARM: P2V: avoid initializers and assembly using PHYS_OFFSETRussell King
As PHYS_OFFSET will be becoming a variable, we can't have it used in initializers nor assembly code. Replace those in generic code with a run-time initialization. Replace those in platform code using the individual platform specific PLAT_PHYS_OFFSET. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-06Merge branch 'misc' into develRussell King
Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
2011-01-06Merge branch 'smp' into miscRussell King
Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
2011-01-05Merge branches 'ftrace', 'gic', 'io', 'kexec', 'mod', 'sa11x0', 'sh' and ↵Russell King
'versatile' into devel
2010-12-14ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: provide a single initialization function for boot CPURussell King
Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: 6483/1: arm & sh: factorised duplicated clkdev.cJean-Christop PLAGNIOL-VILLARD
factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-10ARM: 6472/1: vexpress ct-ca9x4: only set twd_base if local timers are being usedWill Deacon
In commit bde28b84, I made the assumption that CONFIG_SMP is always set for the quad-core ct-ca9x4 platform. As it turns out, people who aren't using the SMP goodness are confronted with a build failure. This patch fixes this issue by ensure that twd_base is only set if local timers are being used (and therefore SMP support is configured). Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-04ARM: 6432/1: move timer-sp.c from versatile to commonRob Herring
From: Rob Herring <rob.herring@smooth-stone.com> The timer-sp h/w used on versatile platforms can also be used for other platforms, so move it to a common location. Signed-off-by: Rob Herring <rob.herring@smooth-stone.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-20arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-05ARM: fix section mismatch warnings in Versatile ExpressRussell King
WARNING: vmlinux.o(.text+0xbf30): Section mismatch in reference from the function v2m_timer_init() to the function .init.text:sp804_clocksource_init() The function v2m_timer_init() references the function __init sp804_clocksource_init(). This is often because v2m_timer_init lacks a __init annotation or the annotation of sp804_clocksource_init is wrong. WARNING: vmlinux.o(.text+0xbf3c): Section mismatch in reference from the function v2m_timer_init() to the function .init.text:sp804_clockevents_init() The function v2m_timer_init() references the function __init sp804_clockevents_init(). This is often because v2m_timer_init lacks a __init annotation or the annotation of sp804_clockevents_init is wrong. WARNING: vmlinux.o(.text+0xc524): Section mismatch in reference from the function ct_ca9x4_init() to the function .init.text:l2x0_init() The function ct_ca9x4_init() references the function __init l2x0_init(). This is often because ct_ca9x4_init lacks a __init annotation or the annotation of l2x0_init is wrong. WARNING: vmlinux.o(.text+0xc530): Section mismatch in reference from the function ct_ca9x4_init() to the function .init.text:clkdev_add_table() The function ct_ca9x4_init() references the function __init clkdev_add_table(). This is often because ct_ca9x4_init lacks a __init annotation or the annotation of clkdev_add_table is wrong. WARNING: vmlinux.o(.text+0xc578): Section mismatch in reference from the function ct_ca9x4_init() to the (unknown reference) .init.data:(unknown) The function ct_ca9x4_init() references the (unknown reference) __initdata (unknown). This is often because ct_ca9x4_init lacks a __initdata annotation or the annotation of (unknown) is wrong. Fix these by making ct_ca9x4_init() and v2m_timer_init() both __init. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-27ARM: 6411/1: vexpress: set RAM latencies to 1 cycle for PL310 on ct-ca9x4 tileWill Deacon
The PL310 on the ct-ca9x4 tile for the Versatile Express does not need to add additional latency when accessing its cache RAMs. Unfortunately, the boot monitor sets this up for an 8-cycle delay on reads and writes, resulting in greatly reduced memory performance when the L2 cache is enabled. This patch sets the L2 RAM latencies to the correct value of 1 cycle on the ct-ca9x4 tile before enabling the L2 cache. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-17ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr ↵Catalin Marinas
register Clearing bit 22 in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: <stable@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09ARM: 6218/1: Versatile Express: add support for local timers on CA9X4 ↵Will Deacon
daughterboard This patch adds support for the Cortex-A9 local timers available when using the CA9X4 daughterboard with the Versatile Express. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB sectionCatalin Marinas
When not aligned, random bits could be written in the initial page table by the __create_page_tables() function. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-06-28arm: update gfp/slab.h includesTejun Heo
Implicit slab.h inclusion via percpu.h is about to go away. Make sure gfp.h or slab.h is included as necessary. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2010-05-02ARM: 6057/1: Realview: register PMU IRQs during board initialisationWill Deacon
This patch updates the initialisation routines for the Realview boards and the Versatile Express board [ca9x4 tile] so that they register their PMU IRQs with the PMU framework in the Kernel. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02ARM: Add Versatile Express CA9x4 processor supportRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-04 20:06:32 +0000