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Rename fsl-imx8qm-mek.dts to fsl-imx8qm-mek.dtsi and keep /dts-v1/ in
fsl-imx8qm-mek.dts, then let fsl-imx8qm-mek.dts include
fsl-imx8qm-mek.dtsi.
This is to prepare adding /memreserve/ for mek dom0 dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
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Adjust passive trip point temperature to be 20 degree C
below than the critical trip point temperature on i.MX8X
platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cefa63c1b9873e5e60f4db1e77bfecfaf18ff799)
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This patch enables pixel combiners for the i.MX8qm MEK platform.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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Add flexcan 1, 2 ,3 support for imx8qm.
Signed-off-by: Xiaoning Wang <xiaoning.wang@nxp.com>
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By default, imx8qm b0 silicon set the IO voltage to 2.5v, but the arm2
board is designed as 1.8v voltage for enet IO, so force the IO voltage
to 1.8 by setting COMP_CTL_GPIO_1V8_3V3 pins like:
For ENET0: SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB
For ENET1: SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA
The pin setting:
1.8V/3.3V : bit4=0, bit[30]=1, bit[2:0]=000
2.5V : bit4=1, bit[30]=1, bit[2:0]=010
For 2.5v IO timing test, HW board need to do some rework:
- Force PHY work at 2.5v mode
- Supply 2.5v voltage to VDD_ENETx
Tested-by: Sandor Yu <Sandor.yu@nxp.com>
Tested-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Enable VPU driver for 8qm mek B0 by changing fsl-imx8qm-mek.dts
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
(cherry picked from commit 78ac6d510298c6add57d4d8d457c8064fe31bb04)
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Support ASRC P2P with ESAI to show the multichannel capibility.
And make this setting align with other platform like imx6
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
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Optimize the pciea disable pin to drive NTB0104 device:
(NTB0104 requires at least 2 mA per data sheet)
- push-pull output
- pull disabled
- high drive strength
And the patch also change the lvds gpio to lsio gpio.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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suspend/resume
Added no_clk_reset property for 8M dts files, since DSI doesn't need
it's clocks stopped during suspend.
Also, added power on delay for 8QM and 8QXP for a better suspend/resume
stability.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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In order to enlarge the CMA easily, change the rpmsg
reserved memory region from 0xb800_0000 to 0x9000_0000.
And refine the layout of the reserved memory.
- RPMSG buffers are allocated from CMA dynamically, and have to
be accessed by M4 side. But M4 can only access the 1.5Gbytes
DDR memory from 0x8000_0000. So, the finial reserved memory
layout is just like the one below.
Thus, the largest size of the DDR memory left for CMA, is about
1212Mbytes in theory, since 32Mbytes alignment is required by
CMA allocation.
reserved-memory layout
0x8800_0000 ~ 0x8FFF_FFFF M4 + RTOS(128M)
0x9000_0000 ~ 0x903F_FFFF RPMSG Vring(4M)
0x9440_0000 ~ 0xDFFF_FFFF(MAX) CMA(1212M)(MAX)
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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i.MX8QM contains two adc, and for imx8qm-mek board, only reserve one
pin for adc0 (ADC_IN0).
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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The correct default should be 0x04000021. In which we have the open
drain input option for field [25:26] with a pull up resistor and low
drive strength. This will allow the end point device to drive low the
wake and clkreq signals when necessary and don't have the PCIe
driving back to the endpoint device.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Add the cpu cooling device to the PMIC thermal zone on imx8qm and
imx8qxp mek baord.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Replace mipi csi gpio pin with generic gpio pin.
Reviewed-by: sandor.yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit 36b7f6948052d4687fb11b86ec0403869133fc80)
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according to IC suggestion, usdhc clock pad need to be configed as
input/output mode, for other usdhc pad, including the strobe pad, need
to be configed as normal mode.
This patch do the change on the imx8qxp and imx8qm board.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Enable i.MX8QM MEK board PMIC thermal zone.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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According to the Reference manual, the bit 1-4 of PAD setting is reserved.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Too many i2c slaves are conencted to imx8qm i2c0 and
imx8qxp lpi2c1. So i2c pad drive strength should be
increased. Otherwise, there will be i2c probe error.
Reported-by: Andy Tian <yang.tian@nxp.com>
Tested-by: Andy Tian <yang.tian@nxp.com>
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
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Add enet2 phy regulator to fix IO voltage 1.8v for MEK board.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Gao Pan <pandy.gao@nxp.com>
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add emvsim0 device node for imx8qm-mek to support EMVSIM
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
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Final step for the OF_DYNAMIC support: enable the LVDS and MIPI-DSI to
HDMI converter nodes by default in the main DTS file for each platform.
This patch enables these nodes for i.MX8QM MEK board.
Also, use adi,dsi-channel = <1> for ADV7535, since the panel can only
work on channel 0. By using channel 1 for ADV7535, we can have them work
simultaneously: one on DSI0 and the other on DSI1.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
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Add mipi csi0/csi1 GPIO propriety.
Add pinctrl setting for mipi_csi0/1 GPIO.
Add power up pin for max9286.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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For the slot support SD3.0 card, during system suspend, if plug out
the sd card, and insert another SD3.0 card, after system resume back,
SD3.0 card can't be recognized as SD3.0 card, just SD2.0 card.
This is because the time delay between vmmc regulator off and on is
too small. SD spec require the Card Vdd shall be lowered to less than
0.5v for a minimum period for 1ms. And the hardware regulator also need
some time to drop the Card Vdd from 3.3v to 0.5v. This patch add the
off-on-delay in vmmc-supply regulator adding the upper two limitation
into consideration.
This patch relay on the commit 878bff7648f5 ("MLK-14638-1 regulator:
fixed: add off_on_delay support").
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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As imx8qm MEK typec port only can support power source on power role,
remove those properties for power sink after we add fixed power sink
settings.
Tested-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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Enable mipi csi 1 in the dts.
MAX support eight cameras for imx8qm mek board with the dtb.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Add DTS files fo quad display on 8QM boards. Currently, there is only
one file for this: fsl-imx8qm-lpddr4-arm2-it6263-adv7535.dts, which is
the combination for 2 LVDS + 2 MIPI-HDMI on LPDDR4 board.
This patch adds the other possible use-cases:
- 2 LVDS + 2 MIPI-Panel on LPDDR4
- 2 LVDS + 2 MIPI-HDMI on MEK
- 2 LVDS + 2 MIPI-Panel on MEK
Also:
- fix the fsl-imx8qm-lpddr4-arm2-it6263-adv7535.dts, since it
contained the old mipi_dsi nodes.
- fix the order of mipi_dsi nodes in fsl-imx8qm.dtsi, since this order
affects the suspend/resume routines.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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This patch adds DPR and PRG support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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- USB2 Dual-role support, and below rework is needed:
Remove R295, R296, R122, and install R116, R117, R127
- USB3 Dual-role support
BuildInfo:
- SCFW 245582b, IMX-MKIMAGE 0ad6069a, ATF 6bd98a3
- U-Boot 2017.03-imx_v2017.03+gfa65b0a
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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enable i2c0 add sensor support imx8qm-mek:
isl29023, fxos8700, fxas2100x, mpl3115
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
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and rm67191
This patch addes MIPI-DSI support with the ADV7535 DSI-HDMI converter
and DSI Panel Raydium RM67191 for the i.MX8QM MEK board.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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This patch adds LVDS0/1 PWM backlight support
for the i.MX8QM MEK platform.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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- Add the clk_req property for imx8 pcie, make sure that
the clk_req would be active.
- Correct the spell mistake of pcie pinctrl on imx8qxp.
- Fix the potential conflication with the usage of SC MU,
remove the useless "fsl,imx8-mu" of rpmsg.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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enet pins dual voltage pads, bit[0] define the drive strength slection,
bit[4:1] are reserved, and bit[6:5] define the pull down and pull up.
The patch remove the reserved bits setting and pull up the pin.
BuildInfo:
- SCFW daf9431c, IMX-MKIMAGE 1c6fc7d8, ATF f2547fb
- U-Boot 2017.03-00097-gd7599cf
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Pandy.gao <pandy.gao@nxp.com>
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When play the mono stream, there is no data in right channel,
but if config the pin IO in pull up or pull down state, the codec
can get no zero data in right channel, then user can hear noise.
config the pin in no pull state to fix the noise issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Move AMIX SAIs MCLKs to AUD_PLL1 and double the frequency
in order to support 64k rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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add mlb support for imx8qm mek board
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
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cs42888 can be found on i.mx8 QM MEK CPU board. It uses esai0 as a
digital audio interface.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Enable it6263 lvds0 in base device tree for 8QM MEK and ARM2
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
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Enable audio mixer.
BuildInfo:
- SCFW f5910b7d, IMX-MKIMAGE 2522fd70, ATF a438801
- U-Boot 2017.03-00047-g8fe8d6d
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
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CM4_1 core will use the UART2 on QM MEK base board as its console. Since this port currently
is a backup debug port on A core side, not really used. We disable it in dts to yield the port
for CM4_1.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
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Even the clock is not used by current device, but it is used by
other devices, it also need to be included in the assigned-clocks
list. For in kernel side, clock rate is stored, but in scfw
the clock rate is cleared when power off, this mismatch cause
the parent rate is not set in next device, then children clock rate
is wrong.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
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- enable imx8qm sata.
- correct sata power supply.
- sata clks:
satahost_clk hsio_lpcg_sata
phyx1_pclk phyx1_lpcg
phyx1_epcs_tx_clk phyx1_lpcg
hyx1_epcs_rx_clk phyx1_lpcg
phyx2_pclk0 phyx2_lpcg
phyx2_pclk1 phyx2_lpcg
BuildInfo:
- SCFW 9559d5ec, IMX-MKIMAGE 06bc2767, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Pass debug_console port info for power domain driver awareness.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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With this patch 'Playback Volume' control is now usable and
we can notice that the sound volume changes.
BuildInfo:
- SCFW f5910b7d, IMX-MKIMAGE fb52c576, ATF a438801
- U-Boot 2017.03-00047-g8fe8d6d
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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Enable mipi csi driver in imx8qm mek board.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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NXP pca6416 is compatible with TI tca6416 and it's on M41 I2C bus.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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add device tree node to support flexspi on i.MX8QM MEK board.
BuildInfo:
- SCFW 9e9f6ec6, IMX-MKIMAGE e1b3bc76, ATF 0
- U-Boot 2017.03-00072-gfdcf70a
Signed-off-by: Han Xu <han.xu@nxp.com>
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Because there are two m4 cores on imx8qm,
enable imx8qm multi-core rpmsg support
BuildInfo:
- SCFW a6fd9a48, IMX-MKIMAGE 0, ATF 0
- U-Boot 2017.03-imx_v2017.03_4.9.11_imx8_alpha+g258936c
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Tested-by: Andy Duan <fugang.duan@nxp.com>
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Add 1CQ wifi bt support for i.MX8QM MEK board.
- Support MEK onboard pcie0 M.2 interface, test pass on 1CQ wifi.
- Support HCI Uart interface, test pass on 1CQ bt.
- Add lpuart interface support for bt, console, mkbus.
BuildInfo:
- SCFW d0458f9f, IMX-MKIMAGE 1c6fc7d8, ATF a438801
- U-Boot 2017.03-00042-g543559e
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Add enet2 for MEK base board.
BuildInfo:
- SCFW d0458f9f, IMX-MKIMAGE 1c6fc7d8, ATF a438801
- U-Boot 2017.03-00042-g543559e
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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