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the region of CMA associated with M0+ core is in [256M, 1G]
It can't be guaranteed that it's uncachable for M0+ core.
There are some risk, reserve memory to make sure it's in [128M, 256M].
Eliminate the potential risks
Signed-off-by: ming_qian <ming.qian@nxp.com>
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vpu decoder rpc
For vpu decoder change from 0x9040_0000 ~ 0x905F_FFFF to
0x9200_0000 ~ 0x921F_FFFF
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
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to reduce the memory hole of the reserved memory layout,
adjust reserved memory region of vpu encoder rpc from
0x9060_0000 ~ 0x907F_FFFF to 0x9220_0000 ~ 0x923F_FFFF
Signed-off-by: ming_qian <ming.qian@nxp.com>
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We are using SPI 33 for virtual PL031, but dom0 not passthrough
the interrupt, so domu are not able to use this.
In this patch also correct domu android car rtc node interrupts
property.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
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Rename fsl-imx8qxp-mek.dts to fsl-imx8qxp-mek.dtsi.
remove /dts-v1/ from dtsi.
Add memreserve for dom0 dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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xen does not support wu interrupt controller, it will cause dom0
boot failure, modify the nodes that use wu to use gic and remove wu.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
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Introudce dom0 dts.
disable rtc, we do not have sip handler in xen, also need to modify the
driver to use hvc call.
remove gpu ss reg property to avoid overriding dom0 mapping.
Modify lpuart0 interrupt-parent to use gic, because xen could only
handle gic.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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