summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2012-04-06config: rename+move bcm4329 nvram fileMursalin Akon
bcm43330 nvram file is located as /lib/firmware/nvram_4330.txt. Make the name convension and location the same for bcm4329 nvram file. Bug 953186 Change-Id: Id1a606b341302dbef98f9edb481c18a8f3b3617d Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/94571 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05ARM: Fix calling ipi_timer() from local timer IRQAntti P Miettinen
Commit d4c9c46147102dfc403691ed52609ae36ba5df08 moved irq_enter()/irq_exit() calls around. This caused irq_enter()/irq_exit() for ipi_timer() to be missing when ipi_timer() was called from local timer IRQ. Add the missing calls. Bug 961231 Change-Id: I32bfdf2620ca3df31d90f16924b06f4a1e24c0b7 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/94566 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked onlineThomas Gleinxer
The problem is related to the early enabling of interrupts and the per cpu timer setup before the cpu is marked online. This doesn't need to be done in order to call calibrate_delay(). calibrate_delay() monitors jiffies, which are updated from the CPU which is waiting for the new CPU to set the online bit. So simply calibrate_delay() can be called on the new CPU just from the interrupt disabled region and move the local timer setup after stored the cpu data and before enabling interrupts. This solves both the cpu_online vs. cpu_active problem and the affinity setting of the per cpu timers. Change-Id: I3ce734e674715f59d057a76821fc5f93706b875f Signed-off-by: Thomas Gleinxer <tglx@linutronix.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/87227 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: SMP: wait for CPU to be marked activeRussell King
When we bring a CPU online, we should wait for it to become active before entering the idle thread, so we know that the scheduler and thread migration is going to work. Change-Id: I0fa128768f575ddd0a5d976be66869dbd88f355e Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/87226 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: tegra20: pm: flush L1 data before exit coherencyPrashant Gaikwad
Bug 934368 Change-Id: I960d8ae5c6390e719b8ee6c9cbc067cf8d28122d Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/92543 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
2012-04-05ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPUVarun Wadekar
Change-Id: Ib16ee5efdf8686d750a5263baa8fff4d258e68cd Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/92542 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: tegra: rethink the cpu suspend-resume code pathVarun Wadekar
The current kernel methodology expects that tegra_cpu_suspend is actually the last function in the entire suspend sequence. In order to achieve this, the code needs to be remodelled a bit so that we actually execute native cpu_suspend at the end of the suspend sequence. This allows us to leverage all the cpu_suspend code developed by ARM in the upstream kernels. Bug 934368 Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/84481 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPENDVarun Wadekar
Bug 934368 Change-Id: Ic9d75cbb0c324b1858b2e476e33dd4f96349bce3 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/86351 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05Revert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"Dan Willemsen
This reverts commit 48565a367997c1748c655bc834e06b348d4e5b2c. Change-Id: I0e1411f1260ae916c510478276d88b41416a0d42 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85670 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-05ARM: pm: add L2 cache cleaning for suspendRussell King
We need to ensure that state is pushed out from the L2 cache when suspending so that the resume paths can access their data before the MMU and caches have been re-initialized. Add the necessary calls to __cpu_suspend_save(). Change-Id: Idf7516347478731b722e62a37b5cc9f1c52be68e Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85729 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: convert some assembly to CRussell King
Convert some of the sleep.S guts to C code, which makes it easier to use our macros and to add L2 cache handling. We provide a helper function, __cpu_suspend_save(), which deals with saving the common state, setting up for resume, and flushing caches. The remainder left as assembly code is the saving of the CPU general purpose registers, and allocating space on the stack to save the CPU specific registers and resume state. Change-Id: I0e8bc196fa7302cfe52c17d39675dadf25ea1004 Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85728 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: no need to save/restore context ID registerRussell King
There is no need to save and restore the context ID register on ARMv6 and ARMv7 with a temporary page table as we write the context ID register when we switch back to the real page tables for the thread. Moreover, the temporary page tables do not contain any non-global mappings, so the context ID value should not be used. To be safe, initialize the register to a reserved context ID value. Change-Id: I7de05e736dde5bc1b8ab682a8660eaaba52104cf Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85727 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: get rid of cpu_resume_turn_mmu_onRussell King
We don't require cpu_resume_turn_mmu_on as we can combine the ldr instruction with the following code provided we ensure that cpu_resume_mmu is aligned for older CPUs. Note that we also align to a 32-byte boundary to ensure that the code can't cross a section boundary. Change-Id: I356eeff464eec48d167d98ee45b80b300d7c4c99 Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85726 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: only use preallocated page table during resumeVarun Wadekar
Only use the preallocated page table during the resume, not while suspending. This avoids the overhead of having to switch unnecessarily to the resume page table in the suspend path. Change-Id: Ib71c9b60b0ec39749aadc6f592549d213e6a852e Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85725 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: preallocate a page table for suspend/resumeRussell King
Preallocate a page table and setup an identity mapping for the MMU enable code. This means we don't have to "borrow" a page table to do this, avoiding complexities with L2 cache coherency. Change-Id: I625d3622359e961e4f358171e9a82b51bcecf9c2 Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85671 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05ARM: pm: force non-zero return value from __cpu_suspend when abortingRussell King
Ensure that the return value from __cpu_suspend is non-zero when aborting. Zero indicates a successful suspend occurred. Change-Id: I53afba30ecd8a34ea16f39eaafa07e7b0c127e64 Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/85669 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05config: tegra[3]: remove trailing /Mursalin Akon
Remove the trailing / from bcmdhd firmware path. Change-Id: I76e415784cd29bf2551b36c236d84bcbbc5bda1b Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/94557 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05ARM: tegra: Enterprise: Provide settling time for 3.3 Voltage railChaitanya Bandi
It is observed that voltage rails for 3V3 is taking around 400us for setting it output. Providing the startup delay of 500us for this rail so that rails are stablized at desired level before any consumer uses that rail. Bug 959902 Change-Id: I602b428db44d595a94d69fccb3340a77c3819a3b Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/94537 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05dmaengine/dma_slave: introduce inline wrappersAlexandre Bounine
Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to hide new parameter from current users of affected interfaces. Convert current users to use new wrappers instead of direct calls. Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269]. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 Change-Id: I929a49556539621a0546829e88b3caa498c94be2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94463
2012-04-05arm: tegra: turn off pll-a/p in LP1Mayuresh Kulkarni
- current code does not turn off pll-a/p in LP1 irrespective of voice call status - add a new flag to indicate voice call on-going - use PMC_SCRATCH37 to hold this flag - if it is set, do not turn-off pll-a/p during LP1 - save-restore PMC_SCRATCH37 if it was used to hold the voice call on-going flag - fix few misc formatting issues in tegra3_cpu_clk32k Bug 924817 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/85768 (cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054) Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29 Reviewed-on: http://git-master/r/94395 Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-05ARM: tegra: p852: fix kernel bootVishal Singh
CSUS clock can't be driven from any clk other than clk_m. So updating its parent to clk_m. Removing pll_m's entry as it's already enabled and running at 666 MHz which is our requirement. Removing tegra_init_suspend() as it's not needed on p852. Bug 938667. Bug 949584. Change-Id: Id62401de11d213d4e0b87b52fe30e2b37372bbea Signed-off-by: Vishal Singh <vissingh@nvidia.com> Reviewed-on: http://git-master/r/94237 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-05ARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCHLaxman Dewangan
Removing config variable CONFIG_REGULATOR_GPIO_SWITCH as the same functionality can be achieve with fixed regulator. Change-Id: I803105f2a247da70721f29562881448bb00d3a44 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94197 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05ARM: tegra: cardhu: Use fixed regulator for open drain gpioLaxman Dewangan
The gpio regulator which is controlled through the gpio, which is open drain type, is using the gpio_switch regulator. The open drain support is added into the fixed regulator and hence moving the regulator to use fixed regulator. Change-Id: I1428d7e10ff469587c45fe913c4be8b4e35cb5bd Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94196 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-05arm: tegra: enterprise: enable pullup for preq1 on A03/A04Tom Cherry
Bug 958089 Reviewed-on: http://git-master/r/92054 (cherry picked from commit 92ff85f937cefc0fbe029607e23557adcf13f9fd) Change-Id: I7e8815f758c2527da3ab635f102888e5a6d5e951 Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/94118 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-05arm: tegra: enterprise: Calibrated A03/A04 backlight tableTom Cherry
Bug 956246 Reviewed-on: http://git-master/r/93644 (cherry picked from commit 5009daf8f362b11810f19253d747042b41badfd3) Change-Id: I5752eb06a95986c974acce24fa63e1c13e47cd4e Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/94116 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-04-05ARM: tegra: kai: Update measured backlight outputDaniel Solomon
Update measured backlight output for correct linearization. Bug 962780 Change-Id: Ic35b159a0b951eafff7890e7a7487f3c94b468e8 Signed-off-by: Daniel Solomon <daniels@nvidia.com> Reviewed-on: http://git-master/r/93744 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hu He <hhe@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-04-05ARM: tegra: fuse: Use tegra_dma_cancel() to abort requestLaxman Dewangan
To terminate request from dma, use the tegra_dma_cancel() inplace of tegra_dma_dequeue(). The api tegra_dma_dequeue() is getting to be obsolete. Change-Id: I4b886489458e4ec8f5eb43d857bf710fbb56f5ee Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91751 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2012-04-04mach-tegra: customize modem parameters for voice call.Ankit Gupta
Add support to customize modem parameters for voice call. Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com> Change-Id: I6a9e5918f709cbb004b66d16112346b692af477b Reviewed-on: http://git-master/r/93096 Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-04-03arm: tegra3: change min_rate for sclkAmit Kamath
Change the minimal rate of sclk to 12 MHz and set the lowest frequency of sbus to be 40 MHz when display is on. bug 939415 Original change http://git-master/r/#change,76959 Change-Id: I81cda6a95494764721c1be5b4001c476f3aed6ab Signed-off-by: Amit Kamath <akamath@nvidia.com> Reviewed-on: http://git-master/r/93850 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-03ARM: tegra: clock: Set EMC and SCLK rates suspend floorsAlex Frid
- On suspend entry set EMC rate floor high enough to select PLLM as EMC clock source, since PLLM is always turned off in suspend. - On suspend entry set SCLK (AVP) rate floor to speed-up system bus during save/restore procedures. Bug 939942 Bug 938649 Reviewed-on: http://git-master/r/89234 (cherry picked from commit ccfdaef143f9017d682af017e11a25c3e5bcf3a7) Change-Id: I4e1d66521f1f3453502c471999a52637c3d489aa Signed-off-by: Alex Frid <afrid@nvidia.com> Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/94124 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-03arm: tegra: pm: Update CPU complex resumePrashant Gaikwad
Completely removed PLLP restoration from CPU complex resume on Tegra2 platforms (too late: PLLP is restored from AVP warm boot code) Bug 952200 Bug 931285 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/92523 (cherry picked from commit 066dc172010f1a5ea5a375e1cbdcf162ab206d63) Change-Id: I1a31793db8ee1fda5a947d69890e3118f0d3cdab Reviewed-on: http://git-master/r/93562 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-03ARM:tegra:cardhu: Enable PCIe for cardhu, E1186 & E1187Jay Agarwal
Do platform device registration for cardhu and E1186 & E1187 platforms only. Bug 790141 Change-Id: I70a0144604631a0dd9499699f892f9fc7ec14d56 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/93486 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Krishna Thota <kthota@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-03ARM:defconfig: Enable PCIE in kernelJay Agarwal
Enabling PCIE in kernel build after fixing power management issues due to PCIE. Bug 790141 Change-Id: I41d46e6872f5df9962519c15da62ff7804580211 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/92341 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Thota <kthota@nvidia.com> Reviewed-by: Emily Jiang <ejiang@nvidia.com> Reviewed-by: Penny Chiu <pchiu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-03ARM: tegra: dma: Update actual bytes_transferred in dma cancelLaxman Dewangan
When canceling dma, updating actual bytes transferred by dma, making all requests status to aborted and deleting from channel request queue. Change-Id: I860780814340d54465de5b2ae11a6895319f428c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/90815 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03power: bpcm: Re-try setting BPC limitAlex Frid
Check returned value from BPC set limit api, and re-try again on error. Keep CPU throttled while re-trying. Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 8d5e5a36a03587e3e9374ad8cec6958bd3617f0c) Change-Id: I29b24a92b87cbd41d68473d0c9ef4c8d6add992f Reviewed-on: http://git-master/r/93732 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-03ARM: tegra: clock: Fix emulation clock tableAlex Frid
Configure PLLC on emulation platforms after SCLK is switched to PLLP. This would avoid failure in case when emulation initialization script set PLLC as SCLK source. Change-Id: Ie0f48c066f6df7f6f3c67858de7e9d7608dcb7ff Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/93730 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-03ARM: tegra: usb: AHB prefetch support callsKrishna Yarlagadda
Support for AHB prefetch enable and disable. These calls are used to avoid memory coherency issues Bug 921109 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/92256 (cherry picked from commit c992fdbe0be6e2006d65e67e6eb821a054ad401c) Change-Id: I1599ee11652b9241b2d05d565289632901f44f44 Reviewed-on: http://git-master/r/93817 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-03ARM: tegra: usb_phy: Power down USB PMC controlsKrishna Yarlagadda
Fix leakage current on AVDD_USB when system is in low power mode. Bug 934597 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/89160 (cherry picked from commit 6ef00a561be37a909a1c254afc6a14b6492c670f) Change-Id: I3b8be6eac1ff40148e2de0935db6369909c8bb0a Reviewed-on: http://git-master/r/93813 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-03ARM: tegra3: Make MC early ack feature configurable.Manoj Chourasia
Add a config option to configure early acknowlegement from memory controller. Early acknowledgement is feature of memory controller where MC acknowledged immediately to any write requests from CPU. To maintain mermory coherency all the read requests are blocked till all the early-acked writes have reached to a point of coherency. bug 943638 Change-Id: I97f30261c4711fc338b007502b6eef7217ddb6cb Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/91477 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-03ARM: tegra: dma: enum for initial status of dma reqLaxman Dewangan
Adding new req status TEGRA_DMA_REQ_PENDING. This will be initial status of the request when enqueued. Change-Id: I67ee71dd0c64b6398305b86fbf186488f062e876 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93801 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: move last completed cookie into generic dma_chan structureRussell King - ARM Linux
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline 4d4e58de32a192fea65ab84509d17d199bd291c8 Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93778
2012-04-03tegra: p1852: Register tegra WDT platform deviceManoj Chourasia
bug 924362 Change-Id: I878a845d5c78b2f8c0f5882f8c0a97b3842ac883 Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/91224 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-02tegra: p1852: correcting the GPIO to use for therm_alertVishal Singh
Currently the GPIO that we are trying to use for therm_alert is GPIO_PW2 which is incorrect. The GPIO we ought to use is GPIO_PW3. Bug 920368. (cherry picked from commit ad4714c486c6a734681287ea4d85869f05704397) Change-Id: If1a8cf4b8cdbdd69f2d01f4c292775d413384bc0 Reviewed-on: http://git-master/r/#change,74273 Signed-off-by: Vishal Singh <vissingh@nvidia.com> Reviewed-on: http://git-master/r/91730 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-30arm: tegra: enterprise: use proper backlight clk_div for A03/A04tegra-l4t-r15-betategra-l4t-er-2012-04-02Tom Cherry
The new TPS61160A part asks for the control PWM signal to be between 5kHZ and 100kHz. This change sets clk_div to 0x1D for a 5kHz signal. This change also installs a linear table for enterprise_bl_output_measured_a03. Bug 956246 Reviewed-on: http://git-master/r/91606 (cherry picked from commit 32a67cf7b1c8223abe8de7d88b4bcd1906cda0a2) Change-Id: Ic7907cfae6f918ef055add33615822ef8c5e0ec6 Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/93051 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-30arm: tegra: emc scaling for enterpriseWen Yi
Need to include A01 board for emc scaling. Bug 957981 Reviewed-on: http://git-master/r/91877 (cherry picked from commit 2dff127a133056b4229b8d7a4e8328959873f3c8) Change-Id: I9c615b13adf4375ee0742b817361b0d6326afccd Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/93050 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-30ARM: tegra: enterprise: Add A03/A04 supportTom Cherry
Bug 939799 Reviewed-on: http://git-master/r/90824 (cherry-picked from commit 8c556f816196c17e059db2c11b966ca89848efa3) Change-Id: I67b26958862b8b60217c2750fe0b2eef3013d9b3 Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/92409 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-30p1852: Enable uart4 and remove spi4Manoj Chourasia
+ Enable uart4 and remove spi4 + use SPI2 instead of SPI1 as initial pinmux for gpio x5/6 bug 933971 Reviewed-on: http://git-master/r/78718 (cherry picked from commit 7135fbe5edf7357384dc92b613ea46dc927d6b06) Change-Id: I46d3072dd160d7a2d1f11f949cc934fbdff1e0a6 Reviewed-on: http://git-master/r/91234 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-30ARM: tegra: config: Remove CONFIG_KEYBOARD_INTERRUPTLaxman Dewangan
Remove config variable CONFIG_KEYBOARD_INTERRUPT as same functionality can be achieve through the gpio_keys. Change-Id: Ice898c9abe9f4eba2e82459b22f309cb36347123 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92461 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-30ARM: tegra: cardhu/Kai: Use gpio_keys driver for int keyLaxman Dewangan
gpio_keys driver support for the key which can generates only interrupt and not mapped to any gpio functionality. Using this feature to support the onkey which generates interrupt only when key is pressed. Change-Id: I502a45a1c510b92f4114ded713f7706b7a2c85d3 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92460 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-03-30ARM: tegra: Cardhu: Support for E1198-A03Laxman Dewangan
Adding support for E1198-A03 which have different regulators and the identification of regulators are done based on board sku id. Change-Id: Iee76d2bc493308da5346011232db32b933fd8625 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92284 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-02 20:01:02 +0000