summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2012-06-27arm: tegra: enterprise: Add support to externel pwm.Kevin Huang
Bug 995402 Change-Id: I53e9f1801d3b37626abb89c67b4e63662dab8c65 Reviewed-on: http://git-master/r/111306 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-27video: tegra: dc: Deactivate DSI runtime when DC is idle.Kevin Huang
We support 3 different aggressiveness levels of disabling DSI runtime. The larger the aggressive level is, the higher DSI power we can save. Bug 936337 Change-Id: Idadcb49b364e29ddd0a05dde1c6d3dfda6cd493e Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/106361 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-27arm: tegra: baseband: boost CPU frequency when modem BT3 bootsSteve Lin
Boost CPU frequency to ensure the modem core dump can be transfered before the BT3 watchdog timeout. Bug 975990 Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/109325 (cherry picked from commit 028155da1b31742b0133dbad62fe5a6a66f2bf1e) Change-Id: I9e7960c11521f011bcbd5566bb40fa780723b49f Reviewed-on: http://git-master/r/104038 Reviewed-by: Uday Raval <uraval@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Tested-by: Steve Lin <stlin@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-06-27arm: tegra: baseband: add sysfs file for modem boot, etc.Steve Lin
1. Add sysfs file so the fild can load/unload host controller before modem power cycle. 2. Move modem boot irq to modem PM driver. 3. Add short autosuspend to optimize power consumption if the wake source of system resume is not modem. 4. Avoid LP0 abort if remote wakeup happens during L0/L2 -> L3 transition. 5. Fix deadlock in pm_notifier function. Bug 975990 Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/109079 (cherry picked from commit 0b60aade303a022ff3335b4a238ba2dbae4da4b5) Change-Id: I9bcac40e2f93f95c702b42a2eb5e4e9aa7a9d721 Reviewed-on: http://git-master/r/103981 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Uday Raval <uraval@nvidia.com> Tested-by: Steve Lin <stlin@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-06-27ARM: tegra: usb_phy: Fix for glitch on STROBE lineVinod Atyam
Observed glitch on STROBE line during HSIC resume. This is because after removing the TX circuit power down, HSIC controller is keeping in reset to program phy parameters. TX circuit is driving low on STROBE line until controller removed out of reset. Now corrected the code to remove power down after setting phy parameters and removed the reset on HSIC controller. Bug 991709 Change-Id: I4966ea92752d2e5c6ea7042a6c5fb8707cf6bb35 Signed-off-by: Vinod Atyam <vatyam@nvidia.com> Reviewed-on: http://git-master/r/110112 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-27ARM: tegra: clock: Add fence read in emc clock changeAlex Frid
Added fence read in Tegra3 emc clock change procedure. Change-Id: I2162affb4dddcacf38057e07ff6fbd5964643188 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/106956 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-06-26ARM: tegra: Change pm269 board structure configsSudhir Vyas
* NVC config change added to make code inline with generic NVC framework, but it is introducing camera crash after reboot issue on pm269. * Make code identical to what was there earlier to fix above regression. Bug 998465 Change-Id: I8510ef3427b218481c5e36c952056dda799080f6 Signed-off-by: Sudhir vyas <svyas@nvidia.com> Reviewed-on: http://git-master/r/109523 (cherry picked from commit 7e642946895848829bb6405bc675062c86907eb4) Reviewed-on: http://git-master/r/110087 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-25arm: tegra: kai: Fix panel power on/off sequenceKen Chang
Panel power on/off sequence should meet the panel spec as below. power on: 1. EN_VDD_PNL 2. PCLK 3. LVDS_EN 4. LCD_BL_PWN power off: 1. LCD_BL_PWN 2. LVDS_EN 3. PCLK 4. EN_VDD_PNL Pixel clock on/off is controlled by dc driver, we need to separate the setting of panel enable/disable into two parts. The first, i.e., before pclk on/off, is done in kai_panel_enable()/kai_panel_prepoweroff(). And the second part, i.e., after pclk on/off, is done in kai_panel_postpoweron()/kai_panel_disable(). bug 976081 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/102555 Reviewed-by: Artiste Hsu <chhsu@nvidia.com> Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com> (cherry picked from commit 8149532e20729c359eb1680297f19a8f46343054) Change-Id: Ifc0d60c2caabf60f4186179e64756a4caabf9af6 Reviewed-on: http://git-master/r/110297 Tested-by: Ken Chang <kenc@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Artiste Hsu <chhsu@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-06-25video: tegra: dc: Support for pre power-off actionsKen Chang
Part of panel settings need to be done before/after pixel clock is disabled. Add support for these actions to meet panel spec. bug 976081 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/102542 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> (cherry picked from commit dcecdc64d4d0fd4d9f69df52c9d200dfbf1dd7fc) Change-Id: Ibfede68d67a4815156f73c2d1cdca90f3f771755 Reviewed-on: http://git-master/r/110296 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-25arm: tegra: pcie: Fix USB3 after LP0Jay Agarwal
Stop and add pcie devices to probe the devices again in order to have correct value of irq which was not, at first probe while resume. Bug 956573 Change-Id: I8d497116350ad263c4ae3053cd429393a0f0bc99 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/110556 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-25arm: tegra: pcie: Add hotplug functionalityJay Agarwal
1. do power off on suspend and power on while resume and other initialization. 2. call same functionality as suspend/resume for disconnect/connect of hotplug also. Bug 946385 Change-Id: Ic6906a8641f418cc3e5ee86beaf6fb3f71081174 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/110343 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-06-25ARM: Tegra: p1852: UARTE pinmux correctionsreenivasulu velpula
UARTE pin directions were set as per the old pinmux sheet. Updated the pinmux as per the sheet revision #18 //syseng/Projects/P1852/PinMux/T30_PinMux_for_P1852.xls Bug 991591 Change-Id: I50cf05659e4970882dffc1cd268718e64c886a23 Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com> Reviewed-on: http://git-master/r/109762 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mohit Kataria <mkataria@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-06-25arm: tegra: pcie: Fix suspend/resume codeJay Agarwal
1. Do add port and rescan in resume 2. Assert pcie xclk on power on 3. Remove all bus and devices in suspend 4. Enable msi once after resume also 5. Remove Most of hacks for save and restore config spaces Bug 959642 Bug 956573 Change-Id: Ibfa6902ad1aa2ed0d97f7fe1e305287e38ea0be1 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/109700 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-22arm: tegra: enterprise: Set pwr_i2c speed to 400khzChaitanya Bandi
PWR_I2C (i2c5) clock rate is set to 400khz. Bug 1001924 Change-Id: I7b5593742a0b208aea2ad0d83ecac2078f458534 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/109954 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-22arm: tegra: usb: restore the AP/modem handshakingSteve Lin
Restore the AP/modem handshaking functions and clean up the null phy driver. Bug 996035 Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/109044 (cherry picked from commit ff27e8a48a53fe70949d95915f62dd2e03c73df7) Change-Id: I12a2401a7fcc540a657ab15378d440ef85561001 Reviewed-on: http://git-master/r/110145 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Steve Lin <stlin@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-06-22arm: configs: tegra: Enable ISL29028 sensor in L4TKonsta Holtta
Enabling ALS and Proximity sensor ISL29028 for Tegra3 boards in L4T defconfig. Also, Disabling the ISL sensors which are not present on Tegra3 boards. Bug 876339 Change-Id: I22c318a43b0c5fe667e89c9dd9f99c84a368c8f9 Reviewed-on: http://git-master/r/110065 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-06-22ARM: config: tegra3: enable PCIEASPMVidya Sagar
Enables the Active State Power Management (ASPM) support in the PCIe framework Bug 815499 Change-Id: I76f9fc6a5b6feed8e47e5a4a3825b71c487b79ed Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/109747 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-06-20arm: tegra: use rfkill-gpio driver to register bluetooth rfkillNagarjuna Kristam
rfkill-gpio driver is available in linux delivery as a generic rfkill driver. use rfkill-gpio driver to perform bluetooth RFKILL gpio activities, instead of bcm4329 rfkill driver. Bug 993990 Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Change-Id: I654b93f099431029177913605d15ad921df07833 Reviewed-on: http://git-master/r/108499 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-20ARM: config for PCIe frameworkVidya Sagar
Bug 815499 Change-Id: I6ce9a2bb4afbfd797fc5a0bf0d1027bdc0c1459d Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/109745 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-19arm: tegra: emc: Fix compiler warningJuha Tukkinen
Initialize a variable to avoid a compiler warning and a potential bug. Bug 999222 Change-Id: I77724b21d20049340943856c8d00af5e067c206a Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/109552 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Stefan Becker <stefanb@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-06-19arm: Tegra: Harmony: highspeed uart enableRamalingam C
Based on the kernel command line argument, this change will register the UARTD for the tegra_uart driver, instead of the serial8250. Hence we can put the harmony for the UART automation test. Bug 991545 Change-Id: I5e637c73f4ce352fb615453121d14e2874e51a53 Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/106755 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mursalin Akon <makon@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-19arm: tegra: Fix cpu governor change issuePuneet Saxena
It fixes the issue where cpu governor change was inconsistent across platforms. In T2x, AUTO HOTPLUG is disabled therefore we need to store/restore gov for all online cpus across LP0 cycle. In T3x, AUTO HOTPLUG is enabled therefore storing/restoring gov for Cpu0 across LP0 cycle. Cpu0 remains online in suspend and resume. bug 991081 Change-Id: I167654aa21e4832b3fdc40e3d388a4d3f984632b Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: http://git-master/r/105404 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-18ARM: tegra: dvfs: Fix error checking of voltageJuha Tukkinen
Fix error checking of predicted voltage. Also get rid of maybe-uninitialized warning when using 4.6 toolchain. Bug 949219 Bug 999222 Change-Id: I47553aba5a93c91bdd93cbf75081d69f92aec4dd Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/108899 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-15Merge remote-tracking branch 'origin/dev/omp_bcmdhd_update_5_90_195_61' into ↵varun colbert
promotion_build
2012-06-15arm: tegra: configs: enable CONFIG_TUNOm Prakash Singh
Bug 997101 Signed-off-by: Om Prakash Singh <omp@nvidia.com> Change-Id: I5da0bfe342193d93e021eb9a24aacb09bf38e6a0 Reviewed-on: http://git-master/r/108780 Reviewed-by: Om Prakash Singh <omp@nvidia.com> Tested-by: Om Prakash Singh <omp@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-15arm: tegra: usb_phy: disable all interrupt for 2lsBH Hsieh
Disable all interrupts on current CPU while doing 2ls to make sure the 3 us delay being executed precisely bug 944998 Change-Id: I645709ffdd2481a63223272e1b3f7f1f78466236 Reviewed-on: http://git-master/r/108536 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-06-15arm: tegra: xmm: removing L3 state transitionVinayak Pane
Remove L3 state from xmm power driver. New usb phy code allows pm state transition L0->L2 and L2->L0. When the system goes in LP0/LP1 suspend then the modem power state is kept at L2 and bus state in suspend controlled by PMC. At system resume the hsic bus is given back to USB. Bug 991709 Change-Id: Ib3b74d7da30a5103eddd747726ac7c4423472c76 Signed-off-by: Vinayak Pane <vpane@nvidia.com> Reviewed-on: http://git-master/r/108076 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-06-15arm: tegra: configs: enable CFG80211Om Prakash Singh
Bug 999876 Change-Id: I174d6d7495454f4b28f0315513d6f703743f832d Signed-off-by: Om Prakash Singh <omp@nvidia.com>
2012-06-15arm: tegra: configs: enable DHD_ENABLE_P2POm Prakash Singh
Bug 999876 Change-Id: I174d6d7495454f4b28f0315513d6f703743f832d Signed-off-by: Om Prakash Singh <omp@nvidia.com>
2012-06-14video: tegra: host: Register devices in SoC filesTerje Bergstrom
Move the device structures to the driver source code files. Register all nvhost_device's in one loop which is called from board file. host1x driver code is moved to live under host1x, too. This causes a need to add host to include path of tegradc and nvavp. Bug 982965 Change-Id: If99cf9d1ef6bc24663ee8294c19370429ed04ca7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/104076 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-14ARM: Tegra: Enable 900MHz at 1V on restricted pll_mGraziano Misuraca
Allow pll_m to reach 900MHz at 1V on T30, T33, T37 rev A02+ SKUs. Bug 891320 Change-Id: Idbfb10014ae2a1d06abc3bc1d0bed59c583fac98 Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com> Reviewed-on: http://git-master/r/103453 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-14ARM: Tegra: cardhu: Let emc to 450MHz on T33+ at 1VGraziano Misuraca
Change dvfs table to allow emc to hit 450MHz at 1V VDD_CORE. Line in emc table is also used for T30/T30s but because those can't reach 1350mV they should never use a 450MHz bct and therefore jump from 400@1V to 800@1.2V as before. Bug 973238 Change-Id: I4f1f96c959658e6f9aeca8841c2bfa86fe20cfb8 Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com> Reviewed-on: http://git-master/r/101868 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-14ARM: tegra: dvfs: Update Tegra3 I/O dvfs tablesAlex Frid
Updated 0.95V entries in Tegra3 dvfs tables for nand, nor, spi, and pwm clocks with recent characterization results. Removed usb, pcie, and spdif dvfs since characterization allows running these interfaces in the entire supported voltage range. Bug 817679 Bug 841336 Change-Id: Iaaa2a3ff8b3c07915f1cb05e7b14da545428888e Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/107779 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-06-14ARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tablesAlex Frid
Updated 0.95V entries in Tegra3 dvfs tables for display and dsi with recent characterization results. Removed hdmi and crt dvfs since characterization allows running these modules at max rate in the entire supported voltage range. Bug 817679 Bug 841336 Change-Id: I28651a692e30a20536613460ea0e45155a530af7 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/107778 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-06-14ARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tablesAlex Frid
Updated 0.95V entries in Tegra3 dvfs tables for sclk and cbus clocks with recent characterization results. Bug 817679 Bug 841336 Change-Id: I892690aea4c584b34be5dbfcbcd8b35abd86a997 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/107777 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-06-14ARM: tegra: usb_phy: Fixing HSIC port power codeVinod Atyam
Fixing the port power code for HSIC. During USB driver re-designing, port power code was incorrectly merged. Fixing the code now. Bug 889618 Bug 951061 Change-Id: I1b65662ed864343911abaffb58439ca2996543e7 Signed-off-by: Vinod Atyam <vatyam@nvidia.com> Reviewed-on: http://git-master/r/108302 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-06-14ARM: tegra: usb_phy: PMC changes for HSIC remote wakeupVinod Atyam
These are the changes for supporting HSIC remote wakeup and phy-off in auto-suspend. Bug 889618 Bug 951061 Change-Id: Ifd8144739c5dea49d8019b42b1a608dd13cc29be Signed-off-by: Vinod Atyam <vatyam@nvidia.com> Reviewed-on: http://git-master/r/107606 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-06-14ARM: tegra: resolve compilation time warningsSanjay Singh Rawat
- Adding flag to treat warning as error. - Handling warnings of unused variable, structures and functions, wrong return type, wrong type comparision. Bug 949219 Change-Id: I9d02387ce1073c4e46f69d01669285aa3754f1d9 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/104968 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-13ARM: tegra: enterprise: enable auto hotplugRakesh Bodla
Enabling hotplug detection support for baseband when it is crashed. Bug 995784 Change-Id: I75b7a3b79fb8f9e7c6d58b14090637f794e38bad Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/108284 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Alexandre Berdery <aberdery@nvidia.com> Reviewed-by: Alexandre Berdery <aberdery@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-06-13arm: tegra: p1852: revert previous nor freq changeBob Johnston
nor frequency was changed inadvertently in a conflict resolution. Need to revert it back to proper value. Bug 948478 Change-Id: I8d8f778a58b2df64c8fcbf85c182fe3a888d7c03 Signed-off-by: Bob Johnston <bjohnston@nvidia.com> Reviewed-on: http://git-master/r/108247 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-13video: tegra: dc: Use ref-count to mask vblank interrupt.Kevin Huang
Bug 990586 Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/107714 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-06-13video: tegra: dc: Fix backlight on/off sequenceMark Zhang
Register backlight device after tegradc.0 and tegradc.1. This makes sure turning on/off backlight in correct sequence and eliminates the flicker during suspending and resuming. Bug 964626 Change-Id: I16a545b0148faa341b2443c76d9ca4c7eb7f636c Signed-off-by: Mark Zhang <markz@nvidia.com> Reviewed-on: http://git-master/r/105611 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Peer Chen <pchen@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Shashank Sharma <shashanks@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-06-13Avoid aliasing mappings in DMA coherent allocatorManoj Chourasia
Avoid multiple mappings with DMA coherent/writecombine allocator by pre- allocating the mappings, and removing that memory from the system memory mapping. (See previous discussions on linux-arm-kernel as to why this is bad.) NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write combine memory, rather than 1MB for each in case 1MB is not sufficient for existing platform usage. Platforms have the option of shrinking this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish. The DMA memory must be a multiple of 1MB, the write combine memory must also be a multiple of 1MB, and the two together must be a multiple of 2MB. NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA and WC, the two pools are combined into one, as was the case with the previous implementation. The down side to this change is that the memory is permanently set aside for DMA purposes, but I believe that to be unavoidable if we are to avoid the possibility of the cache getting in the way on VIPT CPUs. This removes the last known offender (at this time) from the kernel. Given that DMA memory is fully coherent by this patch, cache invalidation/clean is not required and so, we skip cache related activities for the memory managed by the DMA layer. The bus address -> virtual address conversion normally used in the calling path and the fact that we remove kernel static mapping corresponding to the DMA buffers leads to exceptions otherwise. bug 876019 bug 965047 bug 987589 Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4 Signed-off-by: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/106212 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-06-12ARM: tegra: p1852: defconfig: Enable PL310_ERRATA_727915Manoj Chourasia
bug 820324 Change-Id: Ia4dec298b3c0cda8cb4e8572b46067b7d06b3758 Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/107592 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-12arm: tegra: p1852: drive touch panel with resolution 1366x768Dongfang Shi
Enable WXGA display and touch input for p1852 touch panel. board-p1852-panel.c: added WXGA timing for atmel touch panel. board-p1852.c: initialize touch panel if touch input is defined. board-p1852.h: added p1852 touch panel GPIO and bus. tegra_p1852_gnu_linux_defconfig: added touch panel flags, not defined by default. bug 936232 Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6 Signed-off-by: Dongfang Shi <dshi@nvidia.com> Reviewed-on: http://git-master/r/101348 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-12ARM: Tegra: Kai: Move Raydium init declarationGraziano Misuraca
Move Raydium touch init declaration from board-specific board-kai.h to generic board-touch.h Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com> Change-Id: If82572a296ad6e5a3b1733827289e9b71a624176 Reviewed-on: http://git-master/r/95919 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-12emc: tegra3: Change debug eack_state permissionsHao Tang
Remove write permission of eack_state for cts verification. The init script will make it acessible on engineering builds Bug 906796 Change-Id: I1b5d77f4ee3d0e39106840eca0c53e6347c34ea1 Signed-off-by: Hao Tang <htang@nvidia.com> Reviewed-on: http://git-master/r/106668 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-06-11arm: tegra: p1852: Remove unwanted audio clocksNitin Pai
Audio Sync clocks should be set at driver level. Removing this hack as the TDM driver sets the clocks now. Bug 948478 Change-Id: Ie001b601e740f22852a4dbb6b89a225a263208ee Signed-off-by: Nitin Pai <npai@nvidia.com> Reviewed-on: http://git-master/r/107534 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-06-11video: tegra: dc: Clock-gate display modules dynamically.Kevin Huang
Bug 936337 Bug 899053 Change-Id: I2b3d8cfc8a00881338c1e17d03f2844d15ba7d3e Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/106313 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-11ARM: tegra: p1852: remove tegra_gpio_enable/tegra_gpio_disableMohit Kataria
tegra_gpio driver supports configuring gpio when direction is set. So removed tegra_gpio_enable/tegra_gpio_disable from p1852 board file. Bug 984442 Change-Id: I176b99fb277e01d0ef426c793ce0d1b3bbbb847d Signed-off-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-on: http://git-master/r/105902 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-11 00:31:03 +0000