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Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline commit
16052827d98fbc13c31ebad560af4bd53e2b4dd5
Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463
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- current code does not turn off pll-a/p in LP1
irrespective of voice call status
- add a new flag to indicate voice call on-going
- use PMC_SCRATCH37 to hold this flag
- if it is set, do not turn-off pll-a/p during LP1
- save-restore PMC_SCRATCH37 if it was used to hold the
voice call on-going flag
- fix few misc formatting issues in tegra3_cpu_clk32k
Bug 924817
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/85768
(cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054)
Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29
Reviewed-on: http://git-master/r/94395
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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CSUS clock can't be driven from any clk other than clk_m. So
updating its parent to clk_m.
Removing pll_m's entry as it's already enabled and running at
666 MHz which is our requirement.
Removing tegra_init_suspend() as it's not needed on p852.
Bug 938667.
Bug 949584.
Change-Id: Id62401de11d213d4e0b87b52fe30e2b37372bbea
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Removing config variable CONFIG_REGULATOR_GPIO_SWITCH as the
same functionality can be achieve with fixed regulator.
Change-Id: I803105f2a247da70721f29562881448bb00d3a44
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94197
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The gpio regulator which is controlled through the gpio, which
is open drain type, is using the gpio_switch regulator.
The open drain support is added into the fixed regulator
and hence moving the regulator to use fixed regulator.
Change-Id: I1428d7e10ff469587c45fe913c4be8b4e35cb5bd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94196
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Bug 958089
Reviewed-on: http://git-master/r/92054
(cherry picked from commit 92ff85f937cefc0fbe029607e23557adcf13f9fd)
Change-Id: I7e8815f758c2527da3ab635f102888e5a6d5e951
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 956246
Reviewed-on: http://git-master/r/93644
(cherry picked from commit 5009daf8f362b11810f19253d747042b41badfd3)
Change-Id: I5752eb06a95986c974acce24fa63e1c13e47cd4e
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94116
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Update measured backlight output for correct linearization.
Bug 962780
Change-Id: Ic35b159a0b951eafff7890e7a7487f3c94b468e8
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/93744
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hu He <hhe@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.
Change-Id: I4b886489458e4ec8f5eb43d857bf710fbb56f5ee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91751
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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Add support to customize modem parameters for voice call.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I6a9e5918f709cbb004b66d16112346b692af477b
Reviewed-on: http://git-master/r/93096
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Change the minimal rate of sclk to 12 MHz and set the lowest
frequency of sbus to be 40 MHz when display is on.
bug 939415
Original change http://git-master/r/#change,76959
Change-Id: I81cda6a95494764721c1be5b4001c476f3aed6ab
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93850
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- On suspend entry set EMC rate floor high enough to select PLLM as
EMC clock source, since PLLM is always turned off in suspend.
- On suspend entry set SCLK (AVP) rate floor to speed-up system bus
during save/restore procedures.
Bug 939942
Bug 938649
Reviewed-on: http://git-master/r/89234
(cherry picked from commit ccfdaef143f9017d682af017e11a25c3e5bcf3a7)
Change-Id: I4e1d66521f1f3453502c471999a52637c3d489aa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94124
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Completely removed PLLP restoration from CPU complex resume on
Tegra2 platforms (too late: PLLP is restored from AVP warm boot
code)
Bug 952200
Bug 931285
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/92523
(cherry picked from commit 066dc172010f1a5ea5a375e1cbdcf162ab206d63)
Change-Id: I1a31793db8ee1fda5a947d69890e3118f0d3cdab
Reviewed-on: http://git-master/r/93562
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Do platform device registration for cardhu and E1186
& E1187 platforms only.
Bug 790141
Change-Id: I70a0144604631a0dd9499699f892f9fc7ec14d56
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/93486
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabling PCIE in kernel build after fixing power
management issues due to PCIE.
Bug 790141
Change-Id: I41d46e6872f5df9962519c15da62ff7804580211
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/92341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Emily Jiang <ejiang@nvidia.com>
Reviewed-by: Penny Chiu <pchiu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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When canceling dma, updating actual bytes transferred by dma,
making all requests status to aborted and deleting from channel
request queue.
Change-Id: I860780814340d54465de5b2ae11a6895319f428c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90815
Reviewed-by: Automatic_Commit_Validation_User
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Check returned value from BPC set limit api, and re-try again
on error. Keep CPU throttled while re-trying.
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 8d5e5a36a03587e3e9374ad8cec6958bd3617f0c)
Change-Id: I29b24a92b87cbd41d68473d0c9ef4c8d6add992f
Reviewed-on: http://git-master/r/93732
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Configure PLLC on emulation platforms after SCLK is switched to PLLP.
This would avoid failure in case when emulation initialization script
set PLLC as SCLK source.
Change-Id: Ie0f48c066f6df7f6f3c67858de7e9d7608dcb7ff
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/93730
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Support for AHB prefetch enable and disable.
These calls are used to avoid memory coherency issues
Bug 921109
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/92256
(cherry picked from commit c992fdbe0be6e2006d65e67e6eb821a054ad401c)
Change-Id: I1599ee11652b9241b2d05d565289632901f44f44
Reviewed-on: http://git-master/r/93817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fix leakage current on AVDD_USB when system is in low power
mode.
Bug 934597
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/89160
(cherry picked from commit 6ef00a561be37a909a1c254afc6a14b6492c670f)
Change-Id: I3b8be6eac1ff40148e2de0935db6369909c8bb0a
Reviewed-on: http://git-master/r/93813
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Add a config option to configure early acknowlegement
from memory controller.
Early acknowledgement is feature of memory controller
where MC acknowledged immediately to any write requests
from CPU. To maintain mermory coherency all the read
requests are blocked till all the early-acked writes
have reached to a point of coherency.
bug 943638
Change-Id: I97f30261c4711fc338b007502b6eef7217ddb6cb
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91477
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding new req status TEGRA_DMA_REQ_PENDING. This will be initial
status of the request when enqueued.
Change-Id: I67ee71dd0c64b6398305b86fbf186488f062e876
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93801
Reviewed-by: Automatic_Commit_Validation_User
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Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures. This is pointless, and
forces driver specific code. Move this out into the common dma_chan
structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline
4d4e58de32a192fea65ab84509d17d199bd291c8
Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93778
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bug 924362
Change-Id: I878a845d5c78b2f8c0f5882f8c0a97b3842ac883
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91224
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Currently the GPIO that we are trying to use for therm_alert is
GPIO_PW2 which is incorrect. The GPIO we ought to use is GPIO_PW3.
Bug 920368.
(cherry picked from commit ad4714c486c6a734681287ea4d85869f05704397)
Change-Id: If1a8cf4b8cdbdd69f2d01f4c292775d413384bc0
Reviewed-on: http://git-master/r/#change,74273
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/91730
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The new TPS61160A part asks for the control PWM signal to be between
5kHZ and 100kHz. This change sets clk_div to 0x1D for a 5kHz signal.
This change also installs a linear table for
enterprise_bl_output_measured_a03.
Bug 956246
Reviewed-on: http://git-master/r/91606
(cherry picked from commit 32a67cf7b1c8223abe8de7d88b4bcd1906cda0a2)
Change-Id: Ic7907cfae6f918ef055add33615822ef8c5e0ec6
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/93051
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Need to include A01 board for emc scaling.
Bug 957981
Reviewed-on: http://git-master/r/91877
(cherry picked from commit 2dff127a133056b4229b8d7a4e8328959873f3c8)
Change-Id: I9c615b13adf4375ee0742b817361b0d6326afccd
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/93050
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 939799
Reviewed-on: http://git-master/r/90824
(cherry-picked from commit 8c556f816196c17e059db2c11b966ca89848efa3)
Change-Id: I67b26958862b8b60217c2750fe0b2eef3013d9b3
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/92409
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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+ Enable uart4 and remove spi4
+ use SPI2 instead of SPI1 as initial pinmux for gpio x5/6
bug 933971
Reviewed-on: http://git-master/r/78718
(cherry picked from commit 7135fbe5edf7357384dc92b613ea46dc927d6b06)
Change-Id: I46d3072dd160d7a2d1f11f949cc934fbdff1e0a6
Reviewed-on: http://git-master/r/91234
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Remove config variable CONFIG_KEYBOARD_INTERRUPT as same
functionality can be achieve through the gpio_keys.
Change-Id: Ice898c9abe9f4eba2e82459b22f309cb36347123
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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gpio_keys driver support for the key which can generates only
interrupt and not mapped to any gpio functionality.
Using this feature to support the onkey which generates interrupt
only when key is pressed.
Change-Id: I502a45a1c510b92f4114ded713f7706b7a2c85d3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92460
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding support for E1198-A03 which have different regulators
and the identification of regulators are done based on board
sku id.
Change-Id: Iee76d2bc493308da5346011232db32b933fd8625
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92284
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Make the module space a configurable option.
The default value remains 16. The main goal
of this CL is to enable large module, such as
resman module of nvidia.
Change-Id: I8a775a6a23c1a75562917d8ab8e4bbe29f08d7e5
Signed-off-by: Mursalin Akon <makon@nvidia.com>
(cherry picked from commit 40aaad75bd32822137033fc7972d41ee30ff7bc9)
Reviewed-on: http://git-master/r/91322
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Initialize pm_caps and pm_flags through platform
data.
Bug 956238
Change-Id: I400f6e92541fa2e63ccc7f829e204d5eef4697fc
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90790
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Fix Synaptics touchpad GPIO setup compilation warning and add freeing of
resources when unconfiguring.
Change-Id: Idc98dd622cc969ac55f8c6a945317d657a6b7222
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/90046
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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1. disable read write operation while suspend/resume
noirq operation is performed to avoid hang
2. implement dev pm_ops for pcie tegra driver
3. use a backup buffer to save config space of
all pcie devices to avoid legacy PM calls.
Change-Id: I2d39f69a865b48e1e51ce2cd466e24007718a8b6
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/90617
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Penny Chiu <pchiu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Emily Jiang <ejiang@nvidia.com>
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1. disable pci devices asynchronous suspend/resume.
2. correct resume function of tegra pcie driver.
3. enable clock clamping
4. require noirq suspend/resume calls to be commented
Bug 790141
Bug 947673
Change-Id: I49ebba43f296c3c38bc960d7db5fe847232e29a8
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/87316
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Penny Chiu <pchiu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
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bug 947710
Change-Id: If06de72d3880055c219e5ded892bb8cf956d774a
Signed-off-by: Frederic Bossy <fbossy@nvidia.com>
Reviewed-on: http://git-master/r/92066
Reviewed-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Bug 953155
Change-Id: I9fbb87f17e590971d5a0bf313e740e8b3b4c890b
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/91871
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable speculative line fill in SCU.
Bug 947861
Change-Id: I2db7515c47715160a4e559931e178b41c01a1744
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/91834
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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No apparent need for L4T
Bug 956238
Change-Id: I78b7451a1bf30cce974f1daad88ae27959d55340
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90672
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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enable OutOfBand interrupt support in bcm4329 driver.
Bug 959909
Change-Id: I2e39eed38e2574c106dd0c43f5a940ced2af1d09
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/92326
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Changing the values of registers timing0 and timing1 of NOR flash
to those specified in the NOR POR.
Bug 914158.
Change-Id: Ie65fadbeda7329b22786841f46dd2583043a8381
Reviewed-on: http://git-master/r/#change,72828
Reviewed-on: http://git-master/r/91737
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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ARM_SAVE_DEBUG_CONTEXT was getting selected by tegra3 independent
of PM_SLEEP config. ARM_SAVE_DEBUG_CONTEXT itself is dependent on
PM_SLEEP. That was generating following warning while doing
savedefconfig with PM_SLEEP disabled.
scripts/kconfig/conf --savedefconfig=defconfig Kconfig
warning: (ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects \
ARM_SAVE_DEBUG_CONTEXT which has unmet direct dependencies\
(PM_SLEEP && CPU_V7)
This patch fixes the issue.
bug 931053
Change-Id: I57016476b7ca39f9ac36a9c59d0102c89c85c6c9
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 953357
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/90845
(cherry picked from commit 24b715551882d387b82a89e0213012863e46bb95)
Change-Id: Ia8632fccab0708dacd9ef4b9360f8ef499b47818
Reviewed-on: http://git-master/r/92280
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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PPCS physical address is different for Tegra 3x and 2x
Change-Id: If26f08f6f234786194f6642523b644e8bf4be770
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/91768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 896060
Reviewed-on: http://git-master/r/84679
(cherry picked from commit e1eb8a0802ff7c2aaf8e278e0f8cfd1fa06758be)
Change-Id: Ic233905eaa22775daa894c0132187b1192824b01
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Conflicts:
arch/arm/mach-tegra/board-cardhu-memory.c
Change-Id: Ic233905eaa22775daa894c0132187b1192824b01
Reviewed-on: http://git-master/r/88867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 841336
Reviewed-on: http://git-master/r/82996
(cherry picked from commit 5850c8f4968fd7acbb22e377a56a476e37ac5117)
Change-Id: I61d5c1576a6f5caf82b3efec2123c47eb64889b2
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/88865
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Based on command line parameter, override the sku
Bug 925878
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/83241
(cherry picked from commit 24df2878418fc0c5f2b2dd20130df91a23dd042e)
Change-Id: Ic8d2408c6e408fcf28f9b64f12866971b753b41e
Reviewed-on: http://git-master/r/88864
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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1.reduce CP ack timeout to 1000 ms, based on modem vendor spec.
expected timing is 10ms, but modem vendor recommend to wait less than 1 sec.
2.move log print after spinlock section.
log in spinlock could waste cpu resource.
Bug 932104
Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/86003
(cherry picked from commit de853a886153cfb35cafcf797df490207187cc33)
Change-Id: I4b1ea80d25e0aa1f93599c08eedf306dbed00d63
Reviewed-on: http://git-master/r/91934
Reviewed-by: Shawn Joo <sjoo@nvidia.com>
Tested-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
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