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2012-04-24ARM: tegra: provide fixed mapping for PCIe hostPeter De Schrijver
Provide a fixed mapping for the PCIe host registers. This reduces the pressure on the VMALLOC area significantly. bug 969392 Change-Id: I80ea0dd5e81a005f86a26eb47aea00d78e9e0ad2 Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/96748 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-24ARM: tegra: pcie: fix pcie resume issueShridhar Rasal
Its observed that PCIE all clocks enabled on resume. Follow up resume and suspend only if any port added bug 943712 Change-Id: I0644aad8a4994726451cda094f2607eb8398aadf Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/95836 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-24ARM: tegra2: dvfs: Update DVFS rails statistic for Tegra2Joshua Cha
LP2 state of Tegra2 is considered into rail statistic. Change-Id: Iab2e0fe25ecb8feca1f4aa1040ce5020e6dcf584 Signed-off-by: Joshua Cha <joshuac@nvidia.com> Reviewed-on: http://git-master/r/98118 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-23ARM: tegra: dvfs: update DVFS table for KaiAnkit Pashiney
update DVFS table for kai. bug 945613 Signed-off-by: Ankit Pashiney <apashiney@nvidia.com> Change-Id: If4d2e814bc01df1d14ae05b8f5c557d387ae19e4 Reviewed-on: http://git-master/r/95463 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ankit Pashiney <apashiney@nvidia.com> Tested-by: Ankit Pashiney <apashiney@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-23arm: tegra: xmm: check return value of autopm_getShawn Joo
check return value of usb_autopm_get_interface(). if return value is not success, usb_autopm_put_interface() should not be called to make up the reference count. Bug 936094 Signed-off-by: Shawn Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/85974 (cherry picked from commit aad2bf5c8fef639465c4bb895b73a23c3f0c0403) Change-Id: Ifd1deb1e0953eae1fd8d41f48989b650d6951fed Reviewed-on: http://git-master/r/97647 Reviewed-by: Shawn Joo <sjoo@nvidia.com> Tested-by: Shawn Joo <sjoo@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-04-20ARM: tegra: cardhu: set open drain type to be false for normal pinLaxman Dewangan
When registering fixed regulator for gpio, setting the open drain state to false for normal pin i.e. non-open drain pin. This was side effect of the changes done for porting gpio regulator to fixed regulator. bug 970262 Change-Id: I1977e48b3461f8eb2aacadc28e4b53165ac4e1ec Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/97946 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-20ARM: tegra: dma: Use no DMA interrupts if no callbacksChaitanya Bandi
If there are no callbacks associated with the request, dma interrupt is not enabled. Bug 969125 Change-Id: Ifbf2a8d6c474187927ee38af03cb96e53e199b83 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/96724 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-19arm: tegra: enterprise: Correct sdmmc4 tap delayPavan Kunapuli
For SDMMC4 GMI interface, tap delay value of 0xF is recommended by HW team. Bug 911075 Change-Id: I2cdf90f34341cb8062dbded52ff1739c0c84cb0d Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/97668 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-04-19arm: tegra3: change min_rate for clocksAmit Kamath
Set minimum sclk,pclk and hclk rate same at 12Mhz for power optimization bug 939415 Change-Id: I579eeca780357b02f65333ffea58301040943506 Signed-off-by: Amit Kamath <akamath@nvidia.com> Reviewed-on: http://git-master/r/96922 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19Revert "ARM: pm: force non-zero return value from __cpu_suspend when aborting"Sang-Hun Lee
This reverts commit 037bc840859c0d52abedeb576888714698f04bcf. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I89fa9aad8e56628ebb8932c694d37ab92daaab22 Reviewed-on: http://git-master/r/96796 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: preallocate a page table for suspend/resume"Sang-Hun Lee
This reverts commit 55f0f45a45263ba26bd473f50f867d29dd836e46. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I036e0bd4e391a17dec8fa0fe86da7eb6b98d503a Reviewed-on: http://git-master/r/96795 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: only use preallocated page table during resume"Sang-Hun Lee
This reverts commit 46d9f14943770c24603ef7cdfd8eb2dbcd3c1248. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Iee732d8137043240902201d7783d2c3fede98fbe Reviewed-on: http://git-master/r/96794 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: get rid of cpu_resume_turn_mmu_on"Sang-Hun Lee
This reverts commit 5682179d980e1a70bcf37fd97a14e27a2ddde822. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ieb44d89a8361d1fa59b3d6375234f06f57c1c717 Reviewed-on: http://git-master/r/96793 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: no need to save/restore context ID register"Sang-Hun Lee
This reverts commit 16e0bb8c46656b1d902d422e0065c746af161a1c. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ifa115c4030c48cbd0b629cf02899ca8c6f25d314 Reviewed-on: http://git-master/r/96792 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: convert some assembly to C"Sang-Hun Lee
This reverts commit 11a2e1bb69affe9e8273bc6d1452cd9282ddd27a. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ibace368a190a14d24e1cc963e8e2a7ed6fdbba6a Reviewed-on: http://git-master/r/96791 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: add L2 cache cleaning for suspend"Sang-Hun Lee
This reverts commit a27cd62bb4934abe2af420ba7ca5115fbfb653be. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I826224a4aea4bac78f9d2d1ce6797e8585fc148b Reviewed-on: http://git-master/r/96790 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Restore "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"Sang-Hun Lee
This restores commit 607d5ec8bb46f95473533f611da1ffc97907d16e. The common ARM CPU state suspend/resume code does not work with and external L2 cache controller (like a PL310) enabled. This change fixes corruption of the current PMD by the MMU resume code. cpu_resume_mmu modifies the currently active page tables to add a flat (VA==PA) section mapping of cpu_resume_turn_mmu_on to handle MMU off-to-on transition. It turns off the L1 data cache but it knows nothing of the L2 cache. Since page table walks are L2 cacheable, other CPUs in the system can pick up the corrupted PMD which will eventually result in a kernel panic. The workaround for this is to modify push_ctx_regs to save the current TTB0 and CONTEXID registers in the CPU register context and switch to the private tegra_pgd before saving the rest of the CPU context. The tegra_pgd already has a flat mapping for the code in question, so it can't be damaged by the actions of cpu_resume_mmu. Likewise, pop_ctx_regs is modified to restore the actual TTB0 and CONTEXTID registers when restoring the CPU registers. Bug 967887 Change-Id: Iaf98c46359860531874354e8cddabe299ea90d57 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96789 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND"Sang-Hun Lee
This reverts commit e6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f. Bug 967887 Change-Id: I60927a93ebdf6ba4da14311f8ffcc1edf4f56391 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96788 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra: rethink the cpu suspend-resume code path"Sang-Hun Lee
This reverts commit f31ca2d9e0580b58dc51fde31fc8ace190dd253b. Bug 967887 Change-Id: I3fe975f7a6939cace5e208947bcb82e09008c0ac Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96787 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra20: pm: flush L1 data before exit coherency"Sang-Hun Lee
This reverts commit 209209a303742d6312f66896b4351dd97e48e24c. Bug 967887 Change-Id: I2464db28b5a4970d6e60ef79c89c2107c64cb6d3 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96786 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU"Sang-Hun Lee
This reverts commit 743c03fbeb5908faf4aef6bee7702a2ad4caac22. Bug 967887 Change-Id: Ie4477e3b5fa9773c9e60b5cace47b3ff240a4bf1 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96785 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19ARM: tegra: remove T30 FPGA supportJuha Tukkinen
Remove T30 FPGA support as it will conflict with downstreaming mainline way of using chipid and revision. Change-Id: Ic1fd1107801de13c265c7dde8571e0537c43f4fd Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95872 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19arm: tegra: resolve compilation time warningsSanjay Singh Rawat
Bug 949219 Change-Id: I875f8688a272c415ebf345b8f30e4afdf7551b29 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/91523 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-18ARM: tegra: cardhu: pm299: enable 3v3 rail during bootLaxman Dewangan
Enabling the 3v3 voltage rail during boot. bug 822562 Change-Id: I15318b0c30bae716f40985cbee06cd9eaff54ee3 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96685 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-18ARM: tegra: usb: kai: pmu int not requiredKrishna Yarlagadda
vbus int can be generated from pmu and directly from port when host mode is reqruied, we use vbus int and pmu int is not required as usb clock is not disabled. Bug 961166 Change-Id: I96fde7daf052a7c5b8e94414e309b0be6354ec80 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/96338 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-18arm: tegra: kai: addition of charger regulatorChandler Zhang
Use SMB349 regulator instead of irq to controll USB1 VBUS Bug 961166 Bug 966874 Change-Id: I68884444883277ef169f3eb066ea50d6d49b708d Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/96441 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-18arm: tegra: enterprise: disable dsi_csi_rail in LP0Vinayak Pane
AVDD_DSI_CSI is shared by modem and dsi. If DSI turns off this rail then HSIC fails after wakeup from modem. This patch provides a way to turn on this rail from modem as well as from DSI. Create two virtual power rails from avdd_csi_dsi to control it from both the drivers separately. This is enterprise specific change as per the power rail layout. Bug 920881 (cherry picked from commit ab52b51c59f776ae770d48a28a2744e2db2e5d2f) Reviewed-on: http://git-master/r/85656 Change-Id: I2e9c04a8f4e8d6fd20584b4e75657c1cb6d5c8bd Signed-off-by: Vinayak Pane <vpane@nvidia.com> Reviewed-on: http://git-master/r/89134 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-18ARM: tegra: dma: Add API to get channel idChaitanya Bandi
Added tegra_dma_get_channel_id API to determine the id of a given channel. Bug 969125 Change-Id: Ibad67d65c87dc267a4e6942557c02acbd0f6e938 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/96714 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
2012-04-18ARM: tegra: cardhu:enable VDD2 when requiredLaxman Dewangan
The VDD2 supply the power to three rails: 1.5V, LDO1 and LDO2. LDO1 is used for PEX and LDO2 is used for SATA. By default making the VDD2 off and enabling when consumer requires. Change-Id: I283f62277246214966e7635bc31b6eb066f9282b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96451 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-17tegra: fix typo in pre-power wifi codeMursalin Akon
fix typo in pre-power wifi code Bug 956238 Change-Id: Iee794da508d39131e3166bba71b1c46c60d19a3b Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/96821 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-04-17Revert "video: tegra: dc: load video mode during vblank"Jon Mayo
Change-Id: Ib1b0fc6015a9dd45982a97231972dadba6b5a92e Reviewed-on: http://git-master/r/96966 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-17ARM: tegra: clock: Apply shared bus ceiling alwaysAlex Frid
Apply shared bus ceiling regardless of whether Tegra3 SHARED_CEILING user is enabled or disabled. Thus, we no longer need to enable ceiling user - and the bus itself via child-parent relations - to cap the bus rate. Bug 954896 Change-Id: I7f96f03f05fd39334c9ee977cd1ac18d86a1fc0d Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 07b1a707aa14dcab37f095a3bb78af79a54c399b) Reviewed-on: http://git-master/r/95739 Reviewed-by: Daniel Solomon <daniels@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-16arm: tegra: Cardhu: E1198 DirectTouch setupAli Ekici
Modified touch setup and init calls to support DirectTouch in E1198 19x12 system. Change-Id: Ide208c4759af15200fb57530e7fbdc023d074c5c Signed-off-by: Ali Ekici <aekici@nvidia.com> Reviewed-on: http://git-master/r/91260 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16arm: tegra: xmm: add shutdown handler to off cpSeongho Joo
add shutdown handler to turn off CP when power off and disable irq for ap wake. Bug 942968 Signed-off-by: Seongho Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/88188 (cherry picked from commit d37a1900afb9982115f18989b0114bad8f2602bd) Change-Id: I1541453e21b46149bba08eafb0eadf9a598aa182 Reviewed-on: http://git-master/r/96455 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16arm: tegra: xmm: modify CP power sequenceSeongho Joo
modify CP power sequence timing based on modem vendor spec information. > 20 ms : REST low and ON low > 400 us : RESET high and ON low > 60 us : RESEET high and ON high Bug 943280 Signed-off-by: Seongho Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/85964 (cherry picked from commit 8a6e64228f11d46f502c654bd9a1b508af93a67b) Change-Id: I01f4fae493627d46707ebfcad676fc0a25b5258d Reviewed-on: http://git-master/r/96453 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16arm: tegra: baseband: check usb intf after resumeVinayak Pane
Check for valid interface after system resume and before enabling runtime pm. Bug 944052 Signed-off-by: Vinayak Pane <vpane@nvidia.com> Reviewed-on: http://git-master/r/85330 (cherry picked from commit a32495671f104e1ba0f5a4940bde17d34b9c87f2) Change-Id: I77dc559ac0d4b31be756d3e770c04b8e5e7bfe36 Reviewed-on: http://git-master/r/96332 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16tegra3: p1852: Update defconfig.Manoj Chourasia
1. Disable PM_SLEEP 2. Disable Early ACK for MC 3. Enabled TEGRA SDHCI support 4. Disabled DEBUG_LL. bug 931053 Change-Id: I387d528bef3e6fa85b986c70e805693f7f5ce701 Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/91478 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Shankar Subramanian <ssubramanian@nvidia.com>
2012-04-16arm:tegra[3]:config: power up wifi chip at bootMursalin Akon
power up wifi chip at boot using Kconfig option TEGRA_PREPOWER_WIFI Bug 956238 Change-Id: I447eab3b78b22878ade535721c83629959c8c504 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/90673 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-16arm:tegra[3]: power up wifi chip at bootMursalin Akon
power up WiFi chip, if Kconfig option TEGRA_PREPOWER_WIFI is turned on. Bug 956238 Change-Id: I26ef92fee30f8d18a47c3968b9b01b97e52a9382 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/90671 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-16arm:tegra[3]: make embedded_sdio platform data conditionalMursalin Akon
embedded_sdio is used, iff MMC_EMBEDDED_SDIO Kconfig is on. This CL makes it explicit. Additionally, for SDIO sdhci always keep the power on. Bug 956238 Change-Id: I44e484b0705b50f942f177ee8d95fb363f38b8c1 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/90670 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-13arch: arm: configs: Disable Custom RegulatoryNitin Bindal
By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled. Custom Regulatory domain(CRD) set by bcmdhd driver does not enable 5GHz band scan. If we disable this config variable, then CRD of driver will not be used and Kernel will use default CRD which supports both 2.4 GHz and 5 GHz scan. So, disable this config variable. Bug 947472 Change-Id: I051db89cba38e2bb07eb716eec2e74611ad89f06 Signed-off-by: Nitin Bindal <nbindal@nvidia.com> Reviewed-on: http://git-master/r/95850 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-13arm: tegra3: defconfig: Enable function tracerPrashant Gaikwad
Bug 953102 Change-Id: I4ef0a32c10df7be63ca5f048eceecd222fa8a8ab Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/89721 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-12ARM: tegra: fuse: Use module_param_cbJuha Tukkinen
Use module_param_cb instead of obsolete module_param_call. Change-Id: I25a86cfa0782e373b82eb58f92058ff6a38fdcba Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95646 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-12ARM: tegra: common: Remove T30 A01 SMMU workaroundJuha Tukkinen
Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no longer supported. Change-Id: I0ba6c838984e3c3ec401057925727c9596a8075f Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95644 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12arch: ARM: Tegra: removing the akm8975 driverRamalingam C
Undefining the config variable CONFIG_SENSORS_AK8975, since we are using drivers/misc/inv_mpu/compass/ak8975.c as compass driver. Bug 965154 Change-Id: Ie6ca5b08cee9dba5375457f39d52ae9ebf97ddf9 Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/95636 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12ARM: tegra: clock: Update common clock tableAlex Frid
- Moved table entries for always running core clocks on the top of the table (this way we guarantee that changing parent of such clock down the road would automatically enable new parent). - Removed unnecessary pll_a and pll_a_out0 entries (effectively they are "NOP") - actual audio configuration is done in per-board tables. - Removed unnecessary pll_c and pll_c_out1 entries for emulation platforms Change-Id: I8327d6313804419405dd93af08f369db02fcbf25 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/95465 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-12arm: tegra: enterprise: Firmware update support for pn544Mohan T
Enable firmware GPIO for board E1205 with fab A03 or A04. Bug 959290 Change-Id: Ide17c4e6dcda8c2c9690f581b8714486a3c4e532 Signed-off-by: Mohan T <mohant@nvidia.com> Reviewed-on: http://git-master/r/95389 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12ARM: tegra: power: Cancel hotplug work upon disableAntti P Miettinen
Cancel hotplug work when auto hotplug gets disabled to prevent e.g. cpu_up() getting called in LP cluster. Bug 965777 Change-Id: I058fe6a5e0c2fd3203ce9bc951d0973b60e033e0 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/95076 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12tracing: Add tracepoints for cluster switchAntti P Miettinen
Simple trace points for measuring cluster switch latencies. Bug 958262 Change-Id: Ia1e5e13131d5e55aaa0a44e9e8b5196539df54e7 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/93841 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12arm: tegra: xmm: CP wakeup and system suspendSeshendra Gadagottu
To handle race condition between CP wakeup and system suspend following policy enforced: 1. If system suspend happens first, then buffer the CP wake request and will abort the suspend at the end of device suspend complete. 2. If CP wakeup happens first, then system suspend starts then abort the system suspend immediately. Bug 938553 Bug 948198 Bug 943035 Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/83130 (cherry picked from commit b2bd06368d3f6e16e5a7dd81c76dda0293de301b) Change-Id: Ic7024aa739472a666f1274ccd7c9722259d54fa5 Reviewed-on: http://git-master/r/93384 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vinayak Pane <vpane@nvidia.com> Tested-by: Vinayak Pane <vpane@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-16 10:09:42 +0000