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2010-06-30[ARM/tegra] Various Fixes for the LP0 power state.tegra-9.12.15tkasivajhula
- Fix the AVP suspend/restore path. - KBC is currently broken as a wake up source, so disable that and enable rtc - Fix warmboot sequence. - Various other PMC issues Change-Id: Ifa70b66253f3a30f85822ef6c0eecac29b1fc8d1 Reviewed-on: http://git-master/r/3019 Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-06-30[ARM/tegra] whistler ODM: enable Suspend(LP1) low power modeNarendra Damahe
Change-Id: I31bc7cdb38d4d192795e7091b32da804968ea8ec Reviewed-on: http://git-master/r/3391 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-06-30[ARM] whistler: disable INPUT_TEGRA_ODM_ACCELBharat Nihalani
Accelerometer generates fake events on some boards, hence disabling it from whistler defconfigs Bug 698867 Change-Id: I7d210fc0123ca65eadc238ba1f8655a09c28b60e Reviewed-on: http://git-master/r/3352 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-06-29[ARM/tegra]:Fuse alignment for SecBootDeviceConfigVinod Atyam
1)Value of SecBootDeviceConfig fuse was reversed when read the value from sysfs interface. This is corrected now. 2)SecBootDeviceConfig fuse size was returning 4 bytes which is not correct. It is modified to 2 bytes now. Bug 691945 Change-Id: Ia1ff7e485b5acb28dc6841787b11052f489e7ccb Reviewed-on: http://git-master/r/2668 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Vinod Atyam <vatyam@nvidia.com> Reviewed-by: Kaushik Sen <ksen@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-29[tegra/aes] Add LP0 suspend/resume support for AESKasoju Mallikarjun
Adding AES suspend/resume functionality for LP0. Dedicated Key information is stored in the SDRAM using RFC-3394 key wraping algorithm. Dedicated slot information is restored back in the H/W during resume from LP0 by unwraping the key from SDRAM using RFC-3394 key unwraping. AES clocks are turned on only during the AES operations and are turned off after completion of the operations. Bug 700494 Change-Id: I49f7fc76c8d6157e5c1b94299c3f4bf58cd2512a Reviewed-on: http://git-master.nvidia.com/r/3219 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Phillip Smith <psmith@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-29[arm/tegra] odm: Fixing supply name for sys vddio name.Laxman Dewangan
The supply name for the vddio sys rail should be "vddio sys". It was wrongly named. Due to this some of the gpio power rail was reporting the invalid power rail. Fixing this issue. Also fixing the compilation warning where function definition was not correct. Change-Id: Ib25c470b6f5d079e9ea204451f97e7ed8edd152c Reviewed-on: http://git-master/r/3258 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-29odm_query:Correcting is_removable prop for sdioPavan Kunapuli
In whistler odm query, the is_card_removable field in NvOdmQuerySdioInterfaceProperty is incorrectly set. Setting this as per the slot usage. Change-Id: Ieb29897eeb92534f3786d6f9f6f112f289251d37 Reviewed-on: http://git-master/r/3313 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
2010-06-29tegra: [RTC Alarm Clock] Implement TI pmu tps6586x by PMIC (pwr_int) pinrhsieh
Integrate PMU RTC alarm function from K29 to K32. Bug 701881 Change-Id: Iee137be5a2e9a369611037da4c39b9f443ce8979 Reviewed-on: http://git-master/r/3265 Reviewed-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Tested-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Reviewed-by: Wilson Chen <wichen@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com>
2010-06-28[ARM] harmony: enable INPUT_TEGRA_ODM_ACCELVenu Byravarasu
Enabling CONFIG_INPUT_TEGRA_ODM_ACCEL on 2.6.32 Change-Id: I9bce1de7f498d747b4a6b2f61e70118cfbcb932c Reviewed-on: http://git-master/r/2745 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-28[ARM/tegra] ODM: validated board info after recursive entry.Alex Frid
Made sure board info data is validated inside/after recursive re-entry. Without this change early invocation of rm open by regulator probe used non-initialized data. Change-Id: I8cf06ef8218214b2aee6efef5f90a5cbd8d9ca7b Reviewed-on: http://git-master/r/3289 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-28tegra: I2C clock fix.Venkata (Muni) Anda
Use the correct clock specified for that instance. Change-Id: I15e94e65c21a65ca82a23d804c2af120b0c16e51 Reviewed-on: http://git-master/r/3156 Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Tested-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-26tegra gpio module: Using regulator module for GPIO power rail controlLuke Huang
Modify gpio module to use regulator module for controlling GPIO power rail. Since there are some issues related to init sequence after this change, using "postcore_initcall_sync" to involve regulator module, as well as modifying NvRmOpenNew routine are required. Bug Id 697774 Change-Id: Ie8002f1190da83355c0554496f9fef24d18207f5 Reviewed-on: http://git-master/r/3103 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-26[ARM/tegra] harmony ODM: enable LP1 suspend modetkasivajhula
commit 36642f74 added support for suspend to the LP1 state (CPU power- gated, SDRAM in self-refresh, core active); set this as the default low- power state for harmony Change-Id: I8541861991cd9a53e3b5614030b14908d28f83a4 Reviewed-on: http://git-master/r/2518 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-25[ARM] whistler : Enable USB_SUSPENDYu-Huan Hsu
Bug 700516 Change-Id: I14c6c679fcc0c14425ea9967c6886c8aead2580e Reviewed-on: http://git-master/r/3222 Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-25[ARM/tegra] whistler ODM: fix voice call DAP connectionVinod G
bug 70050 Removed unused connection line for voice call. Change-Id: Ib9bf276a4d52edc61e419f357fe58470c2c2f9dc Reviewed-on: http://git-master/r/3237 Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-25[arm] harmony: Enable CONFIG_USB_SUSPEND in gnu_linux configuration.Winnie Hsu
Enable CONFIG_USB_SUSPEND flag. Bug 702074 Change-Id: Id6f826ac014473f4514f286783015ec6dae409e3 Reviewed-on: http://git-master/r/3224 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-25[ARM/tegra] RM: Moved PMU related RM suspend/resume.Alex Frid
Moved PMU related suspend procedures from RM kernel suspend to the PM_SUSPEND_PREPARE pm_notifier callback. This is necessary as RM kernel suspend is invoked after interrupts are disabled, and no interrupt based transactions can be used. Similarly, moved PMU resume configuration to the PM_POST_SUSPEND pm_notifier callback. Bug 701894 Change-Id: I1614a968cc1b039f809b165877fcf1595c7cc596 Reviewed-on: http://git-master/r/3221 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-25kernel: fixing kernel compilation warningsSachin Nikam
Integrating warning fixes from kernel .29 to .32 Change-Id: I95f0dd92e830f80cae2fb4d3383c9efa845238a9 Reviewed-on: http://git-master/r/3176 Tested-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-06-24[ARM/tegra] Fix data abort in tegra_setup_spiYu-Huan Hsu
Added check on number of entries on sflash_mux to avoid data abort caused by accessing non-existing sflash_mux array. Change-Id: I252ff0eb70b382dcc6e63f087b9dc3f21083eade Reviewed-on: http://git-master/r/3173 Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-24[ARM] whistler: enable SIGNALFDMichael I. Gold
Change-Id: I63549438e77264efa602feccf1096b5fdd12615f Reviewed-on: http://git-master.nvidia.com/r/3100 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-24[arm] harmony: Enable DMABOUNCE (EHCI) and MMU_UNSAFE_RESUME in gnu_linux ↵Winnie Hsu
configuration. Added DMA support for EHCI controller, and re-enable the MMU_UNSAFE_RESUME flag. Change-Id: Icae0a9769a6ddd0b8ab3a970484c2a8d39caa042 Reviewed-on: http://git-master.nvidia.com/r/3166 Tested-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-24[ARM] ventana: add initial defconfig for ventanaGary King
Change-Id: Ib1486329bc9f8702db9f82a715afa286f106687e Reviewed-on: http://git-master/r/3112 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-24[ARM/tegra] ventana ODM: add initial ODM kit for ventanaGary King
Change-Id: I01a3cadf3dfeda155ba234e515405f9f2e5ce4fd Reviewed-on: http://git-master/r/3109 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-24[ARM/tegra] harmony ODM: add ventana support to PMU adaptationGary King
move the GPIO enable pin definitions out of the adaptation code and into the discovery database, so that the PMU adaptation can be used by both harmony and ventana. remove the non-harmony code paths from this driver, since they are not used anywhere Change-Id: Ic6f16a8f246d692df22d785bbf056153ff40ac1a Reviewed-on: http://git-master/r/3107 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-24[ARM/tegra] RM: Extended HDMI clock source selection.Alex Frid
Added oscillator as HDMI clock source. This configuration is possible in VGA mode, and must be supported to keep HDMI in sync with Display. Change-Id: I57aaa9126876ad9a35acad02bab3e4979d8e1f6a Reviewed-on: http://git-master/r/3120 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Arthur Spence <aspence@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-23[ARM/tegra] odm kit: rename GPIO group WakeFromECKeyboardGary King
rename WakeFromECKeyboard to EmbeddedController, to remain compatible with the header file used for bootloader and user-space builds Change-Id: I6051b8ee6853f25df3a5e0d09d2bf67f6c5434b2 Reviewed-on: http://git-master/r/3108 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-23[ARM/tegra] dma: enable dual-I2S operation on the AVPJeff Weintraub
increase the number of AVP reserved DMA channels to 4 so that the AVP can perform simultaneous dual-transmit, dual-receive Change-Id: I7cbb337885deb2cb93a4af908956e6fb92ea4fb7 Reviewed-on: http://git-master/r/3003 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-23ARM: dma-mapping: add highmem support to dma bounceGary King
extend map_single and safe_buffer to support mapping pages or kernel arrays; call kmap_atomic and kunmap_atomic if the safe_buffer is a page, so that it may be copied into the safe DMA buffer bug 702247 Change-Id: I6eb3e8857064c51d2bf22a87e96c4bbfe40af22b Reviewed-on: http://git-master/r/3082 Tested-by: Gary King <gking@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-23[ARM] harmony: enable SIGNALFDMichael I. Gold
Change-Id: Ie2ad800f8ed99ceb4609fc5ef1f4c64cce481947 Reviewed-on: http://git-master/r/2947 Tested-by: Michael I Gold <gold@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-23[ARM/tegra] nvec: fix unused variable 'timeout' warningGary King
Change-Id: Ibe9fc2405125e3a8f8be7e2cb3768858c25f716d Reviewed-on: http://git-master/r/3081 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-23[ARM/tegra] power: tuned cpu idle loop.Alex Frid
- Updated cpuidle driver parameters: Determined LP2 state target_residency as a break even time balancing the power cost of LP2 entry/exit (estimated via LP2 latency), and LP2_vs_LP3 power saving - this approach is consistent with governor interpretation of residency. As a result the latency_to_residency factor reduced from 2.0 to 0.3. Included exit latency into idle time returned to governor to avoid double subtraction (by platform code and governor code) - otherwise under-reporting of LP2 time would skew downward governor correction algorithm. Replaced hard coded power good time with platform data. - Updated DVFS parameters Set CPU minimum frequency to 216MHz - additional dynamic power will be compensated by savings due to increased LP2 residency (216MHz is provided by low power PLL, and still allows CPU to run at lowest possible voltage). Changed maximum CPU/EMC frequency ratio to match new low corner settings. Change-Id: Ic58d0dd628f51bc3ede61a83c87792fca4f0845b Reviewed-on: http://git-master/r/2916 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22tegra: Run time detection of accelerometer on E1206Venu Byravarasu
Enabled Bosch and Kionix accelerometers together. Added an abstraction layer which would route calls to Bosch or Kionix accelerometer based on run time detection Testing done: observed changes in accelerometer readings when the device is moved. Change-Id: I7cdadb609703d6d0eeabf6e2878adb5f81c43b72 Reviewed-on: http://git-master/r/2753 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22tegra: Fix kernel panic in I2C openScott Williams
Make sure the I2C close() function pointer has been initialized before trying to call through that pointer. This can happen if I2C open fails because there is no ODM configuration for the requested controller/instance combination. Change-Id: I790272463dad0211a439cddac61f45f36325272b Reviewed-on: http://git-master/r/3030 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22[arm] harmony: Added networking support in gnu_linux configuration.Winnie Hsu
Added DHCP and NFS root filesystem support. Bug 700070 Change-Id: I3f937cb6f5f5f66d9ee84f620b2077b15acefacc Reviewed-on: http://git-master/r/2962 Tested-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-06-22tegra: Move CPU-specific code to a CPU-specific fileScott Williams
Also replaces direct moves to the PC with a BX instruction since this is the preferred form of branching/returning. Change-Id: I259c7160d1337a930a6bfe3ceb1b0366951ba054 Reviewed-on: http://git-master.nvidia.com/r/3007 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22[ARM/tegra] board-nvodm: align EHCI DMA mask to 32B boundaryGary King
EHCI DMA buffers need to be allocated at 32B boundaries, or use bounce buffers allocated at 32B boundaries to prevent data corruption Change-Id: I42aa8a8e218124af3056e2ea53cfc1eae8bd6161 Reviewed-on: http://git-master.nvidia.com/r/2960 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-22[ARM/tegra] common: implement dma_needs_bounceGary King
EHCI transfers on Tegra 2 must be aligned to 32B boundaries; add support for DMABOUNCE on Tegra by implementing the dma_needs_bounce function Change-Id: Ibe61be3de173e955bb707cd1bba5a50545e68fa8 Reviewed-on: http://git-master.nvidia.com/r/2958 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22[ARM] dmabounce: add support for low bitmasks in dmabounceGary King
some systems have devices which require DMA bounce buffers due to alignment restrictions rather than address window restrictions. detect when a device's DMA mask has low bits set to zero and treat this as an alignment for DMA pool allocations, but ignore the low bits for DMA valid window comparisons. Change-Id: I1cdce4ff8f928d90af4b92ff3822996599c47bdc Reviewed-on: http://git-master.nvidia.com/r/3004 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22usb phy: correcting the power down sequence for USB2 and 3 controllersAbhishek Aggarwal
As suggested by h/w, the SUSP bit(7:7) in PORTSC1 register must be set to 1 to suspend the port before setting the PHCD bit to put the PHY in suspend mode. PHCD bit is being used for USB2 and 3 controllers only. Implemented the suggested changes. Bug: 695655 Change-Id: I9ddca4f11ec4ac753a3bd6d19fe2c4aa8bbb920f Reviewed-on: http://git-master.nvidia.com/r/2930 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-22tegra: Clean up conditionals and whitespaceScott Williams
Change-Id: I6855c9cfcfaf2646569fcad5ae0090eb47f11dff Reviewed-on: http://git-master/r/2963 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-21tegra: Separate CPU-specific and SOC-specific suspend codeScott Williams
Change-Id: I9e4cd3da4a4b2f124241fd5cc7d713f117d8ec7c Reviewed-on: http://git-master/r/2831 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-19[ARM/tegra] boards: add support for HARMONY and VENTANA machinesGary King
add config options for both the HARMONY and VENTANA machine types, and have MACH_TEGRA_GENERIC select both add the machine definitions for HARMONY and VENTANA to board-generic.c, so that all 3 machines can be detected when MACH_TEGRA_GENERIC is enabled ventana will need custom I2C registration due to pinmux multiplexing, but this is not implemented, yet Change-Id: I3a6f4f6707ba11a2a6e527f673cff867c7314cd2 Reviewed-on: http://git-master/r/2780 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-18[ARM/tegra] AES: Fix warning triggered by NvRmPhysicalMemUnmap.David Le Tacon
The size was incorrect for the DmaVirtAddr, and SrcVirtAddr and DestVirtAddr were incremented inside the loop, hence were not the original ones that got mapped. Also fix two ASSERTs. Bug 698416 Change-Id: Ia53618f1fe9b3dd45de8194e0d082333c1d9573c Reviewed-on: http://git-master/r/2833 Reviewed-by: David Le Tacon <dletacon@nvidia.com> Tested-by: David Le Tacon <dletacon@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18[ARM/tegra] board-nvodm: initialize sdhci is_removableGary King
copy the ODM query SDIO property for removable hosts into the new platform data is_removable field Change-Id: I29d2c9b6691707438711f0691d8392b3ab87824c Reviewed-on: http://git-master/r/2889 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18tegra-sdhci: disable polling for hosts with non-removable cardsGary King
hosts with non-removable cards should not need to specify MMC_CAP_POLLING; this causes additional exits from the CPU idle loop. add a field to the platform data to specify that the host is removable, and initialize card_present to true if the host is not removable Change-Id: I55d9c8295435deb522977b3e7380abc0f8f05721 Reviewed-on: http://git-master/r/2888 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18[arm/tegra]serial: Power control api for bluesleep power management.Laxman Dewangan
Adding apis for following function to hooking up tegra serial driver with bluesleep power management: - Clock off. - Clock on. - Setting flow control to desired state. - Checking for tx fifo status. Following 4 state of uart state machine is developed to achieve this: UART_CLOSED, UART_OPENED, UART_SUSPEND, UART_CLOCK_OFF. The transitions of states are as follows: UART_CLOSED: the init state on which resource is allocated but not opened by client or when device is closed. UART_OPENED: Able to do data transfer. CLOSED to OPENED by opening the port. CLOCK_OFF to OPENED by calling function tegra_uart_request_clock_on(). SUSPEND to OPENED by calling resume(). UART_CLOCK_OFF: The controller clock is disabled and so no data transfer can happen. At this state, controller is not ready for deep power down. OPENED to CLOCK_OFF by calling tegra_uart_request_clock_off(). Can not go to this state from CLOSED and SUSPEND. UART_SUSPEND: The controller is in suspended state and ready for deep power down. UART_CLOCK_OFF to SUSPEND: OPENED to SUSPEND. Change-Id: Ib0c40547665181cadd172840be9aed2cc18ba448 Reviewed-on: http://git-master/r/2819 Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com> Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18[ARM/tegra] timer: initialize tegra_clockevent.min_delta_nsGary King
fix a typo in the timer init code where max_delta_ns was being filled in twice, rather than min_delta_ns. Change-Id: I0efbadae265f408ec755658ddfa707fbd9906c75 Reviewed-on: http://git-master/r/2895 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-18[ARM/tegra] RM: Updated thermal throttling algorithm.Alex Frid
(A) Interval (... 90C) - no throttling, free running system (B) Interval (90C, 115C) - active throttling of CPU frequency with - gradient: -100 MHz/2 sec - low limit: 50% of CPU frequency maximum (C) Above 115C - h/w shutdown. Bug 528708 Change-Id: Id4d57521f378eb72e740c9dc55a2814f8100384e Reviewed-on: http://git-master/r/2851 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18[ARM] mach-types: upgrade to latest machine db headerGary King
Change-Id: Id776c15b3f4810e7051e830d6b7dace71c6ee7cd Reviewed-on: http://git-master/r/2779 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-18[ARM] harmony: enable MMC_UNSAFE_RESUMEDeepesh Gujarathi
bug 700135 Change-Id: I8f81011285f62e09b05449e6c3247eca4b306898 Reviewed-on: http://git-master/r/2879 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-14 22:19:43 +0000