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This patch fixes pllx max value to 1530 and 1836Mhz
based on embedded clok settings considering aging factor
for CD575MI 24x7 and CD575MI 4/4/16 config
Bug 1900076
Change-Id: I9c6a769787fc04eac7ce4548e1a37a9a76972a6c
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1464315
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Chiang <pchiang@nvidia.com>
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New emc table for samsung dram is added on JetsonTK1 target.
Based on tegra bct strap value it can be chosen dynamically.
Both emc table and embedded emc table has been updated accordingly.
Bug 1752744
Change-Id: Ifc577d925712690daec6c6f1121458f01f720846
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-on: http://git-master/r/1312498
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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Jetson TK1 doesn't support usb charging but the detection is still
running. Disable it to avoid unexpected behavior.
Bug 1861049
Change-Id: I13425d69e190a75084486ff1fc9afeb8aa7acb60
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/1308015
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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for UCM1 CD575M, check for cpu speedo 5 to
apply edp contraints
Bug 200195229
Bug 200199079
Change-Id: I704dd64f32c82c7499b6c5f0c96c04fdc062cf71
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1271709
GVS: Gerrit_Virtual_Submit
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Bug 1783583
Change-Id: I8b0e865db02c00f741dafb473d4bd39c5075f23f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1173469
(cherry picked from commit 453a77c5cd9a1316307458203365f9eb5bda62de)
Reviewed-on: http://git-master/r/1174714
(cherry picked from commit f2ce702f49c5631e8a7cbda6fbf09140f8fb55d9)
Reviewed-on: http://git-master/r/1239794
(cherry picked from commit f62bd56958ca743d512f757555e4a3b66f4c9cff)
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1251020
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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This reverts commit 584b60200b8bdcc895c8edacb94f48db5929f70a.
Change-Id: Ibe5b217521b77fa5799400b9460182e3329e1779
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/1216501
(cherry picked from commit 04c8d66d61e15198b95d54672b2f2fe047d180b3)
Reviewed-on: http://git-master/r/1223596
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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Following support added
DVFS for Gauranteed freq considering aging
CPU freq limit at higher temperature
EDP max current limits for each SKU
Bug 200195229
Change-Id: If00f3fd6b891cf366047dda331bd7ab1c15b40f7
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1146577
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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select emc evfs table based on DDR present
using RAMCODE
Bug 200195279
Change-Id: I7fbc693383c9e231b2c2119020eebc7bba544c6e
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1144528
Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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Added kernel configurations to support
systemd functionality
boot.img size is increased by 69632 bytes
Bug 1731796
Change-Id: I4209fee15843ac645600500ed8c9fc37b7ff0c04
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-on: http://git-master/r/1134828
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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enable TEGRA_WATCHDOG_ENABLE_ON_PROBE to set "timeout" in probe call
Bug 200160105
Change-Id: Ifcef77b3229acee821c5cdd2f31e449e010b9d2f
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/927464
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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change regulator-init-microvolt for ams-as3722.
Bug 1634862
Change-Id: Ie4b9d1976fca9f8bdebfb039ef2c0337e1b55dfd
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/794739
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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In case tegra_dc_sync_windows is interrupted by signal,
return the error to caller application
Bug 200090492
Change-Id: Id69fbe38d0abe0b3e71eb5a413db241ebcf0a0ae
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/784754
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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Bug 1643556
Change-Id: I7330bd3ec33e2309577c75bac79e120167b0f81e
Signed-off-by: Arun Kannan <akannan@nvidia.com>
Reviewed-on: http://git-master/r/748395
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
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drop support for USB_NET_RAW_IP as its unused
Bug 200092344
Change-Id: I085330c2ed8a83f83c027d91a03d13d1ce23e4f0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/780277
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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dap2_sclk direction should be input to
take care of the bidirectional nature of the clk
for codec as master and interface as master
Bug 1643925
Change-Id: Iab4f1a30edd3542fbfc0e1f53dd6ea9f604ed42f
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/778298
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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enable shared memory config
Bug 1632724
Change-Id: I629eaa63ea54063dc713e21a848768378b3354a3
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/774295
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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There are places during the CPU resume path where we access this variable
with MMU off. In such scenarios we should use the physical address for this
variable.
This fixes the virtualisation team's issue, since they were the ones who
reported it in the first place. Fix a case where the code running from
iRAM was accessing the variable from DRAM instead of the one cached in
iRAM.
Bug 1411345
Change-Id: I9005c30329d38bae305a4a7b31ae7e2ca83e8a5d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/412540
(cherry picked from commit a0553bb8f3fa7c76c2c0a6528d0c106ee22c7a59)
Reviewed-on: http://git-master/r/771679
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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psci status node should also be checked along with
compatible node to enable secure fimrware
Bug 200124907
Change-Id: Ieb336bc7d1cc2c68d94157222770a6da6a8dcfd1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772755
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Initialize uninitialized variables to get the
build through
Bug 1640594
Change-Id: Ia0788c5852bb8d68a79004e3f2fa1b3d2b9ca2fe
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772239
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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CONFIG_UID_STAT is buggy and not needed
Bug 200115637
Change-Id: I105a46e91cba63508115be6fdd1c2e49962d25e8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/764550
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit 28c9354b7cbade8813e0e5dbe9937300219fbeb9.
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Change-Id: I4a809d75523513c939fa17a6dbeebee292aec77b
Reviewed-on: http://git-master/r/759472
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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Using Tegra WDT to trigger FIQ when system is in soft lockup.
Bug 1581432
Change-Id: I853a88a3f6e9402c978db18c5a63e903c582040a
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/265871
(cherry picked from commit f115f435d471af22ddec5e9d969662f79193f846)
Reviewed-on: http://git-master/r/680353
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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if vpr memory is carved out, then only call dma_alloc
for secure memory.
Bug 200057068
Change-Id: I12557cfaa48f7db729ccab17d3151916d35ce0f1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/746153
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Added AR0261 sensor support
Bug 200089114
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Change-Id: I8f6d6c6ea4905d9087fd6281bc8b215ec0a73fdb
Reviewed-on: http://git-master/r/741716
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ming Wong <miwong@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Enable CONFIG_DNOTIFY for L4T kernel config
Bug 1627091
Bug 200097847
Change-Id: I30d53089df825a776f03e1f0f08f1d6d8b1c9bb0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/741517
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This allows perform L1 cache clean alone.
Bug 200077334
Change-Id: I776de6e6726862e330b626fd19f8ae8f70055538
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/742254
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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This allows perform L1 cache clean alone.
Bug 200077334
Change-Id: I7a6106ed53755df33e09e3fa32a9e2524eb98649
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/742252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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enable cpu-balanced cooling device on jetson-tk1
Bug 1640651
Change-Id: Ice4c50044f4ac2bfb2bc61114e6264135a92b847
Signed-off-by: Neil Chen <neilc@nvidia.com>
Reviewed-on: http://git-master/r/742125
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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bug 200007291
Change-Id: Ia1d8d4c8ea67a30c61e4178863e2f6f1bcb13753
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/413049
(cherry picked from commit 7564df85908c98b8fd6e5835cb02262091057d4e)
Reviewed-on: http://git-master/r/725517
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jeetesh Burman <jburman@nvidia.com>
Tested-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Set Mac freq for cpu_lp to 804Mhz for 24x7 cd575mi
personality
Bug 1563635
Change-Id: I72f4ffdcdcf7ce93b940f5b7c36726d63e5b3e87
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/732544
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 200044433
Change-Id: I792062649c247229270678a44d10323d2744b569
Signed-off-by: Kassey Li <kasseyl@nvidia.com>
Reviewed-on: http://git-master/r/721561
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Fix config conflict for watchdog.
Tegra watchdog is disabled by default.
Users can access /dev/watchdog0 to operate it.
Bug 1557390
Change-Id: Ia1bb6c91dfbea85375d84bef10a10209b2fcef9f
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/712938
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
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This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.
Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.
The register is not yet documented in the TRM, here is
the description:
70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
[31:02] RESERVED
[01:01] DSIB_MODE [CSI=0,DSIB=1]
[00:00] RESERVED
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
BUG=chrome-os-partner:30799
TEST=Tested on ryu
(cherry picked from commit 489c8251776de8838547207acce199f50846ded1)
Change-Id: I424f488131e51ac793814d98d018162f0644509e
Reviewed-on: https://chromium-review.googlesource.com/219832
Reviewed-on: http://git-master/r/668725
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/723409
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Updates based on v11 of Jetson_TK1_customer_pinmux.xlsm
configure pee2 as gpio
Added CSI_CD/DSI_B Muxing Option
Disable open drain for pwr_i2c
Bug 1551864
Change-Id: I708505e8664cbb56b7b4ac32e14e2e20618a3114
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/707204
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Some of PTSA regsiters are restored to wrong value that affects
other clients under memory controller. Correct it to fix audio
noise issue after LP0 resume.
Bug 1612520
Change-Id: I92f03cace5dcc81a33a71cdd4628c2112f7015ed
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/712540
(cherry picked from commit 478e8e144acd8218421ddbf69e8dd2676a68ab8e)
Reviewed-on: http://git-master/r/713592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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For 70degC trip due to edp, increase the max limit further
to 76 as the driver applies a tolerance of 5 degC.
Also increase the shutdown limit to 105degC
Bug 1610806
Change-Id: Id6d7ed12c801e850e8147045fff03e5dbcf5d5ef
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/722316
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Non negative value of cp_rev should be treated as
a newer properly fused chip
Bug 1610806
Change-Id: I7da1bec91996bbd5a522e2f043147b48272e0500
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/721053
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Currently Android sync framework is used only in Android side,
however, it provides a generic synchronization framework that
can be used also in Linux.
This patch enables Android Sync framework on T124, T132 and T210
on Linux.
Bug 1601262
Change-Id: I46530a9b1b2245c0ddf8f7bc52b28af247350e14
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/677655
(cherry picked from commit 5998cc1d0d861986e34a74787650a79f3b1cd999)
Reviewed-on: http://git-master/r/714740
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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CD575MI:
Max GPU freq is set to 852Mhz for 4/4/16
cpu_g powered by pllx is set to 1.5 and 1.8Ghz below 0 degC
Enable SOC dvfs for default personality
CD575M:
Lower CPU freq to 1912Mhz @ Max 1.12V
Lower GPU freq to 804Mhz @ Max 1.90V
Bug 1563635
Change-Id: Ib33f34fe2c0580d0f750de40f68560031f7266b0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/711627
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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sigreturn path""
Reverting because this change causes __memcpy_neon() to corrupt if
interrupted by signal handler.
Bug 200046014
This reverts commit e700ffc891047182e16f53fc0238c8fd9bf72007.
Change-Id: I53d7214259fcff94e01bed141a4b9e6a7b29890e
Reviewed-on: http://git-master/r/710306
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
(cherry picked from commit d0ef94fa57264e047bf3873a60d01709a617887b)
Reviewed-on: http://git-master/r/710309
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Bug 1598204
Change-Id: I453d18ce570e57c0feab8dc3b24cc2c957b95301
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/672147
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Check max clock supported by DC before programming it with that mode.
If the requested pixel clock is greater than the maximum supported,
fall back to default mode.
Bug 200031813
Change-Id: I9c5d4373ff0ee8de039af42f46323909b0bec272
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/676941
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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Bug 1600299
Change-Id: I63f4d597bcc8b960407a7291fde6aa2ddb5bec25
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/674099
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Tegra watchdog is disabled by default.
Users can access /dev/watchdog0 to operate it.
Bug 1557390
Change-Id: I0ee4f787336fc566900ffeb5c26c6fde6530b904
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/674635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Implement Tegra WDT FIQ debug function.
Default is disabled.
Bug 1581432
Change-Id: Ic81ab4cd3285080016b37191e6e0fab18e330a30
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/#/c/271988
Reviewed-on: http://git-master/r/662550
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Enabling PSTORE configrations for L4T
Bug 1581073
Change-Id: Ic54616379a5a279117ae85cb0e3465ef5c2c70b8
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/661347
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Rui Zhuo <rzhuo@nvidia.com>
Reviewed-by: Renn Wu <rewu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Set Sata Enable to output High to get sata working
Bug 1551864
Bug 200070681
Change-Id: Ifb01377df3f597304b303487f91a26053e2f1fb6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/670552
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Power-up and initialize sensor-hub MCU to start fetching code from
flash storage.
Bug 1560072
Change-Id: I993dc76f34cad8a3ef6aa11c2077a87f62e9ce58
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Reviewed-on: http://git-master/r/659365
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arun Kannan <akannan@nvidia.com>
Tested-by: Arun Kannan <akannan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Change-Id: I1c00d571e294ccf1c4d795bb90e71defd3395293
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/591333
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
(cherry picked from commit b87d110ddc52048944862fb8bf019922333b1dd5)
Reviewed-on: http://git-master/r/665999
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
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Change clks_init() internal API to use CSI port number to enable clks
instead of using dev_id which is incorrect sometime, since vi.0 might
also assigned to CSI_B/CSI_C port.
Bug 1560636
Change-Id: I0e26308ec885e2e34fe8faa63fca404c911912c4
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/539002
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
(cherry picked from commit c66d8e5880589b0d95dba63d10daff53e47e8628)
Reviewed-on: http://git-master/r/665995
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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