summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2013-01-28ENGR00241003-1 mx6: need to add delay in LDO voltage settingAnson Huang
1.LDO ramp up time may be modified by ROM code according to fuse setting, cpu freq driver use fixed delay time which assume the LDO ramp up time is the reset value of ANATOP register, need to set it to reset value in regulator init. 2.The regulator set voltage should take care of the ramp up time, calculate the ramp up time based of register setting and to the delay, make sure that when the set voltage function return, the voltage is stable enough. 3.CPUFreq no need to use delay, it is already taken care by regulator voltage setting. Signed-off-by: Anson Huang <b20788@freescale.com>
2013-01-22ENGR00241251 imx6_sabreauto: workaround touch screen can not wake up issue.Zhang Jiejing
Workaround this issue by not suspend, and this will be check by driver, if can not request the wake up gpio, it will not do the suspend & resume. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2013-01-21ENGR00240990 MX6 HDMI dongle:Configure HDMI PHY registersLiu Ying
This patch sets HDMI PHY register values in MXC HDMI driver platform data so that MXC HDMI driver can configure the 0x09 CKSYMTXCTRL register(Clock Symbol and Transmitter Control Register) and 0x0E VLEVCTRL register(Voltage Level Control Register), then we may pass HDMI compliance test for MX6 HDMI dongle board. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2013-01-18ENGR00240740-2 ARM:IPUv3:Add an interface to disable IPU hsp clkLiu Ying
This patch adds an interface to disable IPU hsp clock so that it can be called out of ipu common driver. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2013-01-16ENGR00240112-3 imx6: config: enable user space crypto API in defconfig.Zhang Jiejing
enable user space crypto API in defconfig. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2013-01-04ENGR00235540 Change the menu key to power key for sabreautob02247
Change MENU key to POWER key for sabreauto Signed-off-by: b02247 <b02247@freescale.com>
2013-01-04Merge tag 'rel_imx_3.0.35_1.1.0' into imx_3.0.35_androidXinyu Chen
Conflicts: drivers/mxc/vpu/mxc_vpu.c drivers/usb/gadget/arcotg_udc.c sound/soc/imx/imx-wm8962.c
2012-12-25ENGR00238201-3 V4L2:ADV7180:enable adv7180 in Androidguoyin.chen
Enable CONFIG_MXC_TVIN_ADV7180 for android Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
2012-12-21ENGR00238053: Fix the bug in Fuse read for VPU and GPU disablers of iMX53Nitin Garg
Fix the bug in Fuse read for VPU and GPU disablers of iMX53. The disablers are located at Fuase Bank 0. Also need to enable the clks before reading the IIM. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2012-12-21ENGR00238052: Add support for Android RAM console for iMX53Nitin Garg
Add Android RAM console cupport for iMX53 SMD and align the imx5_android_defconfig with google's defconfig. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2012-12-19ENGR00235370-6 mx6: hdmidongle: use LDO bypassZhang Xiaodong
Add new feature which supporting LDO bypass Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
2012-12-18ENGR00237520 mx6q_sabresd: Move power control to pcie driverguoyin.chen
Keep power supply of pcie by setting the flag pcie_power_always_on Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
2012-12-18ENGR00237520 MX6 PCIE: add flag to keep power supplyguoyin.chen
Keep power supply based on pcie_power_always_on for 3g modem,which is not function as a pcie device. Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
2012-12-18ENGR00235540-1 reserve mem for framebuffer in sabreautob02247
reserve mem according the fbmem value Signed-off-by: b02247 <b02247@freescale.com>
2012-12-18ENGR00235540 add "fbmem" config for sabreautob02247
add "fbmem" config for sabreauto_6q Signed-off-by: Shengjiu Wang <b02247@freescale.com>
2012-12-17ENGR00237163 android: imx6 android defconfig sync.Zhang Jiejing
sync android defconfig with bsp. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-12-14ENGR00179636-07 - i.MX6 : Enable ethernet NAPI method in default.Nitin Garg
- Enable ethernet NAPI method in default, which can reduce cpu loading and RX FIFO overruns in busy system. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2012-12-14ENGR00236512 mmc: esdhc: make sd3 and sd2 have same platform configJianzheng Zhou
Let sd2 and sd3 slot to have the same platform config. It will remove the restriction that wifi dongle must be inserted into the certain slot. Signed-off-by: Jianzheng Zhou <jianzheng.zhou@freescale.com>
2012-12-13ENGR00236052 add keychord driver in android config.Zhang Jiejing
android use keychord to archive start function in init.rc with some key combo press. eg: service bugreport /system/bin/bugmailer.sh class main disabled oneshot keycodes 115 114 This service will start if VOL-UP and VOL-DOWN press same time. it will start collect bug log, and snapshot and start a mail activity to send the bug report to a mail address. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-12-12ENGR00236827-1: Enable MPR121 capacitive button driver in imx5 android configNitin Garg
Enable MPR121 capacitive button driver in imx5 android config. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2012-12-12ENGR00235817 mx6: use SNVS LPGPR register to store boot mode value.Zhang Jiejing
After using POR reset, the content in SRC will be reset. See RM: 63.5.1.2.3 IPP_RESET_B(POR) Because POR reset will reset most of register in IC, so use SNVS_LP General Purpose Register (LPGPR) to store the boot mode value. Below copy from SNVS_BlockGuide.pdf: The SNVS_LP General Purpose Register provides a 32 bit read write register, which can be used by any application for retaining 32 bit data during a power-down mode This Patch will use [7,8] bits of this register. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-12-12ENGR00236031 MX6 USB :Change default USB H1 and OTG driver load ordermake shi
In current linux BSP USB H1 driver default load before otg driver load, which cause USBx not match the ehci controller number. like bellow: root@freescale /sys/devices/platform/fsl-ehci.0$ ls driver modalias pools power subsystem uevent usb2 root@freescale /sys/devices/platform/fsl-ehci.1$ ls driver modalias pools power subsystem uevent usb1 Signed-off-by: make shi <b15407@freescale.com>
2012-12-11ENGR00236620: Add fastboot and recovery methods for iMX5Nitin Garg
Add fastboot and recovery methods with Android reboot commands. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2012-12-11ENGR00235370-3 mx6: hdmidongle: Add new board HDMI dongle.Zhang Xiaodong
Add machine layer file for HDMI dongle Modify kconfig and makefile for HDMI dongle Add new machine type in arch/arm/tools/mach-types Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
2012-12-05ENGR00235624 Quad/DualLite ARD: MTD partition non alignedAlejandro Sierra
MTD partition for SPI-NOR was not aligned to 8K. Replace its offset from MTDPART_OFS_APPEND to MTDPART_OFS_NXTBLK. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
2012-12-06ENGR00235630 MX6 USB :fix USB does not work when plug in device during suspendmake shi
USB does not work when plug in a usb device during system suspend. Under this case, USB driver will be in low power mode, but WIE bit not be set if usb wake up is not enabled.So there are only ID change interrupt no USB wakeup interrupt after system resume.In current bsp, after system resume ID change status not be clear,and ID change interrupt will continue happen, which cause the system busy. No checking WIR bit if ID change interrupt happen when USB in low power mode to fix this issue. Signed-off-by: make shi <b15407@freescale.com>
2012-12-05ENGR00235630 MX6 USB :fix USB does not work when plug in device during suspendmake shi
USB does not work when plug in a usb device during system suspend. Under this case, USB driver will be in low power mode, but WIE bit not be set if usb wake up is not enabled.So there are only ID change interrupt no USB wakeup interrupt after system resume.In current bsp, after system resume ID change status not be clear,and ID change interrupt will continue happen, which cause the system busy. No checking WIR bit if ID change interrupt happen when USB in low power mode to fix this issue. Signed-off-by: make shi <b15407@freescale.com>
2012-12-04ENGR00235631 mx5x: fix build error for mx53 androidXinyu Chen
One issue is bring in by merge. The other is bring in by BSP's cpufreq commit. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-11-30Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35_1.1.0' into ↵Xinyu Chen
imx_3.0.35_android Conflicts: arch/arm/mach-mx6/board-mx6q_sabrelite.c arch/arm/mach-mx6/board-mx6q_sabresd.c arch/arm/plat-mxc/cpufreq.c
2012-11-29ENGR00235268: change caam_ipg_clk's CG to CG6Terry Lv
Another patch changed caam_ipg_clk's CG to CG4 and this commit will revert this change. Signed-off-by: Terry Lv <r65388@freescale.com>
2012-11-29ENGR00235081 Quad DL: Fix chip select for SPI-NOR and flagsAlejandro Sierra
Fix chip select for SPI-NOR and remove flags for no writeable partition for weim nor and SPI-NOR Signed-off-by: Alejandro Sierra <b18039@freescale.com>
2012-11-28ENGR00235214 - iMX5x Kernel Change for Jelly BeanOliver Brown
Update config file and copyright comments. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
2012-11-28ENGR00235193 - GPS Support for i.MX53Jeff Kudrick
The UART2 pin mux settings are aligned to the mux settings from i.MX53 ICS where GPS was operational. Signed-off-by: Jeff Kudrick <jeff.kudrick@freescale.com>
2012-11-28ENGR00234685-2 mx6q_sabreauto: change Sabreauto board to LDO-ENABLED modeRobin Gong
Per hardware design, we can't set LDO bypass mode on Sabreauto board,otherwise, system will can't reset,if cpu freq run in 400Mhz. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-28ENGR00234685-1 cpufreq:fix one bug in cpufreq driver if I2C transfer errorRobin Gong
Currently, if we used LDO bypass, will set pfuze register by I2C bus to modify voltage according to different cpu frequency, if I2C transfer error, we should restore to old cpu frequency, not only in cpufreq driver but also cpufreq core. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-28ENGR00234531 fix MFGTOOL issue after USB module loadable doneTony LIU
- must add a new config item to enable USB CONFIG_USB_FSL_ARC_OTG=y Signed-off-by: Tony LIU <junjie.liu@freescale.com>
2012-11-28ENGR00234411-2 CPUFREQ: fix one code bug on regulator restore when failRobin Gong
Didn't care about pu_regulator is enabled or not when regulator restore if some regulator set failed. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-28ENGR00234411-1 Sabreauto: fix error print COULD NOT SET GP VOLTAGE.Robin Gong
Didn't take more care about non-pfuze board, and there is two place in BSP will call "mx6_cpu_regulator_init". It means regulator_get will be called twice on every vddcore/vddsoc regulator. Then one value need set twice ,because from regulator core view, there is two regulators share the same regulator. The non- validate one will return error and print "COULD NOT SET GP VOLTAGE!!!!." on Sabreauto board. The same as Sabrelite and ARM2 board. Meanwhile, Sabreauto need be configured LDO bypass default. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-28ENGR00234354-2: board-mx6q_sabreauto aline weim-nor partition layoutAdrian Alonso
* Aline weim-nor partition layout with u-boot expected offtsets "bootloader" /dev/mtd0 "bootenv" /dev/mtd1 "kernel" /dev/mtd2 "rootfs" /dev/mtd3 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-11-28ENGR00234354-1: board-mx6q_sabreauto aline spi-nor partition layoutAdrian Alonso
* Aline spi-nor partition layout * set correct chip-select value Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-11-21ENGR00222170: Add mx6sl_evk_android_config for mx6sl evk boardJack Lee
- add CONFIG_MACH_MX6SL_EVK to imx6s_android_defconfig Signed-off-by: Jack Lee <jacklee@freescale.com>
2012-11-20ENGR00231277 Change the mma8451 and mag3110's config to algin with SDP boardguoyin.chen
SDP boards layout have board's width aligne with LVDS's height Update the mma8451 and mag3110's config to algin with SDP board Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
2012-11-20ENGR00234217 cpufreq:fix loops_per_jiffy wrong on new suspend flow of cpufreqRobin Gong
Currently, we use pm_notifier to enter suspend/resume flow. But in the notifier we only set cpufreq, didn't tell CPUFREQ core what the current cpufreq setting now. So in the next time if CPUFREQ core find the current cpu frequncy is not the value that CPUFREQ core want to set before. CPUFREQ core will force to set the freqs.old with its own rule, which means the freqs.old will be MODIFYED unexpectedly, and this will cause wrong loops_per_jiffy. We need add cpufreq_ notify_transition in the suspend/resume interface of cpufreq. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00234045 fix building error caused by ENGR00233366Robin Gong
Forget submit some local change... Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00233366-4 WDOG LDO_BYPASS: fix wdog2 to reset external pmic in ldo bypassRobin Gong
On Sabresd board design, the WDOG_B output to reset external pmic source from GPIO_2 pad which can be configured as WDOG2_WDOG_B, so if in ldo bypass mode, we should use WDOG2 reset signal to reset pmic, not WDOG1. Also, configure the related pins. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00233366-3 CPUFREQ:add cpufreq restore back if set failRobin Gong
Restore back cpu freq and regulator if set fail. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00233366-2 mx6q_sabresd mx6sl_arm2 mx6sl_evk: config in LDO bypassRobin Gong
U-boot will not care about ldo bypass, move these code from u-boot to kernel. Move the workaround for PFUZE1.0 to kernel too. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00233366-1 Anatop PFUZE: LDO bypass can be configed by cmdlineRobin Gong
Currently, use CONFIG_MX6_INTER_LDO_BYPASS to enable/disable LDO bypass, and use the same macro in u-boot too. It's not very friendly ,it will be more flexible if use dynamic configure by command line input by u-boot. Two ways to enable LDO bypass: 1. use command line: You can set "ldo_active=on" or "ldo_active=off" in command line to enable/ disable LDO bypass. 2. set enable_ldo_mode value in board file: If you didn't set the param in command line, every board will use its default value, for example, you can find below code in arch/arm/ mach-mx6/mx6q_sabresd_pmic_pfuze100.c: static int pfuze100_init(struct mc_pfuze *pfuze) { .... /*use default mode(ldo bypass) if no param from cmdline*/ if (enable_ldo_mode == LDO_MODE_DEFAULT) enable_ldo_mode = LDO_MODE_BYPASSED; .... } Note: 1.You should know clearly ldo bypass can be only enabled in the board that mounted with external pmic to supply VDDARM_IN/VDDSOC_IN power rail, and you should implement related external regulator firstly, such as: in arch/arm/mach-mx6/board-mx6q_sabresd.c static struct mxc_dvfs_platform_data sabresd_dvfscore_data = { .reg_id = "VDDCORE", .soc_id = "VDDSOC", .... } otherwise, you have to use internal ldo which is the default configuration. 2.one special case, if the chip is 1.2Ghz, it can't be set LDO bypass. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-19ENGR00234040 FUSE 1.2G: add fuse bit for 1.2GRobin Gong
Before, we use "arm_freq" in command line to set 1.2G. Now we will read the fuse bit and "arm_freq", get the mini value to be used as "arm_max_freq".And: 1. you can easily set CPU max freq on what frequency you want by cmdline. 2. if you didn't set arm_freq in cmdline, kernel will read the fuse bit (0x021bc440) to set the right arm_max_freq. At the same time, add 1Ghz setpoint if chip max freq is 1.2Ghz. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-17ENGR00233770 i.mx6q/vpu: Add fuse check for VPU_DISABLE featureJason Liu
This patch add the fuse check for VPU_DISABLE feature. If the fuse bit for VPU_DISABLE is 1, which means VPU is disabled, then we will not register VPU device to the kernel. Signed-off-by: Jason Liu <r64343@freescale.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-26 04:20:25 +0000