summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2011-07-06ARM: tegra: ventana: set usb2 phy typetegra-11.2.10Ken Chang
set usb2 phy type to TEGRA_USB_PHY_TYPE_LINK_ULPI bug 845612 Change-Id: I35ae7a2e3eb6e0666a1b54e5249faad4f77bd299 Reviewed-on: http://git-master/r/39603 Reviewed-by: Manish Tuteja <mtuteja@nvidia.com> Tested-by: Manish Tuteja <mtuteja@nvidia.com> Reviewed-by: ChihJen Hsu <chhsu@nvidia.com>
2011-07-06arm: tegra: usb: usb registration orderSuresh Mangipudi
Modified the usb registration order, otg is the first to be registered. Bug 835678 Change-Id: I709a944a49aa59886f906bd4184e80b35836125c Reviewed-on: http://git-master/r/39505 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Alex Courbot <acourbot@nvidia.com> Tested-by: Alex Courbot <acourbot@nvidia.com>
2011-07-06usb: ehci: tegra: fix hotplug issue on usb2Ken Chang
usb hotplug is supported only for UTMI phy. usb_phy_type should be carefully checked in ehci irq. bug 845612 Change-Id: I2fdc7c79b9816dd3465353375448b07f138ff950 Reviewed-on: http://git-master/r/39338 Tested-by: Ken Chang <kenc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Yu-Fong (Foster) Cho <ycho@nvidia.com> Reviewed-by: ChihJen Hsu <chhsu@nvidia.com>
2011-06-30arm: tegra: fuse: new programming sequenceVarun Wadekar
- vdd_core needs to be 1.14V min before fuse write/read - add wait_for_idle before accessing fuses - add proper programming of PRIV2INTFS field Bug 841766 Change-Id: Ie9ec27bdbc975a4e3ce40a0ce60fe7049f7c2429 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/37618 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2011-06-30arm: tegra: dvfs: add entry for fuse_burnVarun Wadekar
Bug 841766 Change-Id: I24e7102f3c2fb17b9f2095cf12feccefbcdf8dce Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/37617 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-30arm: tegra2: clocks: add fuse and fuse_burn clocksVarun Wadekar
keep fuse clock always enabled to allow fuse read writes from multiple clients Bug 841766 Change-Id: I01391ff88e1af5d622fe52b8fad30e2dfc02f38c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/38402 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-28video: tegra: nvmap: fix GART pin lockupsKirill Artamonov
Fix GART lockups caused by fragmentation by evicting mapped areas from iovm space after unsuccessful array pinning attempt. Fix double unpin error happening during interrupted submit. Fix possible sleep in atomic context in iovmm code (semaphore inside spinlock) by replacing spinlock with mutex. Fix race between handle_unpin and pin_handle. bug 838579 bug 838073 bug 818058 bug 844307 Conflicts: drivers/video/tegra/nvmap/nvmap_mru.c Change-Id: Ie44fa88510f62ce5c7d31af3b07afdf69a3ad4a6 Reviewed-on: http://git-master/r/38430 Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Tested-by: Kirill Artamonov <kartamonov@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-26arm: tegra: power: fix LP2 scheduling in atomictegra-11.2.9Xin Xie
disable_irq() will do schedule() if threaded IRQ handler is running. But suspend_cpu_complex() is called from IRQ disabled. disable_irq_nosync() should be used here because it will not sleep. BUG 841808 Change-Id: I5bc241e607ffb5cad34530185e308a9f9bbc6543 Reviewed-on: http://git-master/r/37505 Reviewed-on: http://git-master/r/38188 Reviewed-by: Xin Xie <xxie@nvidia.com> Tested-by: Xin Xie <xxie@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-22ARM: tegra: Enable cdev1 clk from board fileSumit Bhattacharya
Enabling cdev1 clk or DAP Mclk from board file instead of codec soc file because Mclk needs to be enabled before codec initialization. Also exposing set_parent() for cdev clocks so that it is possible to enable them from board file. Bug 827709 Bug 839210 Bug 821178 Change-Id: I6e0e15be9f9a2da98ce2ba89e3390bef1e2b93a7 Reviewed-on: http://git-master/r/37631 Tested-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2011-06-21ARM: tegra: Fixed the wrong 'if' statement.Jubeom Kim
Removed the semicolon after 'if'. Change-Id: I91df7b367633e269116110b3469c1efcb2589a95 Reviewed-on: http://git-master/r/37459 Tested-by: Jubeom Kim <jubeomk@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
2011-06-14mmc: tegra: disable broken deferred resumeDavid Schalig
MMC_BLOCK_DEFERRED_RESUME causes race conditions in the SD/MMC driver, i.e. mmc_sd_detect() will be called from different threads causing inconsistent state. Disabling feature for Tegra. Bug 833034 Change-Id: I516272a5a0af44ba27122cc0c6476512cf5b617d Reviewed-on: http://git-master/r/36254 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-06-14ARM: tegra: confiure AHBDMA gizmo setting.Jay Cheng
Bug 820602 Change-Id: I6a5f116cc3c32f58a7404de24a073ddaf2c79227 Reviewed-on: http://git-master/r/35954 Tested-by: Cho-Che Cheng <jacheng@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-14media: tegra: avp: Clear interrupt registers when AVP startsKaz Fukuoka
There was no code to clear interrupt registers for AVP. First run of AVP was OK because those registers start from reset value. But because those registers were not cleared, when the second time AVP was started, some interrupts were enabled too early. That caused interrupts coming before handlers were ready. This change also removes the workaroud for the bug. bug 827353 bug 826234 Change-Id: I21876a4d2a8d729def9f43a0f8879e1de3e84dde Reviewed-on: http://git-master/r/33083 Reviewed-on: http://git-master/r/35355 Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-13ARM: tegra: pm: save/restore ahb bus registersJay Cheng
Bug 814896, 820602 Change-Id: Ief590e49f995dd1da6502707ac329057a12f4f17 Reviewed-on: http://git-master/r/35948 Tested-by: Cho-Che Cheng <jacheng@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-13arm: tegra: fuse: fix multiple issuesVarun Wadekar
- handle scenarios when the number of fuses burnt is a odd number - wait for the fuse bock to be idle before issuing any command - burning of master_enb fuse is not required to be done according to the guidelines Bug 823552 Change-Id: I04477dcfae610aed3e2072adfc48ebd7212449ad Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/35883 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-13arm: tegra: ventana: add hdmi to earlysuspendGaurav Sarode
use FB_BLANK_POWERDOWN on hdmi device in earlysuspend to cause tegra_dc_disable. Fixes bug 835171 Change-Id: I112d05f271b9d12319186ff1b9bd2d0e0667a75e Reviewed-on: http://git-master/r/35412 Tested-by: Gaurav Sarode <gsarode@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-10ventana: camera: Added regulator supply for d-mictegra-11.2.8Viraj Karandikar
Added regulator vmic to use in soc-audio Reviewed-on: http://git-master/r/33110 (cherry picked from commit 1b5f6d90219d6e3beeaeb2ec286949bc838d9bc4) Change-Id: Iba33f5bf2bc5243ff13995005d1c182f6d120d55 Reviewed-on: http://git-master/r/35375 Tested-by: Viraj Karandikar <vkarandikar@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-06-10arm: tegra: ventana: ldo4 must never be disabledVarun Wadekar
disabling ldo4 kills power to the board completely. there is no way to power on the board again, other than reinserting the power plug. Change-Id: I1e03389cf26ad8de7a5d5fb518f85fa6c9427752 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/35620 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-10ARM: defconfig: enable USB_NET_AX8817X by defaultVandana Salve
This option adds support for ASIX AX88xxx Based USB 2.0 Ethernet Adapters and it works with TrendNet TU2-ET100 devices. Bug 834417 Change-Id: I46d3990e72c66b6abc2821b7e70d039718bbf487 Reviewed-on: http://git-master/r/35699 Reviewed-by: Vandana Salve <vsalve@nvidia.com> Tested-by: Vandana Salve <vsalve@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-10[ARM] tegra: Extend the wait interface in the hostPaul Hodgson
Extend the wait interface to relay the actual resultant waited point back. Reviewed-on: http://git-master/r/23033 (cherry picked from commit bc22c56ecb54ec093262cee4b1105c2503e5497e) Change-Id: I65224359f85d3f357e48eeacdf76c9bd97056a54 Reviewed-on: http://git-master/r/35919 Reviewed-by: Brian Anderson <branderson@nvidia.com> Tested-by: Brian Anderson <branderson@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
2011-05-27ARM: tegra: whistler: Add cd gpio polarity to platform dataPavan Kunapuli
Passing card detect gpio polarity through platform data. This is used in sd cards insertion/removal detection. Bug 831409 Change-Id: I29c99696daf094d4f04789121ddfb681dccca12a Reviewed-on: http://git-master/r/33123 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com> Tested-by: Joseph Lehrer <jlehrer@nvidia.com>
2011-05-27usb: phy: tegra: regulator enabled by defaultSuresh Mangipudi
Hotplug does not work if the regulator is disabled, so keep it enabled until the device wants to enter lowpower mode. Change-Id: I5a53a0fb0a7f26ba9f2674bbc65f4650948f6143 Reviewed-on: http://git-master/r/33117 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-05-27video: tegra: add display inversion supportAri Hirvonen
Change-Id: I6ec62abdaf3a8ec2e59e2a533b36b280d69538e1 Signed-off-by: Ari Hirvonen <ahirvonen@nvidia.com> Reviewed-on: http://git-master/r/33037 Reviewed-by: Michael I Gold <gold@nvidia.com> Tested-by: Michael I Gold <gold@nvidia.com>
2011-05-27ARM: tegra: Enable AHB prefetch for USBRakesh Bodla
Enabling AHB prefetch on USB1, USB2, USB3 controllers, to improve the USB transfer throughput. Bug 820602 Change-Id: I4e9e9fa37624cc11f83effd268cdbf31c01f1df7 Reviewed-on: http://git-master/r/30475 Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Tested-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-05-26Fix incorrect license.Maria Gutowski
Change-Id: I2dcdfadb44a981cccf583a156be0be093ca5feec Reviewed-on: http://git-master/r/34229 Reviewed-by: Maria Gutowski <mgutowski@nvidia.com> Tested-by: Maria Gutowski <mgutowski@nvidia.com>
2011-05-25ARM: defconfig: enable TEGRA_MC_PROFILE by defaultBharat Nihalani
this is done so that it's easy to get the emc stats without having to enable this explicitly when one wants to get the emc stats. Change-Id: Id6039e8cb4510740182981245453128f406ee00d Reviewed-on: http://git-master/r/32171 Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-19tegra: dvfs: fix unintialized variable useDavid Schalig
Assignment moved inside if statement, where it belongs. bug 828756 Change-Id: I2ee63bed168feade897ba15b364de1ee714f1381 Reviewed-on: http://git-master/r/31955 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
2011-05-19tegra: dc: adding max pixclock check for hdmiDonghan Ryu
tegra_dc_hdmi_equal doesn't check pixclock. some devices doesn't support 14.85Mhz pixclock so 1080p@60 cannot be used. However, 1080p@30 is supported. Therefore, adding a max pixclock prevents 1080p@60 mode is falsely used for those devices Bug: 815409 Change-Id: Ia2d8dcf360afa51e160d0e997986fe1714254a6b Reviewed-on: http://git-master/r/31663 Reviewed-by: Donghan Ryu <dryu@nvidia.com> Tested-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-19usb: host: tegra: hotplug detection of deviceSuresh Mangipudi
Add support for usb hotplug, this change will add the following: vbus is left enabled. Bug 796158 Change-Id: I3c3cfa0bf8858b3be2351fe753ceb2a0229ed15d Reviewed-on: http://git-master/r/30686 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2011-05-18[tegra alsa] support digital mic on ventanaRavindra Lokhande
added code to support digital mic on wm8903 for ventana. By default analog mic is enabled. To enable digital mic write 1 and to disable write 0 to /sys/devices/platform/soc-audio/enable_digital_mic Change-Id: I36e239d10404a9bc8446e275e5c59e9829409608 Reviewed-on: http://git-master/r/29615 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-18ARM: tegra: clocks: sku limit for pclkPrashant Gaikwad
sclk max rate for AP25 is 300MHz and pclk is set as 1:2 to sclk. pclk max rate changed to 150MHz for AP25. Bug 821534 Change-Id: I6c6b30f0c9b2dd568e6171e9b6d88c8eef212ab7 Reviewed-on: http://git-master/r/31311 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2011-05-16nvrm: move stale wait checking into the kerneltegra-11.2.6Chris Johnson
The kernel now receives wait tracking data (similar to gathers and relocs) and compares the current syncpt with the threshold value. If it's old, it gets a kernel mapping and rewrites the method data to use a kernel reserved syncpt that is always 0 (so trivially pops when seen by the HW). Bug 519650 Bug 785525 Bug 803452 Note: reset the author in this commit to fix a email addr problem and since from the latest/last cherry pick there was a reworking of the code to be compatible with different user space versions it also seemed reasonable. (cherry picked from commit 4069d8e67665624ad3dceb628e572980dd57acd0) (cherry picked from commit 6e4336408588e348804a62e53386acc9abc06823) (cherry picked from commit 87a9efe751716ca741caac72b9061fdfdcec540a) Change-Id: I9c6076da2384f373d5f402bee4406b09b4ebc4ff Reviewed-on: http://git-master/r/23159 Reviewed-on: http://git-master/r/30281 Tested-by: Chris Johnson <cwj@nvidia.com> Reviewed-by: Ken Adams <kadams@nvidia.com> Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
2011-05-12ARM: config: tegra: Update SecureOS configDan Willemsen
Merge updates from tegra_defconfig Change-Id: I45a488f27c516a0f892eb394771302c68cd2aa6c Reviewed-on: http://git-master/r/31257 Tested-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Andrei Denissov <adenissov@nvidia.com> Reviewed-by: Jonathan B White (Engrg-Mobile) <jwhite@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
2011-05-09arm: tegra: otg: Set platform data to NULLSuresh Mangipudi
Set the platform data for the USB1 host mode to NULL during the unregister. After freeing up the platform data pointer. Bug 820333 Change-Id: I6fb3edf58d854c0d8f648572f40cebe6811e2069 Reviewed-on: http://git-master/r/30696 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-09ARM: tegra: Adds an API to dump spdif registers.Manjula Gupta
Change-Id: Ic3eb5d136be746b55bea4efe302e0f417dfc1eb6 Reviewed-on: http://git-master/r/30512 Tested-by: Manjula Gupta <magupta@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2011-05-09ARM: tegra: clocks: add sclk for bseaVarun Wadekar
Bug 803932 Change-Id: Ia9cf3f20c6921fc18b02527c9c0108fd4f08e79b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/30195 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-06ARM: tegra: clocks: init shared clk after sku limitPrashant Gaikwad
shared clock rate is dependent on its parent max rate. Parent's max rate get updated in sku limit init depending on the sku value. Hence initialize shared clocks after sku limits are applied. Bug 821534 Change-Id: Ic11631cd54af638c8afa75aceeb4bcd999c8135f Reviewed-on: http://git-master/r/30504 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2011-05-06ARM: tegra: clocks: make pclk div dynamicPrashant Gaikwad
dynamic changing of pclk divider to follow APB clock minimum frequency requirements with respect to sclk frequency. Bug 819796 Reviewed-on: http://git-master/r/29643 (cherry picked from commit c5ed952608ff2e3ffdcba99295f8892dac1506c0) Change-Id: Iec403b137fa001ff401fd14990040889ec679eca Reviewed-on: http://git-master/r/30315 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-06ARM: tegra: clocks: Add dfs for sclkPrashant Gaikwad
sclk continues to be clocked at 120MHz even when there is no activity. Add dfs so that different modules can set sclk rate as required and it will be clocked to minimum when there is no activity. Minimum limit changed to 40MHz for sclk. Bug 819796 Reviewed-on: http://git-master/r/28764 (cherry picked from commit ee17dca953c7eadc01a221a245a7e95d0fff33ea) Change-Id: I78d4a6b699bb827de4d5cfa5ac621961d09d47de Reviewed-on: http://git-master/r/30313 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-04ARM: tegra: usb: update default UTMIP phy settingJay Cheng
Revise some default settings for utimp phy Bug 815848 Change-Id: I7eac6981e52bdf6b33e80d34aebb0dc403b326bf Reviewed-on: http://git-master/r/30257 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-04ARM: tegra: fuse: fix sysfs programming/reading logicVarun Wadekar
some testing revealed certain loopholes in the code. also the way the shell sends data down to the sysfs handlers changed which warranted the change in the handlers. Change-Id: I131ab43691321a864ad5afd4f9852a7ba8842130 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/30134 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-04ARM: tegra: flush serial console earlier in rebootBo Yan
This is to make sure this function will not cause any lock-up during actual reboot Should help bug 770426 Change-Id: Id5cfaee07d9438741b721b67c7cd342858e7b5cb Reviewed-on: http://git-master/r/28345 Reviewed-on: http://git-master/r/30176 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-04ARM: SMP: disable local IRQ and FIQ before restartBo Yan
Disabling IRQ and FIQ before we stop other processor cores and start reboot process will make sure the restart procedure is not preempted. This is to prevent the potential lockup caused by the loss of synchronisation among different processor cores due to IPI_STOP. Should help bug 770426 Reviewed-on: http://git-master/r/27780 (cherry picked from commit 3d63b7709f3614783ebbf97568132458e5198c29) Change-Id: I513a1f7394478b16f6c0204af7b31b18244ac819 Reviewed-on: http://git-master/r/30172 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-02arm: tegra: ventana: switch on supply only when camera is openedNitin Kumbhar
LDO_SHDN_L signals control AVDD_2P8V and VDD_AF_2P8V supplies to camera sensor modules. Power on these supplies only when camera is in use. BUG 782390 Change-Id: Ifefbb0b4da0b9213c4a2f76b51bcd3f2bbeb745d Reviewed-on: http://git-master/r/30015 Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-02arm: tegra: ventana: deselect pca9546 i2c mux channel on exitNitin Kumbhar
On ventana, pca9546 is used as a mux for 0v2710/ov5650 camera sensors. With UJA0H14 version of ov5650 sensor, it is observed that pca9546 driver incorrectly caches last channel when VDDIO_CAM is toggled while enabling/disabling tegra camera. Deselect i2c mux channel on exit so that i2c mux is correctly configured with new mux channel. BUG 812134 (cherry picked from commit 2d62e589c0bd933db846d4b8f9fe4f2116bef8ad) Change-Id: Id249bbeb33c370b8fc5360af33bdefecfd62a48a Reviewed-on: http://git-master/r/29811 Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-04-28ARM: tegra: correcting vde resource end fieldSanjay Singh Rawat
Change-Id: I26f58048e4bb2988a7121bf4a7738607ced88a12 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/29674 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-04-28crypto: tegra-aes: dual core supportSanjay Singh Rawat
* add bsea engine support for encryption and decryption * add arbitration semaphore id for bsea Bug 803932 Change-Id: I978b06a12265acecae99dbf13607e00ae74e87f7 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/29672 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-04-25ARM: tegra: whistler: Power down/up core railtegra-11.2.5Prashant Gaikwad
program pwren signal of max8907c regulator to power down/up core rail on deep sleep enter/exit deep sleep mode. core_timer and core_off_timer changed as per K32. separate_req set to false as whistler pmu has combined power requests. Bug 817378 Change-Id: Ia95a61360079f919a039572cf8fd4597db9efd50 Reviewed-on: http://git-master/r/28435 Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-04-25merging android-tegra-2.6.36 into git-master/linux-2.6/android-tegra-2.6.36Nitin Kumbhar
Conflicts: arch/arm/mm/proc-v7.S drivers/video/tegra/dc/dc.c Change-Id: I40be0d615f14f1c01305388a706d257f624ba968
2011-04-22Merge remote branch 'common/android-2.6.36' into android-tegra-2.6.36Rebecca Schultz Zavin