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When enabling SATA clocks, the PCIE clocks are enabled as well since
those are the parent clocks. In order to enable this parent clocks,
the PCIE regulator avdd_plle needs to be enabled. The resume path used
to freeze because the PCIE PLL did not lock.
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- Fix a bug in ahci-tegra.c when checking if SATA is on when resuming
- Add codes to support PM315 which uses LDO1 regulator for SATA rails
bug 1206518
Change-Id: Iaa910b1948fbcf5e45491977fd8ed0b313d2e0ae
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: http://git-master/r/188441
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peng Wu <pengw@nvidia.com>
Tested-by: Peng Wu <pengw@nvidia.com>
Reviewed-by: Eric Brower <ebrower@nvidia.com>
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If the board has sata support, then only add platform device
Also move slumber code to Idle powergate section to
avoid build failure.
Bug 1171138
Change-Id: I6128f451f348a7fad41fc52579b18939c8a2efcd
Original-author: Mike Thompson <mikthompson@nvidia.com>
Signed-off-by: Mike Thompson <mikthompson@nvidia.com>
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/143984
Tested-by: Simone Willett <swillett@nvidia.com>
(cherry picked from commit 6e6a0ec500a3113272a593e4466f04d940bc637f)
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/166837
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Upgrade the Tegra 3 SATA driver to support kernel 3.1.
The driver supports runtime_pm when doing power-gating during idle.
A new CONFIG_TEGRA_SATA_IDLE_POWERGATE is provided to enable/disable
power-gating during idle.
When sata clocks (sata, sata-oob and pll_e clocks) are in the
core_dvfs_table[] table, CONFIG_TEGRA_SATA_IDLE_POWERGATE must not
be enabled.
Currently, sata clocks are in the core_dvfs_table[]. Those clocks
will not be in that table in the future. By then,
CONFIG_TEGRA_SATA_IDLE_POWERGATE can then be enabled.
Change-Id: I15b585713bfd891f8827fd028b21bf3e5c2b80d9
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: http://git-master/r/89614
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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