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path: root/drivers/clk
AgeCommit message (Expand)Author
2018-07-03clk: at91: PLL recalc_rate() now using cached MUL and DIV valuesMarcin Ziemianowicz
2018-07-03clk: renesas: cpg-mssr: Stop using printk format %pCrGeert Uytterhoeven
2018-05-25clk: samsung: exynos3250: Fix PLL ratesAndrzej Hajda
2018-05-25clk: samsung: exynos5250: Fix PLL ratesAndrzej Hajda
2018-05-25clk: samsung: exynos5433: Fix PLL ratesAndrzej Hajda
2018-05-25clk: samsung: exynos5260: Fix PLL ratesAndrzej Hajda
2018-05-25clk: samsung: exynos7: Fix PLL ratesAndrzej Hajda
2018-05-25clk: samsung: s3c2410: Fix PLL ratesAndrzej Hajda
2018-05-25clk: rockchip: Prevent calculating mmc phase if clock rate is zeroShawn Lin
2018-05-25clk: tegra: Fix pll_u rate configurationMarcel Ziswiler
2018-05-25clk: Don't show the incorrect clock phaseShawn Lin
2018-05-25clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228Shawn Lin
2018-04-24clk: bcm2835: De-assert/assert PLL reset signal when appropriateBoris Brezillon
2018-04-24clk: fix false-positive Wmaybe-uninitialized warningArnd Bergmann
2018-04-24clk: mvebu: armada-38x: add support for missing clocksRichard Genoud
2018-04-24clk: mvebu: armada-38x: add support for 1866MHz variantsRalph Sennhauser
2018-04-13clk: at91: fix clk-generated compilationAlexandre Belloni
2018-04-13clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl
2018-04-13clk: Fix __set_clk_rates error print-stringBryan O'Donoghue
2018-04-13clk: scpi: fix return type of __scpi_dvfs_round_rateSudeep Holla
2018-04-13clk: at91: fix clk-generated parentingAlexandre Belloni
2018-04-13clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2Geert Uytterhoeven
2018-03-28clk: sunxi-ng: a31: Fix CLK_OUT_* clock opsChen-Yu Tsai
2018-03-28clk: bcm2835: Protect sections updating shared registersBoris Brezillon
2018-03-28clk: bcm2835: Fix ana->maskX definitionsBoris Brezillon
2018-03-24clk: migrate the count of orphaned clocks at initJerome Brunet
2018-03-24clk: si5351: Rename internal plls to avoid name collisionsSergej Sawazki
2018-03-24clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()Lars-Peter Clausen
2018-03-24clk: Don't touch hardware when reparenting during registrationStephen Boyd
2018-03-24clk: ns2: Correct SDIO bitsBharat Kumar Reddy Gooty
2018-03-22clk: qcom: msm8916: fix mnd_width for codec_digcodecSrinivas Kandagatla
2018-03-22clk: meson: gxbb: fix wrong clock for SARADC/SANAYixun Lan
2018-03-22clk: qcom: msm8996: Fix the vfe1 powerdomain nameRajendra Nayak
2018-02-25clk: meson: gxbb: fix build error without RESET_CONTROLLERTobias Regnery
2018-02-25clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLERTobias Regnery
2017-12-29clk: sunxi: sun9i-mmc: Implement reset callback for reset controlsChen-Yu Tsai
2017-12-25clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collisionChen-Yu Tsai
2017-12-20clk: tegra: Fix cclk_lp divisor registerMichał Mirosław
2017-12-20clk: hi6220: mark clock cs_atb_syspll as criticalLeo Yan
2017-12-20clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPUSébastien Szymanski
2017-12-20clk: mediatek: add the option for determining PLL source clockChen Zhong
2017-12-14clk: uniphier: fix DAPLL2 clock rate of Pro5Masahiro Yamada
2017-11-30clk: qcom: ipq4019: Add all the frequencies for apss cpuAbhishek Sahu
2017-11-30clk: sunxi-ng: fix PLL_CPUX adjusting on A33Icenowy Zheng
2017-11-30clk: sunxi-ng: A31: Fix spdif clock registerMarcus Cooper
2017-11-30clk: ti: dra7-atl-clock: fix child-node lookupsJohan Hovold
2017-11-15clk: mvebu: adjust AP806 CPU clock frequencies to production chipThomas Petazzoni
2017-11-15clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocksMarek Szyprowski
2017-11-08clk: sunxi-ng: Check kzalloc() for errors and cleanup error pathStephen Boyd
2017-10-08clk/axs10x: Clear init field in driver probeJose Abreu