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path: root/drivers/gpu/drm/i915/i915_irq.c
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2009-11-12drm/i915: Fix IRQ stall issue on IronlakeZou, Nanhai
The master irq control in DE must be disabled before irq handling, and enable after the process. This fixes the irq stall issue on Ironlake. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zou, Nanhai <nanhai.zou@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-29drm/i915: Enable irq to trace batch buffer completion.Chris Wilson
If we trigger a tracepoint for batch buffer submission, it is a reasonable assumption that we wish to also trace the batch buffer completion. So in order to capture the completion events, we need to enable irqs... However, we cannot rely on the completion event to disable the irq later, so we defer the irq disable to the retire request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-09-23drm/i915: Add tracepointsChris Wilson
By adding tracepoint equivalents for WATCH_BUF/EXEC we are able to monitor the lifetimes of objects, requests and significant events. These events can then be probed using the tracing frameworks, such as systemtap and, in particular, perf. For example to record the stack trace for every GPU stall during a run, use $ perf record -e i915:i915_gem_request_wait_begin -c 1 -g And $ perf report to view the results. [Updated to fix compilation issues caused.] Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Ben Gamari <bgamari@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-09-17drm/i915: Make dev_priv->mm.wedged an atomic_tBen Gamari
There is a very real possibility that multiple CPUs will notice that the GPU is wedged. This introduces all sorts of potential race conditions. Make the wedged flag atomic to mitigate this risk. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Hookup chip reset in error handlerBen Gamari
This patch uses the previously introduced chip reset logic to reset the chip when an error event is detected. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Implement GPU reset on i965Ben Gamari
This patch puts in place the machinery to attempt to reset the GPU. This will be used when attempting to recover from a GPU hang. Signed-off-by: Owain G. Ainsworth <oga@openbsd.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Add hangcheck timerBen Gamari
We set a periodic timer to check on the GPU, resetting it every time a batch is completed. If the timer elapses, we check acthd. If acthd hasn't changed in two timer periods, we assume the chip is wedged. This is implemented in such a way that it leaves the option open to employ adaptive timer intervals in the future. One could wait until several timer periods have elapsed before declaring the chip dead. If the chip comes back after several periods but before the "dead" threshold, the timer interval or dead threshold could be raised. It is important to note that while checking for active requests, we need to account for the fact that requests are removed from the list (i.e. retired) in a deferred work queue handler. This means that merely checking for an empty request_list is insufficient; the list could be non-empty yet the GPU still idle, causing the hangcheck timer to incorrectly mark the GPU as wedged (it took me a while to figure that out---sigh...) Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-04drm/i915: Support IGD EOSShaohua Li
In the event that any one of the DAC analog outputs (R,G,B) were driven at full-scale (white video) or some analog level close to full-scale voltage, and if the video cable were then disconnected, the analog video voltage level would exceed the maximum electrical overstress limit of the native (thin-oxide) transistors thus causing a long-term reliability concern. The electrical overstress condition occurs in this particular case. This patch address the IGD EOS (electrical overstress condition) issue. When the EOS interrupt occurs, OS should disable DAC and then disable EOS, then the normal hotplug operation follows. TODO: it appears the normal unplug interrupt is missed as reported by Li Peng, need more checks here. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-09drm/i915: silence vblank warningsFrans Pop
these errors are pretty pointless Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-05drm/i915: Use our own workqueue to avoid wedging the system along with the GPU.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-13drm/i915: refactor error detection & collectionJesse Barnes
This patch refactors the existing error detection and collection code, placing most of it in i915_handle_error(). Additionally, we introduce a work queue for scheduling post-crash tasks such as generating a uevent. Using the uevent facility, userspace should be able to capture a post-mortem dump for diagnostics. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: add FIFO watermark supportShaohua Li
This patch from jbarnes and myself adds FIFO watermark control to the driver. This is needed for both power saving features on new platforms with the so-called "big FIFO" and for controlling FIFO allocation between pipes in multi-head configurations. It's also necessary infrastructure to support things like framebuffer compression and configuration supportability checks (i.e. checking a configuration against available bandwidth). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: enable error detection & state collectionJesse Barnes
This patch enables error detection by enabling several types of error interrupts. When an error interrupt is received, the interrupt handler captures the error state; hopefully resulting in an accurate set of error data (error type, active head pointer, etc.). The new record is then available from sysfs. The current code will also dump the error state to the system log. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-18drm/i915: add per-output hotplug callback for KMSKeith Packard
This allows each output to deal with plug/unplug events as needed. Signed-off-by: Keith Packard <keithp@keithp.com>
2009-06-09drm/i915: handle interrupt on new chipsetZhenyu Wang
Update interrupt handling methods for IGDNG with new registers for display and graphics interrupt functions. As we won't use irq-based vblank sync in dri2, so display interrupt on new chip will be used for hotplug only in future. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-05drm/i915: apply G45 vblank count code to all G4x chips and fix max_frame_countJesse Barnes
All G4x and newer chips use the new style frame count register, with a full 32 bit frame count. Update the code to reflect this. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-05drm/i915: Disable opregion on IGDNG for nowZhenyu Wang
Disable OpRegion support for now until verified on new chipsets. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-17drm/i915: Don't let an oops get triggered from irq_emit without dma init.Eric Anholt
Userland is broken if it's trying this, but we also shouldn't allow oopses. Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-01drm/i915: add VGA hotplug support for 945+Jesse Barnes
Add VGA port hotplug detection to the i915 driver. When KMS is enabled, plugging in or removing a VGA cable from the VGA connector will generate a uevent, which indicates to userspace that it should re-probe outputs on this device (to determine modes, etc.). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: dropped extra PORT_HOTPLUG_STAT clear with ack from jbarnes] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-03drm/i915: Fix use-before-null-check in i915_irq_emit().Eric Anholt
This could be triggered by a client asking to emit an irq when the device wasn't initialized. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-02-08drm/i915: add get_vblank_counter function for GM45Jesse Barnes
As discussed in the long thread about vblank related timeouts, it turns out GM45 has different frame count registers than previous chips. This patch adds support for them, which prevents us from waiting on really stale sequence values in drm_wait_vblank (which rather than returning immediately ends up timing out or getting interrupted). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-01-11drm/i915: don't enable vblanks on disabled pipesJesse Barnes
In some cases userland may be confused and try to wait on vblank events from pipes that aren't actually enabled. We shouldn't allow this, so return -EINVAL if the pipe isn't on. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-12-29DRM: i915: add mode setting supportJesse Barnes
This commit adds i915 driver support for the DRM mode setting APIs. Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are supported. HDMI, DisplayPort and additional SDVO output support will follow. Support for the mode setting code is controlled by the new 'modeset' module option. A new config option, CONFIG_DRM_I915_KMS controls the default behavior, and whether a PCI ID list is built into the module for use by user level module utilities. Note that if mode setting is enabled, user level drivers that access display registers directly or that don't use the kernel graphics memory manager will likely corrupt kernel graphics memory, disrupt output configuration (possibly leading to hangs and/or blank displays), and prevent panic/oops messages from appearing. So use caution when enabling this code; be sure your user level code supports the new interfaces. A new SysRq key, 'g', provides emergency support for switching back to the kernel's framebuffer console; which is useful for testing. Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-12-29drm: move to kref per-master structures.Dave Airlie
This is step one towards having multiple masters sharing a drm device in order to get fast-user-switching to work. It splits out the information associated with the drm master into a separate kref counted structure, and allocates this when a master opens the device node. It also allows the current master to abdicate (say while VT switched), and a new master to take over the hardware. It moves the Intel and radeon drivers to using the sarea from within the new master structures. Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-12-01drivers/gpu/drm/i915/i915_irq.c: fix warningAndrew Morton
drivers/gpu/drm/i915/i915_irq.c: In function 'i915_disable_pipestat': drivers/gpu/drm/i915/i915_irq.c:101: warning: control may reach end of non-void function 'i915_pipestat' being inlined Cc: Dave Airlie <airlied@linux.ie> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-11-25drm: move drm vblank initialization/cleanup to driver load/unloadKeith Packard
drm vblank initialization keeps track of the changes in driver-supplied frame counts across vt switch and mode setting, but only if you let it by not tearing down the drm vblank structure. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-25drm/i915: Always read pipestat in irq_handlerKeith Packard
Because we write pipestat before iir, it's possible that a pipestat interrupt will occur between the pipestat write and the iir write. This leaves pipestat with an interrupt status not visible in iir. This may cause an interrupt flood as we never clear the pipestat event. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-25drm/i915: Remove IMR masking during interrupt handler, and restart it if needed.Eric Anholt
The IMR masking was a technique recommended for avoiding getting stuck with no interrupts generated again in MSI mode. It kept new IIR bits from getting set between the IIR read and the IIR write, which would have otherwise prevented an MSI from ever getting generated again. However, this caused a problem for vblank as the IMR mask would keep the pipe event interrupt from getting reflected in IIR, even after the IMR mask was brought back down. Instead, just check the state of IIR after we ack the interrupts we're going to handle, and restart if we didn't get IIR all the way to zero. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-25drm/i915: Manage PIPESTAT to control vblank interrupts instead of IMR.Keith Packard
The pipestat fields affect reporting of all vblank-related interrupts, so we have to reset them during the irq_handler, and while enabling vblank interrupts. Otherwise, if a pipe status field had been set to non-zero before enabling reporting, we would never see an interrupt again. This patch adds i915_enable_pipestat and i915_disable_pipestat to abstract out the steps needed to change the reported interrupts. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-11drm/i915: Move legacy breadcrumb out of the reserved status page areaKeith Packard
Addresses in the hardware status page below index 0x20 are reserved for use by the hardware. The legacy breadcrumb was sitting at index 5. Move it to index 0x21, and make sure everyone uses the defined value instead of hard-coded constants. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-11-11i915: Remove racy delayed vblank swap ioctl.Eric Anholt
When userland detected that this ioctl was supported (by version number check), it used it in a racy way -- dispatch delayed swap, wait for vblank, continue rendering. As there was no mechanism for it to wait for the swap to finish, sometimes it would render before the swap and garbage would be displayed on the screen. By removing the ioctl and returning -EINVAL, userland returns to its previous, correct rendering path of waiting for a vblank then dispatching a swap. The only path that could have used this ioctl correctly was page flipping, which relied on only one client running and emitting wait-for-vblank-before-rendering in the command stream. That path also falls back correctly, at the performance cost of not being able to queue up rendering before the flip occurs. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-10-23drm/i915: use pipes, not planes to label vblank dataKeith Packard
vblank in the kernel is far simpler if it deals with pipes instead of planes, so we're changing both user and kernel side. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-23drm/i915: hold dev->struct_mutex and DRM lock during vblank ring operationsKeith Packard
To synchronize clip lists with the X server, the DRM lock must be held while looking at drawable clip lists. To synchronize with other ring access, the ring mutex must be held while inserting commands into the ring. Failure to do the first resulted in easy visual corruption when moving windows, and the second could have corrupted the ring with DRI2. Grabbing the DRM lock involves using the DRM tasklet mechanism, grabbing the ring mutex means potentially sleeping. Deal with both of these by always running the tasklet from a work handler. Also, protect from clip list changes since the vblank request was queued by making sure the window has at least one rectangle while looking inside, preventing oopses . Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-23i915: Enable IMR passthrough of vblank events before enabling it in pipestat.Eric Anholt
Otherwise, if we lost the race, the pipestat bit would be set without being reflected in IIR, and we would never clear the pipestat bit so the pipe event would never be generated again, and all vblank waits would time out. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-23drm: Remove two leaks of vblank reference count in error paths.Eric Anholt
If the failing paths were hit, the vblank IRQ would never get turned off again. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-23i915: Protect vblank IRQ reg access with spinlockKeith Packard
This uses the same spinlock as the user_irq code as it shares the same register, ensuring that interrupt registers are updated atomically. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18drm: Increment dev_priv->irq_received so i915_gem_interrupts count works.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18i915: Make use of sarea_priv conditional.Kristian Høgsberg
We fail ioctls that depend on the sarea_priv with EINVAL. Signed-off-by: Kristian Høgsberg <krh@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18i915: Use struct_mutex to protect ring in GEM mode.Eric Anholt
In the conversion for GEM, we had stopped using the hardware lock to protect ring usage, since it was all internal to the DRM now. However, some paths weren't converted to using struct_mutex to prevent multiple threads from concurrently working on the ring, in particular between the vblank swap handler and ioctls. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18drm: Add GEM ("graphics execution manager") to i915 driver.Eric Anholt
GEM allows the creation of persistent buffer objects accessible by the graphics device through new ioctls for managing execution of commands on the device. The userland API is almost entirely driver-specific to ensure that any driver building on this model can easily map the interface to individual driver requirements. GEM is used by the 2d driver for managing its internal state allocations and will be used for pixmap storage to reduce memory consumption and enable zero-copy GLX_EXT_texture_from_pixmap, and in the 3d driver is used to enable GL_EXT_framebuffer_object and GL_ARB_pixel_buffer_object. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18drm: Rework vblank-wait handling to allow interrupt reduction.Jesse Barnes
Previously, drivers supporting vblank interrupt waits would run the interrupt all the time, or all the time that any 3d client was running, preventing the CPU from sleeping for long when the system was otherwise idle. Now, interrupts are disabled any time that no client is waiting on a vblank event. The new method uses vblank counters on the chipsets when the interrupts are turned off, rather than counting interrupts, so that we can continue to present accurate vblank numbers. Co-author: Michel Dänzer <michel@tungstengraphics.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18Add Intel ACPI IGD OpRegion supportMatthew Garrett
This adds the support necessary for allowing ACPI backlight control to work on some newer Intel-based graphics systems. Tested on Thinkpad T61 and HP 2510p hardware. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-10-18i915: Add support for MSI and interrupt mitigation.Eric Anholt
Previous attempts at interrupt mitigation had been foiled by i915_wait_irq's failure to update the sarea seqno value when the status page indicated that the seqno had already been passed. MSI support has been seen to cut CPU costs by up to 40% in some workloads by avoiding other expensive interrupt handlers for frequent graphics interrupts. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18i915: Use more consistent names for regs, and store them in a separate file.Jesse Barnes
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-07-14drm: reorganise drm tree to be more future proof.Dave Airlie
With the coming of kernel based modesetting and the memory manager stuff, the everything in one directory approach was getting very ugly and starting to be unmanageable. This restructures the drm along the lines of other kernel components. It creates a drivers/gpu/drm directory and moves the hw drivers into subdirectores. It moves the includes into an include/drm, and sets up the unifdef for the userspace headers we should be exporting. Signed-off-by: Dave Airlie <airlied@redhat.com>