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2012-04-16iommu/tegra-gart: fix spin_unlock in map failure pathLucas Stach
This must have been messed up while merging, the intention was clearly to unlock there. Change-Id: Icf525a51d4899dc718710ec56a4d3fd2150501cd Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/96139 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2012-04-16iommu/tegra: smmu: Print device name correctlyHiroshi DOYU
Print an attached device name correctly. Change-Id: I8352bd81916936aa2276a51c0161f0c2be709760 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/96138 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2012-03-18iommu: tegra/gart: use correct gart_deviceVandana Salve
Pass the correct gart device pointer. Change-Id: Ia54c3df7ce013855bf8843161f5ee0816482bda6 Reviewed-on: http://git-master/r/90064 Reviewed-by: Vandana Salve <vsalve@nvidia.com> Tested-by: Vandana Salve <vsalve@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-02-09iommu: tegra/gart: Fix with mainline IOMMU API changeHiroshi DOYU
The mainline IOMMU API v3.3-rc1 has been changed so that bytes are used in mapping size instead of page order and page-by-page iteration is taken care of by iommu core. The rest are mostly for maintainability: $ git co iommu/next drivers/iommu/tegra-gart.c Change-Id: Id88ae8d23d11f4e003d11ec1e4223a72215ad142 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/78138 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2012-02-03iommu: tegra/smmu: Fix with mainline IOMMU API changeHiroshi DOYU
The mainline IOMMU API v3.3-rc1 has been changed so that bytes are used in mapping size instead of page order and page-by-page iteration is taken care of by iommu core. The rest are mostly for maintainability: $ git co iommu/next drivers/iommu/tegra-smmu.c Change-Id: Ib4fdee4a637b3065a1eab6c56923b05f46b3b582 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/78137 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-01Merge remote-tracking branch 'origin/dev/k3.3-rc1-iommu' into ↵Rohan Somvanshi
android-tegra-nv-3.1 Change-Id: I9001bb291779f107bbcb593d48f9f0f734074d0e
2012-01-30iommu/tegra: gart: Disabled as default in KconfigHiroshi DOYU
CONFIG_TEGRA_IOMMU_GART has to be selected explicitly because there's 2 IOMMU framewrok existing in Tegra, CONFIG_TEGRA_IOVMM_{GART,SMMU} and CONFIG_TEGRA_IOMMU_{GART,SMMU}. Change-Id: I6f1a0ad8e321c5ad5378baa6bc4a9bcecad9d4d2 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/77513 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-23ARM: IOMMU: Tegra20: Add iommu_ops for GART driverHiroshi DOYU
Tegra 20 IOMMU H/W, GART (Graphics Address Relocation Table). This patch implements struct iommu_ops for GART for the upper IOMMU API. This H/W module supports only single virtual address space(domain), and manages a single level 1-to-1 mapping H/W translation page table. Change-Id: I2f550bf0e14d9f994abdde79b835ddfe815faa5a Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/75945 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-01-23iommu/amd: Set IOTLB invalidation timeoutJoerg Roedel
To protect the command buffer from hanging when a device does not respond to an IOTLB invalidation, set a timeout of 1s for outstanding IOTLB invalidations. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Init stats for iommu=ptJoerg Roedel
The IOMMUv2 driver added a few statistic counter which are interesting in the iommu=pt mode too. So initialize the statistic counter for that mode too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Remove unnecessary cache flushes in amd_iommu_resumeJoerg Roedel
The caches are already flushed in enable_iommus(), so this flush is not necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu: Export intel_iommu_enabled to signal when iommu is in useEugeni Dodonov
In i915 driver, we do not enable either rc6 or semaphores on SNB when dmar is enabled. The new 'intel_iommu_enabled' variable signals when the iommu code is in operation. Cc: Ted Phelps <phelps@gnusto.com> Cc: Peter <pab1612@gmail.com> Cc: Lukas Hejtmanek <xhejtman@fi.muni.cz> Cc: Andrew Lutomirski <luto@mit.edu> CC: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-23iommu: Initialize domain->handler in iommu_domain_alloc()KyongHo Cho
Since it is not guaranteed that an iommu driver initializes in its domain_init() function, it must be initialized with NULL to prevent calling a function in an arbitrary location when iommu fault occurred. Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add invalidate-context call-backJoerg Roedel
This call-back is invoked when the task that is bound to a pasid is about to exit. The driver can use it to shutdown all context related to that context in a safe way. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add amd_iommu_device_info() functionJoerg Roedel
This function can be used to find out which features necessary for IOMMUv2 usage are available on a given device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Adapt IOMMU driver to PCI register name changesJoerg Roedel
The symbolic register names for PCI and PASID changed in PCI code. This patch adapts the AMD IOMMU driver to these changes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add invalid_ppr callbackJoerg Roedel
This callback can be used to change the PRI response code sent to a device when a PPR fault fails. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement notifiers for IOMMUv2Joerg Roedel
Since pages are not pinned anymore we need notifications when the VMM changes the page-tables. Use mmu_notifiers for that. Also use the task_exit notifier from the profiling subsystem to shutdown all contexts related to this task. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement IO page-fault handlerJoerg Roedel
Register the notifier for PPR faults and handle them as necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add routines to bind/unbind a pasidJoerg Roedel
This patch adds routines to bind a specific process address-space to a given PASID. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement device aquisition code for IOMMUv2Joerg Roedel
This patch adds the amd_iommu_init_device() and amd_iommu_free_device() functions which make a device and the IOMMU ready for IOMMUv2 usage. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add driver stub for AMD IOMMUv2 supportJoerg Roedel
Add a Kconfig option for the optional driver. Since it is optional it can be compiled as a module and will only be loaded when required by another driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add stat counter for IOMMUv2 eventsJoerg Roedel
Add some interesting statistic counters for events when IOMMUv2 is active. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add device errata handlingJoerg Roedel
Add infrastructure for errata-handling and handle two known erratas in the IOMMUv2 code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add function to get IOMMUv2 domain for pdevJoerg Roedel
The AMD IOMMUv2 driver needs to get the IOMMUv2 domain associated with a particular device. This patch adds a function to get this information. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement function to send PPR completionsJoerg Roedel
To send completions for PPR requests this patch adds a function which can be used by the IOMMUv2 driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement functions to manage GCR3 tableJoerg Roedel
This patch adds functions necessary to set and clear the GCR3 values associated with a particular PASID in an IOMMUv2 domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement IOMMUv2 TLB flushing routinesJoerg Roedel
The functions added with this patch allow to manage the IOMMU and the device TLBs for all devices in an IOMMUv2 domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add support for IOMMUv2 domain modeJoerg Roedel
This patch adds support for protection domains that implement two-level paging for devices. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add amd_iommu_domain_direct_map functionJoerg Roedel
This function can be used to switch a domain into paging-mode 0. In this mode all devices can access physical system memory directly without any remapping. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Conflicts: drivers/iommu/amd_iommu.c Change-Id: Iea5e664f34bb8fe8e2bb87bdc1cb44ca170a876f
2012-01-23iommu/amd: Implement notifier for PPR faultsJoerg Roedel
Add a notifer at which a module can attach to get informed about incoming PPR faults. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Put IOMMUv2 capable devices in pt_domainJoerg Roedel
If the device starts to use IOMMUv2 features the dma handles need to stay valid. The only sane way to do this is to use a identity mapping for the device and not translate it by the iommu. This is implemented with this patch. Since this lifts the device-isolation there is also a new kernel parameter which allows to disable that feature. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Add iommuv2 flag to struct amd_iommuJoerg Roedel
In mixed IOMMU setups this flag inidicates whether an IOMMU supports the v2 features or not. This patch also adds a global flag together with a function to query that flag from other code. The flag shows if at least one IOMMUv2 is in the system. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Enable GT mode when supported by IOMMUJoerg Roedel
This feature needs to be enabled before IOMMUv2 DTEs can be set up. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Setup PPR log when supported by IOMMUJoerg Roedel
Allocate and enable a log buffer for peripheral page faults when the IOMMU supports this feature. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Get the maximum number of PASIDs supportedJoerg Roedel
Read the number of PASIDs supported by each IOMMU in the system and take the smallest number as the maximum value supported by the IOMMU driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Convert dev_table_entry to u64Joerg Roedel
Convert the contents of 'struct dev_table_entry' to u64 to allow updating the DTE wit 64bit writes as required by the spec. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/omap: be verbose when omap_iommu_iova_to_phys failsOhad Ben-Cohen
An omap_iommu_iova_to_phys failure usually means that iova wasn't mapped. When that happens, it's helpful to know the value of iova, so add it to the error message. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23intr_remapping: Fix section mismatch in ir_dev_scope_init()Sergey Senozhatsky
Fix: Section mismatch in reference from the function ir_dev_scope_init() to the function .init.text:dmar_dev_scope_init() The function ir_dev_scope_init() references the function __init dmar_dev_scope_init(). Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Youquan Song <youquan.song@intel.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Link: http://lkml.kernel.org/r/20111026161507.GB10103@swordfish Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-23intel-iommu: Fix section mismatch in dmar_parse_rmrr_atsr_dev()Sergey Senozhatsky
dmar_parse_rmrr_atsr_dev() calls rmrr_parse_dev() and atsr_parse_dev() which are both marked as __init. Section mismatch in reference from the function dmar_parse_rmrr_atsr_dev() to the function .init.text:dmar_parse_dev_scope() The function dmar_parse_rmrr_atsr_dev() references the function __init dmar_parse_dev_scope(). Section mismatch in reference from the function dmar_parse_rmrr_atsr_dev() to the function .init.text:dmar_parse_dev_scope() The function dmar_parse_rmrr_atsr_dev() references the function __init dmar_parse_dev_scope(). Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: iommu@lists.linux-foundation.org Cc: Joerg Roedel <joerg.roedel@amd.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Link: http://lkml.kernel.org/r/20111026154539.GA10103@swordfish Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-23iommu/omap: eliminate the public omap_find_iommu_device() methodOhad Ben-Cohen
Eliminate the public omap_find_iommu_device() method, and don't expect clients to provide the omap_iommu handle anymore. Instead, OMAP's iommu driver now utilizes dev_archdata's private iommu extension to be able to access the required iommu information. This way OMAP IOMMU users are now able to use the generic IOMMU API without having to call any omap-specific binding method. Update omap3isp appropriately. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Conflicts: drivers/media/video/omap3isp/ispccdc.c Change-Id: Ia9b3421662fab7bb4bee298693ed6da716599ee5
2012-01-23iommu: Add option to group multi-function devicesAlex Williamson
The option iommu=group_mf indicates the that the iommu driver should expose all functions of a multi-function PCI device as the same iommu_device_group. This is useful for disallowing individual functions being exposed as independent devices to userspace as there are often hidden dependencies. Virtual functions are not affected by this option. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: Implement iommu_device_groupAlex Williamson
Just use the amd_iommu_alias_table directly. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Conflicts: drivers/iommu/amd_iommu.c Change-Id: I3aaeb78a1359e1ad8f4a37ba07fb1d404daa8d83
2012-01-23iommu/intel: Implement iommu_device_groupAlex Williamson
We generally have BDF granularity for devices, so we just need to make sure devices aren't hidden behind PCIe-to-PCI bridges. We can then make up a group number that's simply the concatenated seg|bus|dev|fn so we don't have to track them (not that users should depend on that). Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Conflicts: drivers/iommu/intel-iommu.c Change-Id: Ifc8108a42383f317c2db42003eb96713a98a6899
2012-01-23iommu: Add iommu_device_group callback and iommu_group sysfs entryAlex Williamson
An IOMMU group is a set of devices for which the IOMMU cannot distinguish transactions. For PCI devices, a group often occurs when a PCI bridge is involved. Transactions from any device behind the bridge appear to be sourced from the bridge itself. We leave it to the IOMMU driver to define the grouping restraints for their platform. Using this new interface, the group for a device can be retrieved using the iommu_device_group() callback. Users will compare the value returned against the value returned for other devices to determine whether they are part of the same group. Devices with no group are not translated by the IOMMU. There should be no expectations about the group numbers as they may be arbitrarily assigned by the IOMMU driver and may not be persistent across boots. We also provide a sysfs interface to the group numbers here so that userspace can understand IOMMU dependencies between devices for managing safe, userspace drivers. [Some code changes by Joerg Roedel <joerg.roedel@amd.com>] Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Conflicts: include/linux/iommu.h Change-Id: I524607da569e42730bdc706759c49c4e0783555c
2012-01-23iommu/core: remove the temporary pgsize settingsOhad Ben-Cohen
Now that all IOMMU drivers are exporting their supported pgsizes, we can remove the default pgsize settings in register_iommu(). Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/intel: announce supported page sizesOhad Ben-Cohen
Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Note: Intel IOMMU hardware doesn't support arbitrary page sizes, but the driver does (it splits arbitrary-sized mappings into the pages supported by the hardware). To make everything simpler for now, though, this patch effectively tells the IOMMU core to keep giving this driver the same memory regions it did before, so nothing is changed as far as it's concerned. At this point, the page sizes announced remain static within the IOMMU core. To correctly utilize the pgsize-splitting of the IOMMU core by this driver, it seems that some core changes should still be done, because Intel's IOMMU page size capabilities seem to have the potential to be different between different DMA remapping devices. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/amd: announce supported page sizesOhad Ben-Cohen
Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/msm: announce supported page sizesOhad Ben-Cohen
Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes. This way the IOMMU core can split any arbitrary-sized physically contiguous regions (that it needs to map) as needed. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Acked-by: David Brown <davidb@codeaurora.org> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-23iommu/omap: announce supported page sizesOhad Ben-Cohen
Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes. This way the IOMMU core can split any arbitrary-sized physically contiguous regions (that it needs to map) as needed. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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