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path: root/drivers/mfd/max77663-core.c
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2012-05-07mfd: max77663: Add gpio irq masking in irq_sync_unlockJinyoung Park
Add gpio irq masking in irq_sync_unlock. Change-Id: I008caf58ae82d9ed888f4720f54675e9106f027d Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/98664 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07mfd: max77663: Unmask EN0 rising interruptJinyoung Park
Unmasked EN0 rising interrupt to generate fast PMU_INT by EN0(POWER_KEY). Bug 930883 Change-Id: I9a3d8c4f564e83deea86fbd3d05f14933a0b0f65 Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/98665 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-13mfd: max77663: Handle case for PWR_OFF and SFT_RST setting simultaneouslyJinyoung Park
MAX77663 PMU doesn't allow PWR_OFF and SFT_RST setting in ONOFF_CFG1 at the same time. So if it try to set PWR_OFF and SFT_RST to ONOFF_CFG1 simultaneously, handle only SFT_RST and ignore PWR_OFF. Bug 949650 Change-Id: I90c602e22c813b05fcd9047153cea3ed2cbd596f Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/87981 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Tested-by: Johnny Qiu <joqiu@nvidia.com>
2012-03-01Revert "mfd: max77663: add support for status LED control through PMU GPIO"Johnny Qiu
This reverts commit 11c94f0d529a089f8cc37311258fd518be576383. Stat LED control through PMU GPIO should be implemented in another way. No need to touch PMU driver. Change-Id: Iecde818425640616df0a92339e1c0e8b323800bd Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/86828 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-02-17mfd: max77663: add support for status LED control through PMU GPIOJohnny Qiu
Bug 920845 Bug 931371 Change-Id: I7c03c7f2f16aee1be636c2f8fd8ad18cf7539eae Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Signed-off-by: Hao Tang <htang@nvidia.com> Reviewed-on: http://git-master/r/83724 Reviewed-by: Kerwin Wan <kerwinw@nvidia.com> Reviewed-by: Simone Willett <swillett@nvidia.com>
2012-02-15mfd: max77663: Natively register pm_power_offDan Willemsen
Instead of forcing the board files to register this themselves, just add a bool to the platform data to let the board files opt into this. Change-Id: Id3342142e5e7b49d2e16a83889d0b6a1cace1d95 Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83595 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-13mfd: max77663: Add option for RTC I2C slave addressJohnny Qiu
MAX77663 used on Kai has different I2C slave address from the one used on PM298. We should add option in platform data to specifiy the address. Change-Id: Iaec0a09bbd2b7a37741d8a867be203165d098a15 Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/83297 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-01-19mfd: max77663: Support Low-Power Mode during sleep modeJin Park
Put the power rails into Low-Power Mode during sleep mode, if SLP_LPM is enabled and the power rail's power mode is GLPM. Bug 924686 Change-Id: I460f8bfa6be73a440a4924160d8e271695fc4973 Reviewed-on: http://git-master/r/75626 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/75890 Reviewed-by: Automatic_Commit_Validation_User
2011-12-08mfd: max77663: Add sleep_enable into suspend operationJin Park
To making robust sleep and wakeup, added sleep_enable into suspend operation. Bug 849360 Bug 903301 Reviewed-on: http://git-master/r/66322 (cherry picked from commit ea059cd32c67c72b57000cc5a969741dbf37770d) Change-Id: I0bafbb3e4d589c0db0842a87132e0cf70e722af3 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/67381 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-11-30mfd: max77663: Fix irq flags for ARM GICJin Park
The Tegra IRQ driver was modified to use ARM GIC driver on kernel-2.6.39. After that, it has to pass correcting irq flags for ARM GIC when irq request. Bug 892696 Change-Id: I92e3c24309c2528db4adfd69041f601d627a856d Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/65695 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R38a176520f7216c5637ecc0c8dee3f24f648ac9e
2011-11-30mfd: max77663: Move sleep enable setting from suspend to resumeJin Park
Moving sleep enable setting from suspend to resume. And add sleep enable setting into probe. Bug 849360 Reviewed-on: http://git-master/r/60656 (cherry picked from commit 9ba5f1f22d73fe62d0f509fd6cad26f34e25a017) Signed-off-by: Jin Park <jinyoungp@nvidia.com> Change-Id: I7275a5f8d8e0f8d75826854c91946e82d52c8278 Reviewed-on: http://git-master/r/65694 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re4a4c87dd95180c17680c258b37490bdb3179634
2011-11-30mfd: max77663: Set sleep enable bit before enter into suspendMin-wuk Lee
The sleep enable is required that AP can be placed MAX77663 into sleep mode by pulling EN1 input low. Bug 849360 Original Author : Jinyoung Park Reviewed-on: http://git-master/r/59477 (cherry picked from commit 469106a1f8cf8d080f06ae0d2e8d0b2aa4bf3e4b) Reviewed-on: http://git-master/r/62378 (cherry picked from commit 42c8b2466ead1a9382b87d9753afad7d3d7b9b72) Change-Id: Id205c691bf629c080a533e5d38ef2f3823d35703 Reviewed-on: http://git-master/r/63758 Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rbab33031a6556f229a0bf6aef57f906a95152340
2011-11-30mfd: max77663: Add GPIO attributes into platform dataJin Park
For board specific configuration, adding GPIO attributes such as push-pull, pull-up, pull-down, direction, output level and alternate into platform data. Bug 849360 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/54429 (cherry picked from commit 3c5148a04fbc50c3200efe8793b8850ca07e05c2) Reviewed-on: http://git-master/r/55149 (cherry picked from commit c2b439c884808c8452fc32930b6bb5dd66c9c5b4) Change-Id: I52f360e045358e01740cada440438864a8fc5fe4 Reviewed-on: http://git-master/r/56356 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R605eab7d8d562497cca811bb5931e695cb951542
2011-11-30mfd: max77663: Add power off functionJin Park
Bug 849360 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/54428 (cherry picked from commit 6c06d12f10bc221cde89f5a1738b9f003796dd45) Reviewed-on: http://git-master/r/55148 (cherry picked from commit 45466efa9c551cd2e5ee05d217a30a1c4342a7cd) Change-Id: Iad256cf4d6e21e963987df04bd30a1f563ae1d12 Reviewed-on: http://git-master/r/56355 Tested-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R2b513f87f2e21240821a0a2d05e9e1a861fcc7fb
2011-11-30mfd: max77663: Fixed that updating wrong value into cache valueJin Park
Fixed that updating wrong value into cache value after i2c write in the max77663_cache_write function. Bug 849360 Change-Id: I62ba38bc2a10f0240cbbefeb71ab5337308d79df Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/51517 (cherry picked from commit da82c830774b6d63f148d4fc9c23922d1c86a0a3) Reviewed-on: http://git-master/r/54693 (cherry picked from commit a9f47c7de19faf4480c93f1874399345738276f4) Reviewed-on: http://git-master/r/55470 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R93fec5fedf29fc6b52a3f79b4688c28916582934
2011-11-30mfd: max77663: Update the driver to the new irq APIsJin Park
The irq core is updated to pass struct irq_data to irq operations. Updating the MAX77663 driver to new irq APIs. Change-Id: Id845c1de9d4a98a60993201b9b7740a0633f54fe Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/54674 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Radd1bec604f982a2342842e9681087dd7bf06259
2011-11-30mfd: max77663: Set irq as wake interruptJin Park
The irq need to set as wake interrupt to wake from sleep when interrupt receiving from MAX77663 PMU. Bug 868996 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/50694 (cherry picked from commit 4bbdf8764bbc262215ab33996e3a91473e7a7e68) Change-Id: I1489e9a4ea501ac668e040a73ad20fa1fd6544fb Reviewed-on: http://git-master/r/54634 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rba7e15fbb7f58e304aee22d7d39fdbea8e552095
2011-11-30rtc: max77663: Add MAX77663 RTC driverJin Park
Add RTC driver for Maxim PMU MAX77663. Bug 849360 Original-Change-Id: Ia7c910a852527f6a7bf5d2622cb1f76fd72222cd Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/49584 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R716e08b9f98c3be480877009bef0db99ccf8043e
2011-11-30mfd: max77663: Fixed invalid top level interrupt mask register.Jin Park
Fixed invalid top level interrupt mask register. And unmasked global interrupt mask bit to receive interrupt signal from max77663. Bug 849360 Bug 867797 Original-Change-Id: I7e72b33e3974cf5c7ecc8dd7ad31da19894e59dc Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/48937 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rb9113c9fb005d7fb53f76fba82885df87ad8ec85
2011-11-30mfd: Add MAX77663 mfd driverJin Park
Add mfd core driver for Maxim PMU MAX77663. Bug 849360 Bug 854414 Original-Change-Id: I6699540fd7d0f7b428a1be64cf06f7cd65b5b32e Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/41503 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rc0f0a67db8b7d554bada7dd6b3e103ab30b374d4
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