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cherry-pick ea693bf7f87603b072f4ceea6684221fa0b8e863 from
https://android.googlesource.com/kernel/common.git
Change-Id: I9575b542af664973a03ad35d7bc48da130ce5a89
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/75463
Reviewed-by: Automatic_Commit_Validation_User
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If PADPIPE_CLKEN_OVERRIDE is not set, CMD end bit
errors are observed due to timing issues on some
micro SD UHS cards.
Bug 921412
Bug 914182
Bug 905519
Change-Id: Ie926843010e3082bf3469913c1f2ced0bfb008d2
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/74315
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/75150
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Table 6-2: CCCR bit Definitions, address 00h. Part E1 SDIO Simplified
Specification Version 3.00, Feb. 25, 2011.
This patch has been tested with Marvell WLAN device SD8797.
Reviewed-on: http://git-master/r/72877
Change-Id: I1ea3b63bde2bbe8532459205f61feffae3e30f0a
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/74581
Reviewed-by: Automatic_Commit_Validation_User
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This patch adds support for sdio UHS cards per the version 3.0
spec.
UHS mode is only enabled for version 3.0 cards when both the
host and the controller support UHS modes.
1.8v signaling support is removed if both the card and the
host do not support UHS. This is done to maintain
compatibility and some system/card combinations break when
1.8v signaling is enabled when the host does not support UHS.
Reviewed-on: http://git-master/r/72876
Change-Id: I8d7dbaf1d1cbff8e9f13526d39e69b2a00eca2fa
Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Aaron Lu <Aaron.lu@amd.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Tested-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/74580
Reviewed-by: Automatic_Commit_Validation_User
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commit 3b6e3c73851a9a4b0e6ed9d378206341dd65e8a5 upstream.
When getting a cmd irq during an ongoing data transfer
with dma, the dma job were never terminated. This is now
corrected.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Per Forlin <per.forlin@stericsson.com>
Signed-off-by: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Change-Id: Id2b0cc97b7da31bb0e2bad0653bc387dbe760134
Reviewed-on: http://git-master/r/74196
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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commit b63038d6f4ca5d1849ce01d9fc5bb9cb426dec73 upstream.
The interrupt was previously enabled and then correctly cleared.
Now we also handle it correctly.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Change-Id: I62f75a5704eb27b1e67d28235f6aa6a8d3798662
Reviewed-on: http://git-master/r/74195
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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commit 61074287c2965edf0fc75b54ae8f4ce99f182669 upstream.
You didn't mean this to be a bool.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Tony Olech <tony.olech@elandigitalsystems.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Change-Id: Ie1bf69d93f497cb12740c85f9271e154d34bbb89
Reviewed-on: http://git-master/r/74184
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Host controllers expose their capabilties for MMC.
But the mmc core code used to set MMC_CAP_ERASE
and MMC_CAP_CMD23 by default for all hosts. Ideally,
these capabilities should only be exposed by the hosts
and the core code should not set them by default.
Bug 914934
Change-Id: I82610bd48cdfc4926487ad436855bc84876c7283
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I99507d7cfdcee064f808856dc2ce99d806fd864f
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Kernel 3.1 has more than 32 quirks
changing quirks type to u64
Bug 921653
Change-Id: Id6607347e6e48cfa1534f1260e277f6e2f7a42ee
Signed-off-by: naveenk <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/73167
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Enabled io dpd when clock is disabled for each SD instance.
Clock enable for the SD instance causes io dpd to be disabled.
bug 919993
Change-Id: I7d58517a7c51ce969a167abf7bb90ea89731d999
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/72027
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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After switching the voltage and enabling the
clock, wait for 1 msec for the clock to become
stable.
Bug 918563
Change-Id: I3cda964280daf739e8898dffb6ba3ed22ff54b14
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/72231
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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When commands timeout, previously we had code to
retry the same command 3 times. But under some
situations 3 retries do not suffice. Increasing
the retries to 10 does the trick. Also if the card
does not respond after 10 retries then the card is
dead for sure. But if the same card responds in
between 3 to 10 retries then it is always beneficial
to have retries as 10.
Bug 914934
Change-Id: I6b1e95c10ca5a62dde84ce8cacbe53ad2197ab33
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/72092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
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Enable SDHCI_QUIRK_NON_STD_VOLTAGE_SWITCHING.
Implement switch_signal_voltage callback for tegra
sdmmc controller to switch the voltage using regulator
calls.
Bug 906650
Reviewed-on: http://git-master/r/67138
Change-Id: I3237fde03fff1bd112db4f12ad66c5d68ffada09
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/69700
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Set the tap delay value passed through the
platform data.
Bug 911075
Change-Id: I8f71b65fb6d3683a57054c52c94e3e8ae95f4da3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/70333
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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commit e58f516ff4730c4047c3f104b061f7a03e9a263c upstream.
When we can't configure the dma channel we want to fall
back to PIO. We do this by setting host->do_dma to zero.
This does not work as do_dma is used to see whether dma
can be used for the current transfer. Instead, we have
to set host->dma to NULL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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If the data commands fail due to some error, retry the transfer.
Add 3 retries for data commands.
for bug 914934
Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/71181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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some sd 2.0 cards have sda_spec3 bit set due to which
hs_max_dtr is not set and the card operates at lower
frequency.
fixed this by setting hs_max_dtr without sda_spec3
dependency.
Bug 914869
Signed-off-by: naveenk <naveenk@nvidia.com>
Change-Id: I1624c0864f4f07cee5ea044f43e39c4336723e83
Reviewed-on: http://git-master/r/70009
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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for bug 914934
Change-Id: I34892961074d5c23efb19a7e53688f227e0bf03d
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/70557
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Some platforms cannot support higher clocks and result
in CRC errors during read/write transactions. Do not
exceed platform specific clk limits to prevent this.
Bug 908560
Change-Id: I8bff6c6b66ee1018325f90cd7bf3061bd1bc5fdb
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/67483
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Adding quirk SDHCI_QUIRK_NON_STD_VOLTAGE_SWITCHING and
callback switch_signal_voltage in sdhci_ops to support
non standard signal voltage switching.
Bug 906650
Change-Id: If5538fb3177770ccb103305a7b3f0f7a6a8b92e6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/67137
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Rebase-Id: Rbc628711479b187a90437bea94776066c7a58b54
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Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Rebase-Id: Rc29be578dd6cd3b02ecf72a05fcd6552fbe31fb9
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Source files should not be with executable permission.
Original-Change-Id: I70b6be4cf88fea4be9b092ca2f5dd08e40ee7cbd
Reviewed-on: http://git-master/r/12081
Reviewed-by: Chao Jiang <chaoj@nvidia.com>
Tested-by: Chao Jiang <chaoj@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R735406da6ad586ca43d65d1c1abc3844761f0378
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Conflicts:
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/board-ventana.c
drivers/misc/Kconfig
drivers/video/tegra/dc/hdmi.c
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
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Setting the appropriate clk rates for sdmmc controllers. The min clk
rate is 50MHz. For freq between 50MHz and 104MHz, 104MHz clk rate is
set. If freq higher than 104MHz is requested, then the corresponding
clk rate is set.
Bug 906190
Bug 896706
Change-Id: Ie81c5b027e187503d420bbd571879a98c754d252
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/64836
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R3b9447946327071bba295453c391174953f02b1a
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Enabling wake up event for sd card insertion/deletion
to handle insertion/removal events during suspend
Bug 895672
Change-Id: If9c59889d22b19b99584a8f01cb7bf7316c3b8b5
Signed-off-by: naveenk <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/65971
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R29c4dd500afac98150f7347f5f87d77efe45b676
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Tegra SD controller requires clk divisor to be set to 1 for
DDR50 mode.
Bug 899940
Change-Id: Ibc15e5f61b11e2e87b78eade8d004ff2c56b3b74
Reviewed-on: http://git-master/r/64510
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf958d23dedd38a3d84efaf555d5ec0a31678da37
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Setting the voltage based on the supported ocr mask
in the platform data. Some SDIO/MMC devices operate in
low voltage(1.8V).
Bug 904614
Change-Id: I3d0a9ed4e9310a672f532a896d85a3aa3b830658
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/66103
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Rebase-Id: R288360441bbeaee7c8c5dea6f85415339aed60be
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Enable SDIO card interrupt in resume only if it is
set before suspend.
Bug 902633
Change-Id: I2ade8c204ddfa97e41d5c0e5bec67d07e68f81ad
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/66099
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Rebase-Id: Rb2ba0ae696df9104840566a794780730d6da845f
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Adding tegra sdhost controller initialization settings
and enabling capabilities after reset.
Changed the voltage range of SD cards to 2.7V - 3.6V to
support the entire valid voltage range rather than only
3.3V.
Bug 901938
Change-Id: Ic8dddc62ce6dfab931afbd3e68a2658dc2ec279e
Reviewed-on: http://git-master/r/64105
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Rc03308b4e2b09349e15d3855baa1c32a0f248a5b
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After setting uhs mode and preset values, enabling
only the card clock is sufficient. The host clock
and internal clocks need not be set again.
Bug 899940
Change-Id: Ie7627333e4155b695e58887f20524a13197e08e9
Reviewed-on: http://git-master/r/64485
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R8790df5e2f6d62726193c63b13cfeb8d20a564da
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Adding support for runtime host controller
clk enable/disable.
Bug 887981
Change-Id: Ib0a49048040af939458dd44c54ce57adda562fe3
Reviewed-on: http://git-master/r/63283
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R9946d64519b2ce9a3b588cbcecb59f5a556ddd69
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These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
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Remove sdmmc clock overrides. SDMMC clocks
are properly configured without the clock
overrides.
Bug 887981
Change-Id: I1c07568e58e484c4a3a91240f0d1ed4b8a2c6fdd
Reviewed-on: http://git-master/r/63238
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R0555f77217ef555507110b7626ce225be6bf5e35
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Do not use WARN_ON when regulators are not found
as it would print the stack dump while booting. Use
dev_err to print the error message.
Change-Id: Ibe22cfe8d24719c2352084d7043f47d5203b84d0
Reviewed-on: http://git-master/r/61862
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R5f7ab8071b742843d960ce8b315e8095374af1b5
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Implement functions needed in struct mmc_host_ops to support
enable/disable SDCLK dynamically.
BUG 886285
Change-Id: Ic48ac63af495cea30ce926c39ec2e0a9f2d26244
Reviewed-on: http://git-master/r/57856
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rfae7d6001a827395824716fb858ef18d0d2c4d68
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When MMC_PM_KEEP_POWER and MMC_CAP_SDIO_IRQ are
set, enable sdio irq in sdhci_resume_host as it
is overwritten in sdhci_init.
Bug 883715
Change-Id: Icbd433748f03383b8ea780ad953a092f984f03a0
Reviewed-on: http://git-master/r/57872
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R51bbf535ab8e66f5570c4c23274ed3365368bd35
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Set MMC_CAP_SDIO_IRQ to use interrupts rather than
polling for SDIO function handling.
Set MMC_PM_KEEP_POWER for embedded SDIO devices.
Add controller reset and power on for devices with
MMC_PM_KEEP_POWER flag set.
Bug 883715
Change-Id: I35c98ba879b564752662f60365ee8a5e72d3a587
Reviewed-on: http://git-master/r/57869
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rc95d4035ea4569cf1742d5785efff7df7ffa2ade
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Disable host clk after all io operations are done.
Bug 871369
Change-Id: I99d7f3a71920c2e6238ae8a3d192fd4f68148373
Reviewed-on: http://git-master/r/53417
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R74b661881a06a407ef87327d4787f27e45f4ac39
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Switching OFF the sd power rails in suspend and switching
them ON in resume.
Change-Id: I5145e211111b8144f14ee0338388eeacb34bb003
Reviewed-on: http://git-master/r/57877
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R527ae8de0561bfedd3afb2fce62ad4d2876575bc
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Tegra3 sdmmc controllers need to follow a non-standard
clock configuration sequence for the internal clock to
stabilize.
Enable SDHCI_CONFIG_NONSTANDARD_CLOCK.
Implemented chip specific HW ops.
Bug 871369
Change-Id: I954f93ce579c9e8b4889b27f51fa5d54a0a8e434
Reviewed-on: http://git-master/r/53416
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R4b68a67d19a299608da6969f4d403c958f55b3b4
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Enable the vdd_io and vdd_slot power rails for
removable devices.
Bug 873188
Change-Id: Ib759e381cbca226069d1a9941a20b4bfcdb2ae3f
Reviewed-on: http://git-master/r/52588
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: Ra8732bb0b01fd8415b75ca7965e8a8451f278001
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If the device is built in, set MMC_CAP_NONREMOVABLE
and set MMC_PM_IGNORE_PM_NOTIFY in pm_flags.
Bug 871369
Change-Id: Ia74b8bd8d605a77c939a770fe3e32e0980cdd230
Reviewed-on: http://git-master/r/52064
Reviewed-by: Jin Qian <jqian@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R59215043075bcdf7f6bbb1aeb72a2cd8e7cdc883
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Do not enable/disable host clock in atomic context.
Setting min host clock when trying to access the
registers without any clock.
Bug 873188
Change-Id: I7a04fe024621a46e15e1d50a38018ee61dd6c0c0
Reviewed-on: http://git-master/r/51971
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R01f709b3ca488e3bea1f70651e8c5d4370e6c16c
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Rebase-Id: Ra95b7ededf8b46c0646b20736153622de66aabef
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Bug 764354
Original-Change-Id: I807433ff825bed1fe91ce0cf50a2b3691c64ef0a
Reviewed-on: http://git-master/r/12227
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I3da91a438f98f2f51618446ce024f3fefd726a19
Rebase-Id: Ra957219cc3185ce6753d8957e437c24624f063b1
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This reverts commit 09e0e4fb75de1a008f00025a186d756435f9f034.
Rebase-Id: R7f871bc41beda798acea8b9c7c32d50531ad88e0
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Conflicts:
arch/arm/mm/cache-l2x0.c
drivers/misc/Kconfig
drivers/misc/Makefile
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
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Add some logging to make it clear just how the emmc timeout
was handled.
Change-Id: Id33fd28d8b9778dc4e85db829e2637a328eddab4
Signed-off-by: Ken Sumrall <ksumrall@android.com>
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