Age | Commit message (Collapse) | Author |
|
Adding the regulator driver specific information and passing
this information through regulator driver data. This struture
is containing delay operation which is require to voltage to
be settle down after enabling rail.
Bug 939242
Change-Id: I7da6ec487fe5f04857d3fd5f06a383b4a8fbcc7b
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/94500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The gpio_switch regulator is NV driver developed during
tegra3 bringup time. The driver functionality is upstreamed
to mainline into fixed regulator and it is accepted by community.
The required functionality is also downstream and required client
driver is moved to use the fixed regulator. Hence this driver
is just duplicating functionality with fixed regulator and hence
removing this.
Change-Id: I893328497644612a2267f2c24298ff2f668e75d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94198
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Adding flag on fixed regulator board configuration structure
to specify whether gpio is open drain type or not.
Passing this information to gpio library when requesting
gpio so that gpio driver can set the pin state accordingly,
for open drain type:
- Pin can be set HIGH as setting as input, PULL UP on
pin make this as HIGH.
- Pin can be set LOW as setting it as output and drive to LOW.
The non-open drain pin can be set HIGH/LOW by setting it to
output and driving it to HIGH/LOW.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
a4d9f179cc788b7f4b735d32c2e4a3b2562e8240
Change-Id: I2ee7789db67fdeea77c0d6ac2b44876af36c803e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94150
Reviewed-by: Automatic_Commit_Validation_User
|
|
Settling time is require when there is dcdc rail's voltage change.
Returning proper delay time for dcdc voltage change to settle down
the output voltage to new value.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 18039e0f16d50c8243fe0388a587c25a3b155ece)
Change-Id: Ibd67d2661dd1d5b014754c221d44963baeb13726
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90518
Reviewed-by: Automatic_Commit_Validation_User
|
|
There is settling time for each rails when it is switched to
ON. Implementing enable time for returning proper settling time
of regulator rails when it is enabled.
Filling the on-time for each rail as per tps65910/tps65911
datasheets.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 0651eed5e094a079a0a9fccd80a41cb3e7f2aa99)
Change-Id: Ibdb05171cfb4c4e7a064c8f65193647997e8e9a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90517
Reviewed-by: Automatic_Commit_Validation_User
|
|
We actually clear LDO_ST_ON_BIT for standby mode in tps65910_set_mode.
Fix the logic in tps65910_get_mode.
Supply state (EEPROM bits):
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 585993932ccc44ab6a8c6dc590a2f3d6b2facb41)
Change-Id: I1cb46d05396a286ba34c84b1836b9070f0f78003
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90516
Reviewed-by: Automatic_Commit_Validation_User
|
|
This change improves readability.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-picked from mainline
94732b97c39859427cf99c34fc9de9750be7e5a5
Change-Id: Ie3eb5462a99cceab40ba0e26e4e3cdb93c5f3f0f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90515
Reviewed-by: Automatic_Commit_Validation_User
|
|
N-Channel LDOs on MAX77663 doesn't work well. It has glitches. Don't
use it as WAR.
Bug 949641
Change-Id: Ib0c8918137bccc0ce3b30bd6d97ad5f9bd39277e
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/87691
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Keep the rails OFF in sleep mode only when the rails are
controlled by external sleep control.
The devices tps65910 and tps65911, both has the sleep input.
The tps65911's sleep input is not same as tps65910's EN3 and hence
taking care of SLEEP input as separate external sleep control input.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
87ae88a17396fe3f91c34ab44f460e5680eb6f61
Change-Id: I05645082ad5268a4553891db6b35af33650b7a95
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89125
|
|
As per datasheet, the voltage output is defined as
from SEL[6:0] = 3 to 64 (dec)
Vout= (SEL[6:0] × 12.5 mV + 562.5 mV)
The list_voltage returns the vout as
600mV + selector * 12.5mV
and so equivalent VSEL is selector + 3.
Adding 3 on selector when configuring VSEL register for
VDDCTRL output.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
c4632aed3e5b134c55b54af19db49662959384c1
Change-Id: Ifc514a87803191cf796ffc0d75d979476e712dde
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/88830
|
|
Add GCOV profiling for regulators in Makefile. This change has no effect
if CONFIG_GCOV_KERNEL is not set in defconfig. This patch only makes it
easier to trigger GCOV for the kernel.
Change-Id: I921647e2742cda870ebb99afe3f63544396b7f02
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/86277
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Fix the module desciption and also update Kconfig to include supporting
tps65911 chip.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline
commit 02c38f3e8e9b0cd76bdb835b0fd8d627ddf5e19b
Change-Id: Iee8eaf208ae2d448f4c022b2c3908f8519191180
Reviewed-on: http://git-master/r/85124
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The VIO regulator register specify the voltage configuration
on bit3:2 of its register. And hence only these bits should
be modified when setting voltage and used when reading voltage
from register setting.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline
commit 83e0323211e33b117ce585bab64636ca1fff807a
Change-Id: Ica9d50dd62ccab15a02c8769e8b1279fb32d4a03
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85122
|
|
Bug 920845
Change-Id: Id84218efaeebcc834fdac6e0e5c30adc60a13ebc
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/83727
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Liangchuan Mi <lmi@nvidia.com>
Tested-by: Liangchuan Mi <lmi@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
|
|
Removing duplicate driver tps6236x as there is mainline's
driver for tps62360 and using the mainline's driver.
Change-Id: I84c1c642f42d2dc934c8b8bf9b92a58a0bfbdc03
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78415
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Add support for sleep controls of different regulator through
external inputs EN1, EN2 or EN3.
Each regulator's output will be active when its external
input is high and turns to OFF/Low power mode when its
external input is low.
The configuration parameters for sleep control is provided through
board specific platform data.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline
1e0c66f49762fa1866ab20b1feb6e86a9aa4838f
Change-Id: Ie8256fae45c21f08b2d101efebca004cb32963a0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/79181
Reviewed-by: Automatic_Commit_Validation_User
|
|
Fixing the voltage selection logics for a given mininum/maximum
range.
bug 934544
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78970
(cherry picked from commit 59b0264b6eda9f1e8123ee5cd82eae7104c3513e)
Change-Id: Ib9f6e8b1b1f0603aeb02af8345704110cd87b51a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/79512
Reviewed-by: Automatic_Commit_Validation_User
|
|
Fix Bug 935411
Change-Id: I3406bf1ff3450537b72de86b0cb68cb2329da6fc
Reviewed-on: http://git-master/r/79292
Reviewed-by: Dinesh Israni <disrani@nvidia.com>
Tested-by: Dinesh Israni <disrani@nvidia.com>
Reviewed-by: Frank Bourgeois <fbourgeois@nvidia.com>
Tested-by: Frank Bourgeois <fbourgeois@nvidia.com>
|
|
Added GLPM(Global Low-Power Mode) to support Low-Power Mode
during sleep mode.
Bug 924686
Reviewed-on: http://git-master/r/75627
Change-Id: Ia4be1b6b24de95f29ac173bed71c045a246cbcde
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78701
Reviewed-by: Automatic_Commit_Validation_User
|
|
Renaming the variables "table" to "voltage_table" and
"table_len" to "n_voltages" of regulator information
to have more meaningful.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from commit
7d38a3cb9b9f6a6d31b1d19e4f07a7c0b71407d5
Change-Id: I8ef3a7544bf432a3c6efb98d99cb660b6fefde38
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77539
Reviewed-by: Automatic_Commit_Validation_User
|
|
Initializing the number of voltages supported by different
rails of pmic device tps65911.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
51ced5e288b4381705df173fb05f561dea35bfac
Change-Id: I85ec3261125291f9862f9746ef7ec97e09fa375b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77538
Reviewed-by: Automatic_Commit_Validation_User
|
|
Adding missing regulator info for VRTC rail for device
tps65911. The regulator voltage rail index start from
VRTC which is defined as 0.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
c2f8efd7641b1b10b73ffa6f216a45209a5705dd
Change-Id: I7e544ea2f0b3df677ad75bbca38b744c9a6f71da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77537
Reviewed-by: Automatic_Commit_Validation_User
|
|
Count of selector voltage is required for regulator_set_voltage
to work via set_voltage_sel. VDD1/2 currently have it as zero,
so regulator_set_voltage won't work for VDD1/2.
Update count (n_voltages) for VDD1/2.
Output Voltage = (step value * 12.5 mV + 562.5 mV) * gain
With above expr, number of voltages that can be selected is
step value count * gain count
constant for gain count will be called VDD1_2_NUM_VOLT_COARSE
existing constant for step value count is VDD1_2_NUM_VOLTS,
use VDD1_2_NUM_VOLT_FINE instead to make clear that step value
is not the only component in deciding selectable voltage count
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
780dc9ba4eb682a89be48d5b814feae6722a19e0
Change-Id: I1c246a02f1c647fe3c647b3dde2a0633c2783764
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77536
Reviewed-by: Automatic_Commit_Validation_User
|
|
Create an array of fixed size for the platform to pass regulator
initalization data through.
Passing an array of pointers to init data also allows more flexible
definition of init data as well as prevents reading past the end of the
array should the platform define an incorrectly sized array.
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline's commit
c1fc1480249dfe059254779a4bb7ca27cf5f8038
Change-Id: Ia298bbd2828e644d24e10ab67ff76f1169cf7f51
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77535
Reviewed-by: Automatic_Commit_Validation_User
|
|
Move the regulator defintions to the header so that platform board file
can use them to configure specific regulators.
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit:
72c108cc4947db2fcdd3f3e8a2b60bd65e74a1cc
Change-Id: I7659c33cab6f20c91dc4bf36e1c157e1878993ab
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77534
Reviewed-by: Automatic_Commit_Validation_User
|
|
As this dirver is back ported from kernel mainline, the function
regulator_register() have one extra argument.
Removing this extra argument.
Change-Id: I615f995184e4908c399b9ccc91e090e49f10aec3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I999307c90092c3cc816952c948e04c170fc4303d
Reviewed-on: http://git-master/r/77343
Reviewed-by: Automatic_Commit_Validation_User
|
|
The regulator module consists of 1 DCDC. The output voltage
is configurable and is meant for supply power to the core
voltage of Soc.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherrypick from Mainline commit
6219929f5f82708309b3054ec7db6cb6e3ee47d5
Change-Id: Idfdbf06f7d01e0faaabcb658311a9aa5324ddc68
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77341
Reviewed-by: Automatic_Commit_Validation_User
|
|
In the case where _regulator_enable returns an error it was not checked
if a supplying regulator exists before trying to disable it, leading
to a null pointer-dereference if no supplying regulator existed.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-pick from main stream:
commit d1685e4e2c3854782272f32b71f2f3eff5c6e0d0
Change-Id: Ie4d8db9184a65e6a98964259299bfc7daa0f4048
Reviewed-on: http://git-master/r/75908
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76462
Reviewed-by: Automatic_Commit_Validation_User
|
|
This patch adds support for regulators that can be controlled via gpios.
Examples for such regulators are the TI-tps65024x voltage regulators
with 4 fixed and 1 runtime-switchable voltage regulators
or the TI-bq240XX charger regulators.
The number of controlling gpios is not limited, the mapping between
voltage/current and target gpio state is done via the states map
and the driver can be used for either voltage or current regulators.
A mapping for a regulator with two GPIOs could look like:
gpios = {
{ .gpio = GPIO1, .flags = GPIOF_OUT_INIT_HIGH, .label = "gpio name 1" },
{ .gpio = GPIO2, .flags = GPIOF_OUT_INIT_LOW, .label = "gpio name 2" },
}
The flags element of the gpios array determines the initial state of
the gpio, set during probe. The initial state of the regulator is also
calculated from these values
states = {
{ .value = volt_or_cur1, .gpios = (0 << 1) | (0 << 0) },
{ .value = volt_or_cur2, .gpios = (0 << 1) | (1 << 0) },
{ .value = volt_or_cur3, .gpios = (1 << 1) | (0 << 0) },
{ .value = volt_or_cur4, .gpios = (1 << 1) | (1 << 0) },
}
The target-state for the n-th gpio is determined by the n-th bit
in the bitfield of the target-value.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 3f0292ae8bb100cc8f96106a3de277df48134887)
regulator: Add module.h include to gpio-regulator
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit ecc37edf7b670616a9dc78a0bdd4911a22d551ec)
regulator: Fix compile break due to missing arguments to regulator_register
The commit 2c043bcbf287 ("regulator: pass additional of_node to
regulator_register()") caused a compile break because it missed
updating the regulator_register() call in gpio-regulator.c with
the additional parameter (NULL).
The compile break as reported by Stephen Rothwell with the
x86_64 allmodconfig looked like this
drivers/regulator/gpio-regulator.c: In function 'gpio_regulator_probe':
drivers/regulator/gpio-regulator.c:287:8: error: too few arguments to function 'regulator_register'
include/linux/regulator/driver.h:215:23: note: declared here
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 156843470c4b9ea9698cc245d2cff769b3784088)
Change-Id: I912886aae825ca440f4ad3e7a33fe4e84bde4e1b
Reviewed-on: http://git-master/r/74924
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/75547
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Add regulator changes needed to support TPS65090.
bug 909648
Change-Id: Ia88e6706051f7a7e920b01c656f64385b98fc33a
Signed-off-by: venu byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/73144
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/74895
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
During regulator_register, the rail is set on the provided
machine constraints and if it is enabled then it is also
require to enable the supply regulator. This will make sure
that:
1. Proper reference count for supply regulator to be maintain.
2. Supply regulator should be enable when given rail is enabled.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-picked from linus' mainline:
b2296bd43e781976743354c668a356b0df98e1da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ibfdcc8e8dc04a109905883239a7f358a1ef9d54d
Reviewed-on: http://git-master/r/73176
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The correct voltage conversion formula for the register programming
is
Code=((Vout-0.6077)/0.01266)+1
Changing existing formula to above equation.
bug 915859
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Id745cc82269282318cc064f25e789837dc0dfa7a
Reviewed-on: http://git-master/r/72017
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
To prevent power rail turn-off when change FPS source,
it must set power mode to NORMAL before change FPS source to NONE
from SRC_0, SRC_1 and SRC_2.
Change-Id: I02be96bd91ffb756a79a440d319fafe1739ae514
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/69566
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Set selector also in __tps80031_ldo_set_voltage().
Bug 886170
Change-Id: I17dab9cdfa6397dbdf9dba0232e4f8de0cf364f0
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/62147
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
Adding regulator driver for the device FAN53555.
Bug 892117
Change-Id: I895094d3e0aaeb85cfd33f1bc16008c66961b403
Reviewed-on: http://git-master/r/67862
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Jake Park <jakep@nvidia.com>
|
|
Conflicts:
arch/arm/Kconfig
Change-Id: If8aaaf3efcbbf6c9017b38efb6d76ef933f147fa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
commit ba305e31e88ea5c2f598ff9fbc5424711a429e30 upstream.
SMPS regulator voltage control differs from the one of the LDO ones.
Current TWL code was using LDO regulator ops for controlling the SMPS
regulators, which fails. This was fixed fixed by adding separate
regulator type which uses correct logic and calculations for the
voltage levels.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
aat2870_get_regulator
commit d4d6373c1109b11c8118340be97ae31b8f94d66a upstream.
In current implementation, the pointer ri is not NULL if no id is matched.
Fix it by checking i == ARRAY_SIZE(aat2870_regulators) if no id is matched.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Current set_voltage operation has additional selector argument
that is used to return the index of the selected voltage.
Bug 886170
Change-Id: I3e64cc91ab02cf90a2fe283258bc3c9e1aef2e1d
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/62144
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Enable the output discharge path in shutdown of the
regulator.
bug 871944
Reviewed-on: http://git-master/r/67101
(cherry picked from commit 20f19e525d9f680236c80050e4ae97a86979dd78)
Change-Id: Ib88a15546d1402bdf93d624d566dd28e990e7209
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/68427
|
|
Supporting the sleep configuration through platform data.
Rearranging clock initialization to take external power control.
Reviewed-on: http://git-master/r/67076
(cherry picked from commit 9da9d369bdbe988b98eec9b63085dfdb26de8237)
Change-Id: I40c5a8608522dbc322e148b5d569e8f5a00faa21
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/67331
|
|
Some of the values are not supported in the LDO2 configuration
when using in track mode due to hw issue in tps80031 and
tps80032-ES1.0.
Adding proper check before configuring the LDO2 in this case.
bug 898613
Reviewed-on: http://git-master/r/65441
(cherry picked from commit 58e3672102825b662ea904b46b6c1efbf639365b)
Change-Id: I4e63a932d32c7cb2d13a07611acfa0b7dae649cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/66327
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R8b818dcb4fdaab118426df32144f846a0ab00fb3
|
|
Supporting the discharge of output capacitor via a typ.
300Ohm path.
bug 871944
Reviewed-on: http://git-master/r/65107
(cherry picked from commit a969b5c5e024c1ef6e29ef9d3603dd6bbe292567)
Change-Id: I1a8b605f486ab5978feb3a711c9c4e57ea737278
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/65804
Rebase-Id: R7d45dc727b03fa8b55470cc5507052eedecc8f76
|
|
Use platform_data instead
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R74c46fcb0c04961a8e91382da503679db2fede0b
|
|
Moving the configuration function for configuring the
rail control through the PREQ line to core from regulator
driver.
Fixing the correct voltage configuration for the LDO2 based
on TRACK mode.
Reviewed-on: http://git-master/r/63503
(cherry picked from commit 9190130f6cf1ba0bae3231321841ebe4ad94a54e)
Change-Id: I7dd511da7f809a44b1e66706054c0a4c57c36323
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/64055
Rebase-Id: R433728b4c83ccaf6f3ae2734412a90d9c89b6a2c
|
|
Moving the sleep sequence configuration for the pmu from
regulator driver to core driver so that other than power rails,
gpio can also use these APIs.
Reviewed-on: http://git-master/r/62901
(cherry picked from commit 7c2817b42785302c3d9a779c817f70163fabee71)
Change-Id: I9b8584cfd507b34596eee41e9ea799df76c26e5f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/64098
Rebase-Id: R5a6aead9fdda64bf26c0d59a17f794177e82b640
|
|
The MAX77663 PMU has under-shooting issue when voltage down scaling
on SD power rails until revision 3. So if revision is less than rev3,
set safe_down_uV for stable down scaling.
Original Author: Jinyoung Park
Reviewed-on: http://git-master/r/56950
(cherry picked from commit b685f87ea655919e0bf0efb3a1bdddf5d1a3abbb)
Reviewed-on: http://git-master/r/62376
(cherry picked from commit de2370747b224f38ac2fd87402a60e058db28b68)
Change-Id: Icf864c869775490ea0465aae23505ae7333fa80c
Reviewed-on: http://git-master/r/63757
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R9ebf2c4e6fbec3b3c8ec065b119fdc2c64f37cb0
|
|
Supporting the different rails control through the external
control signal PWRREQ1 and PWRREQ2.
Reviewed-on: http://git-master/r/61898
(cherry picked from commit fc07ccae30b61a92fa0b77ee6b2b7c8d43176bbe)
Change-Id: Id6322ef251e4b87673d3a647efb1f0d74b8e0815
Reviewed-on: http://git-master/r/62912
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R687c186e89635a5bd4e3f399709cdf3520936a3f
|
|
Added the platform data to configure the pmu in force pwm
mode.
Reviewed-on: http://git-master/r/61896
(cherry picked from commit 6488995a7ead950e3ab585e71528f86f3208b0da)
Change-Id: I1a828013abdbdf132d77207c7c294e526d9bb825
Reviewed-on: http://git-master/r/62593
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Rd5da6f04a8941a13a3437988dcaaafed2fe6aa8d
|
|
Optimising the read-modify-write operation for setting voltage
by using the register cache.
Reviewed-on: http://git-master/r/60412
(cherry picked from commit 4880f2de83efe7c7c88edf156f1434e7b402b4ce)
Change-Id: I5861838a0e5f98c03badf02a831b852a9eff3952
Reviewed-on: http://git-master/r/61436
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R7821472f936fce9e270403031d48c6fea3dc1a35
|