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path: root/drivers/usb/host/ehci-fsl.h
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2012-09-05powerpc/usb: fix bug of CPU hang when missing USB PHY clockShengzhou Liu
when missing USB PHY clock, kernel booting up will hang during USB initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-04-18fsl/usb: Add controller version based ULPI and UTMI phy supportRamneek Mehresh
Add support for ULPI and UTMI PHYs based on usb controller version info read from device-tree Example of USB Controller versioning info: Version 1.2 and below : MPC8536, MPC8315, etc Version 1.6 : P1020, P1010, P2020, P5020, etc Version 2.2 : PSC9131, PSC9132, P3060, etc No changes for non-DT users Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: Li Yang <leoli@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-24powerpc/usb: fix bug of kernel hang when initializing usbShengzhou Liu
If USB UTMI PHY is not enable, writing to portsc register will lead to kernel hang during boot up. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-10Merge tag 'usb-3.3-rc3' into usb-nextGreg Kroah-Hartman
This is done to resolve a merge conflict with: drivers/usb/class/cdc-wdm.c and to better handle future patches for this driver as it is under active development at the moment. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-02powerpc/usb: fix issue of CPU halt when missing USB PHY clockShengzhou Liu
when missing USB PHY clock, kernel booting up will halt during USB initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU hang in this case. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-01-24usb: ehci-fsl: set INCR8 mode for system bus interface on MPC512xAnatolij Gustschin
Use INCR8 mode for system bus interface of the USB controller on MPC512x. This is a work-around for the AHB bus lock up problem observed on MPC512x when there is heavy simultaneous PATA write or network (FEC) activity. See also "12.4 The USB controller can issue transactions that lock up the AHB bus under certain conditions" in MPC5121e (M36P) Errata. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Matthias Fuchs <matthias.fuchs@esd.ue> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-05-02USB: ehci-fsl: add MPC5121E specific suspend and resumeAnatolij Gustschin
Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-01-22USB: ehci-fsl: Fix 'have_sysif_regs' detectionPeter Tyser
Previously a check was done on an ID register at the base of a CPU's internal USB registers to determine if system interface regsiters were present. The check looked for an ID register that had the format ID[0:5] == ~ID[8:13] as described in the MPC5121 User's Manual to determine if a MPC5121 or MPC83xx/85xx was being used. There are two issues with this method: - The ID register is not defined on the MPC83xx/85xx CPUs, so its unclear what is being checked on them. - Newer CPUs such as the P4080 also don't document the ID register, but do share the same format as the MPC5121. Thus the previous code did not set 'have_sysif_regs' properly which results in the P4080 not properly initializing its USB ports. Using the device tree 'compatible' node is a cleaner way to determine if 'have_sysif_regs' should be set and resolves the USB initialization issue seen on the P4080. Tested on a P4080-based system and compile tested on mpc512x_defconfig with Freescale EHCI driver enabled. Cc: Anatolij Gustschin <agust@denx.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-10-22USB: add USB EHCI support for MPC5121 SoCAnatolij Gustschin
Extends FSL EHCI platform driver glue layer to support MPC5121 USB controllers. MPC5121 Rev 2.0 silicon EHCI registers are in big endian format. The appropriate flags are set using the information in the platform data structure. MPC83xx system interface registers are not available on MPC512x, so the access to these registers is isolated in MPC512x case. Furthermore the USB controller clocks must be enabled before 512x register accesses which is done by providing platform specific init callback. The MPC512x internal USB PHY doesn't provide supply voltage. For boards using different power switches allow specifying DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault" properties in the device tree USB nodes. Adds documentation for this new device tree bindings. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-10-22USB: ehci tdi : let's tdi_reset set host modeMatthieu CASTET
tdi_reset is already taking care of setting host mode for tdi devices. Don't duplicate code in platform driver. Make ehci_halt a nop if the controller is not in host mode (otherwise it will fail), and let's ehci_reset do the tdi_reset. We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt knows we are a tdi device. Before the setup routine was doing : - put controller in host mode - ehci_halt - ehci_init - hcd->has_tt = 1; - ehci_reset Now we do : - hcd->has_tt = 1; - ehci_halt - ehci_init - ehci_reset PS : now we handle correctly the device -> host transition. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-05-23ehci-fsl: fix cache coherency problem on system with large memoryLi Yang
The patch fixes bug http://bugzilla.kernel.org/show_bug.cgi?id=7482. It sets USB snooping on 4G space for PowerPC platforms without CONFIG_NOT_COHERENT_CACHE defined. Reported-by: Stefan Meyer <reyems@telkomsa.net> Signed-off-by: Li Yang <leoli@freescale.com> Cc: Greg KH <greg@kroah.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-04-27ehci-fsl: change SI_CTRL, PRI_CTRL register offsets according to errataChristian Engelmayer
Correct the offsets of the SI_CTRL, PRI_CTRL registers according to the Reference Manual errata sheet in order to prevent unwanted settings regarding burst transactions and priority states. Signed-off-by: Christian Engelmayer <Christian.Engelmayer@frequentis.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-03-20[PATCH] USB: EHCI for Freescale 83xxRandy Vinson
Adding a Host Mode USB driver for the Freescale 83xx. This driver supports both the Dual-Role (DR) controller and the Multi-Port-Host (MPH) controller present in the Freescale MPC8349. It has been tested with the MPC8349CDS reference system. This driver depends on platform support code for setting up the pins on the device package in a manner appropriate for the board in use. Note that this patch requires selecting the EHCI controller option under the USB Host menu. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>