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- Adding flag to treat warning as error.
- Handled warning of unused function.
bug 949219
Change-Id: Ic6edfc28bae95b8395cbd51e80f14aa4aa663f61
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/114624
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Move the device structures to the driver source code files. Register
all nvhost_device's in one loop which is called from board file.
host1x driver code is moved to live under host1x, too. This causes
a need to add host to include path of tegradc and nvavp.
Bug 982965
Change-Id: If99cf9d1ef6bc24663ee8294c19370429ed04ca7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
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nvmap provides an interface for user- and kernel-space clients to
allocate and access memory "handles" which can be pinned to enable
the memory to be shared with DMA devices on the system, and may
also be mapped (using caller-specified cache attributes) so that
they are directly accessible by the CPU.
the memory handle object gives clients a common API to allocate from
multiple types of memory: platform-reserved physically contiguous
"carveout" memory, physically contiguous (order > 0) OS pages,
or physically discontiguous order-0 OS pages that can be remapped
into a contiguous region of the DMA device's virtual address space
through the tegra IOVMM subsystem.
unpinned and unmapped memory handles are relocatable at run-time
by the nvmap system. handles may also be shared between multiple
clients, allowing (for example) a window manager and its client
applications to directly share framebuffers
Change-Id: Ie8ead17fe7ab64f1c27d922b1b494f2487a478b6
Signed-off-by: Gary King <gking@nvidia.com>
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The host (or host1x) bus sits between the cpu core and the 3d, 2d, camera,
display, and mpeg encoder functions. It contains provides DMA channels,
hardware mutexes, and synchronization points.
Signed-off-by: Erik Gilling <konkers@android.com>
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Notable ommisions:
* support for anything but lvds panels
* inegration with nvhost driver to sync updates with 3D
* FB physical geometry is not set
* lacks interface to set overlay/window x,y offset
v2 changes:
* suspend/resume support
* move code into drivers/video/tegra/dc
* modularize output support
* clean register dumping, add debugfs register file
* code review feedback
* make the display controller register the framebuffer devices
Signed-off-by: Erik Gilling <konkers@android.com>
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