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path: root/drivers/video/tegra/dc/ext
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2012-06-04video: tegra: dc: Export dispay feature table.Kevin Huang
Bug 992947 Change-Id: I0d1ecc9f8f042956cbe631779260a38573936616 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/105776 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-05-21video: tegra: dc: Enable GCOV for dc/ext codeChao Xu
Change-Id: Ie6d425f06911008d77c2ed87dc7b40611755ee6a Signed-off-by: Chao Xu <cxu@nvidia.com> Reviewed-on: http://git-master/r/103396 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mark Stadler <mastadler@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-18video: tegra: dc: add per window global alphaJon Mayo
Adds a global alpha parameter to each window. It provides a default alpha value for pixel formats that do not include alpha. Change-Id: I5465864877a727b4daed0eb32fb8219e2ccb663e Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/101806 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-18video: tegra: dc: Use nvmap.h include file from kernel/includeKrishna Reddy
Use nvmap.h include file from kernel/include instead of mach-tegra/include. Bug 854182 Change-Id: Ibfa271191bfce371986df29a7971b1da077c3f06 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/102722 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-05-11video: tegra: dc: Add display feature table support.Kevin Huang
Add display feature table so that user and kernel could set and update window attributes properly. Bug 962353 Change-Id: I08490a225892660126f3eefe4d5b7a4bb61d9bf7 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/101078 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-29video: tegra: add cursor mode flippingAdam Cheney
This change adds a flag to flip windows in cursor mode. Cursor mode will cause flips to be skipped over if there are newer flip requests waiting in the workqueue. Add CURSOR_MODE to caps bitfield. bug 942762 Change-Id: Ib52a0a5565f961cdd9650e4204cd65b86f96fee1 Signed-off-by: Adam Cheney <acheney@nvidia.com> Reviewed-on: http://git-master/r/90418 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-03-08video: tegra: implement DC capabilities ioctlAdam Cheney
The returned capabilities bitfield is initially 0 (no caps). bug 942631 Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17 Reviewed-on: http://git-master/r/87088 Tested-by: Adam Cheney <acheney@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-02-17video: tegra: dc: prevent nvmap_unpin crashMin-wuk Lee
This is a workaround to make sure serialization of flip worker, for Android specific. Android doesn't need mutiple workqueues per each window since it gets composited one from user layer. If the last windows' argument index is not 0, provided change will make the last index to 0 with swap operation so work will be queued into one workqueue all the time. Bug 929993 Bug 932592 Bug 933831 Bug 935623 Bug 934569 Change-Id: Ic467bb4f593c72ae98ea1fb324cf1a6d343faa62 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/82971 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-14video: tegra: dc: acquire window locks in an order to avoid a deadlockNitin Kumbhar
All window locks are grabbed while performing dc window updates. Currently, no particular locking order is followed for these locks. If user provided windows are not in order, this leads to deadlock due to race between flip ioctl and dc underflow reset worker. Now on all window locks are acquired in an order as below 1. window A i.e. index 0 2. window B i.e. index 1 3. window C i.e. index 2 And unlocked in the reverse order 1. window C i.e. index 2 2. window B i.e. index 1 3. window A i.e. index 0 Bug 936545 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/83107 (cherry picked from commit 68815fa87e879d0c783e8fd38f473f414806c0be) Change-Id: I3b3e00eaf91384c39ff74047f06af8199848ad92 Reviewed-on: http://git-master/r/83405 Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-01-24video: tegra: host: Access nvhost_master via drvdataTerje Bergstrom
Use standard drvdata interface for storing and accessing nvhost_master. Reviewed-on: http://git-master/r/72846 Change-Id: I191987c8f6d313a6ede9b59f723269cb6a197e8a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/76815 Reviewed-by: Automatic_Commit_Validation_User
2011-11-30video: tegra: Add support for surface mirroringMichael Frydrych
This adds flags for horizontal and vertical surface mirroring, and updates the ioctl handling code to set the appropriate core dc mirroring flags when the dc_ext mirroring flags are passed. Bug 905578 Change-Id: Idbe0c95cb0807aa9e26ccfdc42cf4ef0dc9eb38f Reviewed-on: http://git-master/r/64110 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R5795faa3988df9f87e669f40aab9b0281111a4b0
2011-11-30video: tegra: Add support for tiled surfacesRobert Morell
This adds a new flags field to the dc_ext flip ioctl, adds a flag for tiled surfaces, and updates the ioctl handling code to set the appropriate core dc tiling flag when the dc_ext tiled flag is passed. Bug 831397 Change-Id: I36cbf4a59173885a98209e559f77404bddcf54cd Reviewed-on: http://git-master/r/64109 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf741be9e6945b6b92699e26fb1745fafef4d8fe4
2011-11-30video: tegra: dc: ioctl for setting gamma lutDavid Schalig
- enable gamma look-up hardware only when needed to save power - add flags field to ioctl TEGRA_DC_EXT_SET_LUT for forward compatibility Bug 868060 Change-Id: I690f8b8856e0b1acd6215907ca8bd78ecaf30b17 Reviewed-on: http://git-master/r/57736 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf6081a9372ba7d6e53a66b9b58a50a62ad409d9a
2011-11-30video: tegra: dc: add ioctl for setting gamma lutDavid Schalig
Adds ioctl TEGRA_DC_EXT_SET_LUT to dc_ext driver for setting a DC window's color palette. Bug 868060 Change-Id: I57ffcf3a3f91e76efd1c7f1f972b73c2edbaed82 Reviewed-on: http://git-master/r/56392 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R712c71151d0c3e3d274279f334bedf312e26e75d
2011-11-30video: tegra: Implement EDID queryRobert Morell
This change implements the TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID ioctl in the dc_ext interface. It first adds a way for the tegra dc EDID module to export EDID data safely, without the risk of reading an incomplete or corrupted EDID in the presence of hotplug, by moving the actual data to a substructure with a lifetime maintained by a kref. Then, that support is plumbed through the hdmi block (which is currently the only way to get at the EDID) and out to userspace. Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 817119 Original-Change-Id: I78cd170e15322011b428cb71ffad2c0c3ea058ac Reviewed-on: http://git-master/r/49127 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: Rafafc0a6fbacda5494b12162ad99a8c70ceeb2e0
2011-11-30video: tegra: dc: Separate allocations for U and VRobert Morell
Currently, dc_ext only takes a single nvmap memory ID per overlay, even in the YUV case (the U and V planes are expected to be differentiated using an offset from the beginning of the nvmap allocation). This is problematic for some software flows, such as certain video interlacing algorithms that will vary the luma plane while keeping the chrome plane constant. This change allows dc_ext clients to specify a different nvmap allocation for each of the Y, U, and V planes. If a YUV surface is used and no U or V plane allocation is specified, the old behavior is preserved: the U and V offsets are assumed to be within the same allocation as Y. Note: this changes the behavior of the offset parameter: the old code added offset to offset_u and offset_v when using it. The new code treats all three offsets as relative to the beginning of the allocation. It also fixes a bug in the code where offset was applied twice to the Y plane. I believe this is safe because the presence of this bug means that no existing clients are using offset != 0 (or if they are, they're already broken). Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 850882 Original-Change-Id: I230e03db25baaae73a3bdc0d45a2aec162b87fa4 Reviewed-on: http://git-master/r/41471 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Ra6dd17a50de7150edf104d2a6c9b3b9949919022
2011-11-30video: tegra: dc_ext: Add head status ioctlRobert Morell
This change adds a new tegra_dc_ext ioctl to allow userspace to query whether a head is currently enabled or not. This is necessary for the X server to be able to restore the outputs that were enabled before it was started. bug 818525 Original-Change-Id: I6d209894081312621f623a722cdd3fcb53553c61 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-by: Aaron Plattner <aplattner@nvidia.com> Reviewed-by: Olof Johansson <olofj@chromium.org> Reviewed-on: http://git-master/r/40530 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re42eae066099587529fbcc677c06ddefef18d36d
2011-11-30video: tegra: Expose vblank syncpointRobert Morell
This change adds support for userspace to query the syncpoint that display autoincrements every vblank. This can be useful for applications to time buffer submissions to throttle rendering and prevent excessive host stalls. bug 818525 Original-Change-Id: I050e4dcd08609da802f10eeec5b70da181b21717 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40529 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rac929d8ba6b14e469fef4c2753b040e02fae0b8e
2011-11-30video: tegra: Expose possible bound head maskRobert Morell
This change adds support for userspace to query which heads an output may be bound to. Since our implementation currently hardcodes the head to output mapping, we currently always fill in a single bit. However, for future implementations we will be able to dynamically bind outputs to heads. bug 818525 Original-Change-Id: Ib0dead7748620a538c8f8d6ef548ca8b13a9c2b2 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40528 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R524f90dca82a3a67fa3289a3ebc4c7e32716749b
2011-11-30video: tegra: Add userspace CSC controlRobert Morell
This adds configurability of the per-window color space conversion support in the Tegra display controller through the dc extension interface. The CSC matrix defaults to its previously-hardcoded values, but can be overridden by userspace. bug 818525 Original-Change-Id: I00d8e48dd38a40e5b8c36d4624d31c834e5cd9de Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40527 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1f445ab544b4c06f56dde1e3f0e9db3c930a9c14
2011-11-30video: tegra: Allow fractional input rectsRobert Morell
This change makes the input rect for Tegra windows be a 20.12 fixed-point number instead of an integer. This allows software to specify sub-pixel precision. bug 818525 Original-Change-Id: I130f63b68159ed896d1113ea537307997875ca40 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40526 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R848e901645aa49776d4dc41fa4210b6b594a8d84
2011-11-30video: tegra: Wire up output connectednessRobert Morell
This makes the core dc driver keep track of whether a particular input in enabled. It is up to the output ops to maintain the connected status if a detect op is plugged in, otherwise it is assumed that the output is always connected. bug 818525 Original-Change-Id: I794d7e2db347f63bbb1a7d80bca1a53d9d10c210 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40522 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfeeae486b6a39b95d9f1d95b697132b476735f50
2011-11-30video: tegra: Implement fops->poll() for control deviceRobert Morell
This is necessary for select() and poll() to work properly when clients are waiting for events. bug 818525 Original-Change-Id: If98b3e0706495884834813c9a352b946352cc2f5 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40521 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc8813923838bada46d87d71ef852960316eda2f7
2011-11-30video: tegra: Add control device to dc extension driverRobert Morell
This device exposes control over everything that's not specific to one of T20's two display controllers. It supports: - output devices - event delivery - hotplug events bug 818525 Original-Change-Id: I3a46f1dddc483b08ed3ee91a4f9c64111c1fd7eb Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40520 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9e49fe41f3327b797ec65c3729f4f94edbb45307
2011-11-30video: tegra: Prevent hang when output disabledRobert Morell
This adds code to track when the dc is disabled and prevent flips or cursor moves. This prevents system hangs since the dc is powergated when it's disabled. bug 818525 Original-Change-Id: I061da1f6a831fa14a216520e603e0fbc5dbb0437 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40519 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rb648ef48bd3528344cf090c49093dcb258c20150
2011-11-30video: tegra: Add cursor support to dc extensionsRobert Morell
This change adds full support for specify the cursor image and manipulating its position. bug 818525 Original-Change-Id: I101a951aff358b0ac0998afc6fe5f6c5c4d37c64 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40518 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R93f0c68a14e4419f200a77d48a17eb8862f2e4e1
2011-11-30video: tegra: Move pin function to new util fileRobert Morell
This will be used in forthcoming cursor support in addition to the existing overlay flipping support. bug 818525 Original-Change-Id: Ic27267deeaefad4ec803eb457a02b22c0d9a1373 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40517 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc1e18fe5248f9dfd1f9ee23184cd2c102539ca61
2011-11-30video: tegra: nvhost: Use a syncpoint per windowRobert Morell
Reserve one syncpoint per window per display controller instead of one for the entire display controller. This is necessary to allow multiple windows on a single display controller to flip asynchronously. bug 818525 Original-Change-Id: Ide1de2bf2ed0bfea7f6abe9aa93815efd0824db1 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40516 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R49886938a74e71db0c8f53edc8ac45e5015ffe84
2011-11-30video: tegra: Implement FLIP dc extension ioctl.Robert Morell
This is very similar to the tegra_fb FLIP ioctl. bug 818525 Original-Change-Id: Iba32ab5bf730b575477c62a8ae4394f1779ef65e Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40514 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R9a79363b09d2df38bec4b8a8666f97b1feff76ff
2011-11-30video: tegra: Add an ioctl() implementation.Robert Morell
This implements: - GET_WINDOW - PUT_WINDOW and adds a stub for FLIP. bug 818525 Original-Change-Id: I467b58a77242b2a8077e236106b542b8545f5353 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40513 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R4fc354fdae76f3eac189d481fb346a0982146db5
2011-11-30video: tegra: Add skeleton support for extensionsRobert Morell
This adds the infrasturcture for an enhanced driver interface to program extended capabilities of the Tegra display controller. It exposes a new set of device nodes for userspace clients distinct from the traditional fbdev device nodes. This is necessary due to limitations in the fbdev infrastructure that don't allow drivers to store file-private data. bug 818525 Original-Change-Id: I06cecf894792b9904c73f9ebcdeb746ff7455f6e Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40512 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: Rfa3969804d7f52c841be1ff96305c9463077e1c5
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-26 13:55:47 +0000