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The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.
Bug 1013172
Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Moved mode setting code into mode.c
Move window code info window.c
Moved clock related code into clock.c
Moved LUT and gamma related code into lut.c
Moved csc(color space conversion) into csc.c
Removed unnecessary static function prototypes from header.
Moved many short inline functions to dc_priv.h
Cleaned up copyright headings.
Cleaned up formatting and indent in all files.
Fixed build warnings.
Bug 870907
Change-Id: I6ccc37150191765394f0b5629423eafd4e5e5792
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/111371
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Change to correct behavior for changing settings while
phase_in_adjustments is set. Manual K values should not be overridden
in the case where DIDIM was on and aggressiveness was changed.
They should maintain state to avoid flickering.
Bug 992995
Change-Id: Ic35c32a0fd5c6caaeee147dff114649ea25770c5
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/105523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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bug 949219
Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92310
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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fix some build warnings and bad code style.
Change-Id: I907296ce0e5437dfd6acd0b2b3c119b6dbde7b1c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/89634
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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CPU register read did not have access to nvhost power management.
Due to this only modules that were powered on previously are actually
accessible via the API. This patch refactors CPU access to:
* Move mutexes to sync point, as they're sync point operations
* Move register address spaces to nvhost_device
* Call register read with access to the respective nvhost_device
* Initialize module completely at boot-up so that register reads
can be done without an initialized channel.
Reviewed-on: http://git-master/r/75275
Change-Id: I0db38cef7b2cd92dc64e7f55d227bdd2fdb8f752
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77764
Reviewed-by: Automatic_Commit_Validation_User
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phase_in_video (renamed) phase_in_adjustments
-Backlight and pixel adjustments
step linearly every ADJ_PHASE_STEP frame updates
phase_in (renamed) phase_in_settings
-Enable/Disable + Agg changes are phased in
Reviewed-on: http://git-master/r/64521
(cherry picked from commit 7d8e34986ba49cf3586a155bdf5a6ae8b02639a9)
Change-Id: Iaf0c1773ce440d93ecd76beaa877891b47652510
Reviewed-on: http://git-master/r/65619
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd2243cc65151f4bf6a4dc189e52b10e8a7afd389
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Bug 895717
Reviewed-on: http://git-master/r/63688
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
(cherry picked from commit 8463b51f4279d36074439cdae2c08fc106d34745)
Change-Id: I3d68fffe73a01c65698f1a2fb209a6a5447df618
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/64230
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: R64eed28c6990da199213f63c6a08305753117efe
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Change-Id: Iecd4b7a950c2276c2281d19a8a554b15c3dc0d16
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Reviewed-on: http://git-master/r/63676
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: Rdbc1fd6cb524b2578be33b3a9147b4078c849290
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Adds phase_in_video field that slowly phases in changes to the
pixel modification and backlight values. This should only be enabled
during video as its results with content that has non-deterministic
time between frame updates is sub-optimal.
Bug 888294
Reviewed-on: http://git-master/r/58426
(cherry picked from commit 27478be1820740080ed4b2a583846a0bb3c572b6)
Change-Id: If6fe099da1d63d742a906ec103911ebc207de644
Reviewed-on: http://git-master/r/60361
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R426a366a34085957659da342b9717bb4d7280898
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Allows DIDIM to keep track of multiple aggressiveness settings
based on different priority levels. Four Priority levels are supported
and the maximum priority currently specified overrules the other settings.
Lowest priority is given to the default kernel value and user specified values.
Bug 888292
Reviewed-on: http://git-master/r/58425
(cherry picked from commit 11a602308f6e4d0851c918933c6839b825e00dde)
Change-Id: Ic1081e52693e1cdb93501640caf6f12d56f4c58d
Reviewed-on: http://git-master/r/60359
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: Rea5ddc8fe837d2b57c696e80e6ca07e93b4fac38
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Settings in DIDIM driver are now phased in over a defined
number of steps in order to minimize the perception of changes
to the settings during runtime
Bug 840155
Reviewed-on: http://git-master/r/52495
(cherry picked from commit a33d4f5c677b657751fd017f8419df88016122a5)
Change-Id: I0af84609d0f2ebadf23463473ebf0211dfa594a3
Reviewed-on: http://git-master/r/55789
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R759433a3cfd9b4c07216da4b2c9de6e515a8530d
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reformat code to fit with Linux coding style, and made blocks in some
larger if-else chains into functions.
Original-Change-Id: If78038d196c8d5cf0326678a7432092179682182
Reviewed-on: http://git-master/r/50179
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: Rc7ae588c25551df1702e0db19fc4a69c71593a52
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Added support for binwidth specific settings
for BLTF and LUT. sysfs support is included.
Bug 721258
Original-Change-Id: I2b76503a51fcbc9ca5cb4ca69fcf722f93878e6d
Reviewed-on: http://git-master/r/36416
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rae8570f5dc97a3798966cf48c402212d1fa8359f
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Don't give write permission for Group for sysfs:
stats_enable, enable and smart dimmer attributes.
Bug 840409
Original-Change-Id: Ic51e2a831c7bffed055d5120e684022ff64736c8
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/36994
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R235fd834aaf57f9205e83335a3aab327d0848587
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Includes:
1.) Added basic DC sysfs objects.
2.) Sysfs objects and functions for smartdimmer settings.
3.) Register dump access for smartdimmer.
4.) Improvements to the behavior of smartdimmer (now updates
at the end of vblank instead of the beginning).
5.) Rename v_blank_complete to vblank_complete to keep in
same effective style as the rest of the code.
Original-Change-Id: I59addcc479880322d49b24d1206009def3c4b392
Reviewed-on: http://git-master/r/29893
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R3a65726e3644d01b374f9774e966d635234567b4
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includes:
1.) changes to DC init to add SD functionality
2.) changes to DC flip to add SD functionality
Original-Change-Id: I8c729e16e2b8a5a4158697b99cc4b3d07bf02001
Reviewed-on: http://git-master/r/21452
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: I4ad3ee3778a0e859e0d2b0c36ee6369193795cd3
Rebase-Id: Rd133da1af5c8b283b1886b025b8b1880ec61fde0
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