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1. set UF_LINE_FLUSH to 0 by default.
2. if it gets 4 consecutive frames with underflows, enable UF_LINE_FLUSH to
get rid of underflow condition.
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Change-Id: I6d647d958484ee355809036bec7ca1b0c716017b
Reviewed-on: http://git-master/r/103227
Reviewed-by: Michael I Gold <gold@nvidia.com>
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Adds a global alpha parameter to each window. It provides a default
alpha value for pixel formats that do not include alpha.
Change-Id: I5465864877a727b4daed0eb32fb8219e2ccb663e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/101806
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182
Change-Id: Ibfa271191bfce371986df29a7971b1da077c3f06
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102722
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Set correct VIC value for 1080p/30Hz mode in AVI infoframe.
Bug 969243
Change-Id: I6da9236124dbad7e4d74f3cf6dad7e273bd7778b
Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/100553
(cherry picked from commit 41858f2fd99face9dc0c47bd2870045291a6c0b6)
Reviewed-on: http://git-master/r/102378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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To avoid border color making limited range test of MHL
certification failed.
Bug 966615
Bug 969243
Signed-off-by: Vick Yu <vyu@nvidia.com>
Change-Id: I5c9659358a1c8dac9c6a5194bbc6f59b8230f116
Reviewed-on: http://git-master/r/100552
(cherry picked from commit 20774a3db055630ba0e59669e2e7cbd412f03178)
Reviewed-on: http://git-master/r/102377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Tested-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Move WinB's format limitations to a list of preferred formats.
Bug 985197
Change-Id: Ife37c79441b2737592ace51e94ab0c80af4af917
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102629
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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Makes function pointer type for mode_filter match the function in hdmi.c
Change-Id: Id61f319a4ddef003b79782391e9e7f2f8cb32dda
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
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Use static for functions that are not called externally.
Change-Id: Iacccb83e31e860d10f92897041421298231e45b1
Reviewed-on: http://git-master/r/102623
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Bug 955184
Change-Id: I7ac0a290c2b6acd454de05d094bd676b88f4b476
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101546
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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-Move _tegra_dc_enable to before irq_request and remove
disable_dc_irq.
-It will remove warning of "IRQ when DC not powered!".
Bug 955184
Change-Id: If9b039f3f1635d92f10bfc54af08101972fc3d57
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101498
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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WAR comprises of soft reset dsi controller followed by
explicitly clearing host trigger.
Bug 982919
Change-Id: Ia8c497dd496435e429cd5b5ee8aaf1b7d78dc797
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/102204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add display feature table so that user and kernel could set and
update window attributes properly.
Bug 962353
Change-Id: I08490a225892660126f3eefe4d5b7a4bb61d9bf7
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/101078
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Call dc_hdmi_mode_filter to validate a videomode. X prepares its
own modedb of supported HDMI modes, but all of them may not be
supported from the HDMI driver. This call makes sure a X-mode is
listed only if supported in DC driver.
Bug: 959676
Change-Id: I8aff65f4e08fcc4471af096150e3972b5913a95a
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99650
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Set default videomode during the dc probe. This patch enables
HDMI during the probe only and fixes following issues:
1. Until Xinit there was no display on HDMI.
2. Framebuffer console on HDMI needs it to be enabled well before
Xinit.
To avoide un-necessary powering on HDMI,Check HPD and enable HDMI
only if it's present.
Bug: 930136
Bug: 977705
Change-Id: Ifb71328e5df0ccbb5751669db71fd24719fe3738
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/100656
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Clean up #includes. Replace #includes with forward declarations where
possible, and remove extraneous #includes.
Bug 871237
Change-Id: I6942e0c632b42ad7009589ebdd78def88ae4baa4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/99046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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This reverts commit 9349cedf17f9b3c10760c8d48f831473f87a3a15.
It is reviewed on http://git-master/r/99635
It will cause HDMI power ON and emc clock bump up to 667Mhz
after resume from LP0.
bug 930136
Change-Id: I130494fdb381b3d322ac0e3fc8be2e44f2c2d7a7
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/100202
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Bug 933653
Change-Id: If7ce4dc5129782a7e3487028d2dba01c9380ba90
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Set default videomode during the dc probe. This patch enables
HDMI during the probe only and fixes following issues:
1. Until Xinit there was no display on HDMI.
2. Framebuffer console on HDMI needs it to be enabled well before
Xinit.
Bug: 930136
Change-Id: Ieaf5c69eefa4a6584893425ad4fd772bcd91ea11
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99635
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This reverts commit 90b79e5712300baab889772a5af348559ac95836.
Bug 955393
Change-Id: I0e2a15b7d0898dbbb62f09d8bd3502ec93366664
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/99261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Adam Cheney <acheney@nvidia.com>
Tested-by: Adam Cheney <acheney@nvidia.com>
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Bug 951349
Change-Id: I79fb2e49fa38b83af78323b5f5cf6dbca8fd83c2
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98512
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 953210
Change-Id: Id40b3fe90174a2a8c9a6faf3f35f61d9f7eeb642
Signed-off-by: Sayak Ghosh Choudhury <sayakc@nvidia.com>
Reviewed-on: http://git-master/r/98477
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Inform DC register updated after we programmed. This eliminates
the display corruption while device enters and resumes from LP0.
Signed-off-by: Mark Zhang <markz@nvidia.com>
bug 964626
Change-Id: I4c655d4800474c675d4cdb6204d6fe66e8c6c4b5
Reviewed-on: http://git-master/r/98336
Tested-by: Mark Zhang <markz@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peer Chen <pchen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Change-Id: I8aa25b03fe6801882b65209cb1a6e125ef27ac2c
Signed-off-by: Michael I. Gold <gold@nvidia.com>
Reviewed-on: http://git-master/r/98319
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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add trace_printk to log useful debug information.
Bug 870685
Change-Id: I29c0b1600f234ebb06d19c8b6c713b16f6e7643c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/89204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
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TEGRA_DC_EXT_SET_LUT programmed the proper shadow registers
but did not copy the shadow registers to the active set.
Signed-off-by: Adam Cheney <acheney@nvidia.com>
bug 947281
Change-Id: Id734e128bb708f1a75c0cad22b0c51b083d8df3b
Reviewed-on: http://git-master/r/91368
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: Ib1b0fc6015a9dd45982a97231972dadba6b5a92e
Reviewed-on: http://git-master/r/96966
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Provide /sys/class/graphics/fb0/device/nvdps to change video mode
on-the-fly without resetting window layout like fb_set_var(). This
allows flicker free changes in refresh rate.
nvdps sysfs file takes an integer, and selects the closest matching mode
with the same or higher refresh rate. Reading the file displays the
current refresh rate.
Bug 560152
Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/95473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during
vblank). This elimiates the work around that requires disabling then
enabling display to change modes.
Adds a spinlock to protect irq code from updates to tegra_dc_mode structure.
Bug 560152
Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/90688
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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bug 949219
Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92310
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1.
In order to work around bug 869099,
this mode has been temporarily disabled.
Since the bug is not so visible, enable again.
Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497
Reviewed-on: http://git-master/r/92157
Reviewed-by: Alok Ahuja <alahuja@nvidia.com>
Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Change to using kbytes/sec to avoid overflowing 32-bit integer in
bandwidth calculation.
Changing efficiency adjustment to ~35%.
Bug 958016
Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92658
Reviewed-by: Automatic_Commit_Validation_User
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Enabled recovery of DC from resetting. When underflow triggered serveral
times(current > 4 for tegra2), DC driver will reset itself to prevent
data corruption. Reopend nvhost connection when resetting finished. That
helps system to show frames instead of a blank screen again.
Fixed Bug 936613
Change-Id: I314c37258a4a446dc07167ac60d0420e79a5fb2d
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/89406
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 949759
Add new 1080p timing support, or 1080p playback is not available on
some monitors like Acer H243HX
Change-Id: I8a8a3a5b2de71d5a56dad233f953e09176f85b76
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/91732
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Remove old overlay interface, it is replaced with TEGRA_DC_EXTENSIONS
External functions made static now that overlay.c no longer needs them.
Change-Id: I5d080ceb19ad90d3b5cc4bf20494c967687293a5
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92661
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Michael I Gold <gold@nvidia.com>
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>
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This change adds a flag to flip windows in cursor mode. Cursor mode
will cause flips to be skipped over if there are newer flip requests
waiting in the workqueue.
Add CURSOR_MODE to caps bitfield.
bug 942762
Change-Id: Ib52a0a5565f961cdd9650e4204cd65b86f96fee1
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/90418
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
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Set dc clock rate dynamically to requested pixel rate.
Using modes specified in monitor's EDID data.
Return mode set errors on unsupported clock tolerances.
Bug 931908
Change-Id: I60990ecbc2fbeab542987036b8ccc30b8dababe8
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/86073
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add following VGA video modes in tegra_dc_hdmi_supported_modes list:
Resolution Refresh rate(Hz)
----------- ----------------
640x480 75
720x400 59
800x600 60
800x600 75
1024x768 75
1024x768 60
1152x864 75
1280x800 60
1280x960 60
1280x1024 60
1368x768 60
1440x900 60
1600x1200 75
1680x1050 60
Add CVT representation of all above modes to make sure they pass all the
HDMI constraints.
Add a new function tegra_dc_reload_mode to pick up CVT representation of
matching mode.
Bug 883911
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: I5227644207d38ca83a0452d3c078ef202e40a508
Reviewed-on: http://git-master/r/89126
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Not disabling emc clock when it's being set to zero results in incorrect
reference count when a call is made to clear bandwidth. This happens when
two worker threads try to handle dc emc rate. A deep-sleep/wake-up cycle
easily shows this scenario.
With this fix, disp.emc's ref count is properly managed even after multiple
deep-sleep/wake-up cycles.
Bug 947228
Change-Id: I045fafbd483af1e3d492b8d0395275e45642d059
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/90100
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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dsi HW does not clear host trigger bit automatically
on dsi interface disable if host fifo is empty.
This leads to hang. Clearing the bit explicitly.
Bug 930453
Change-Id: Id24359dc274f187f8ac634ad838ef4a6a29a6a5e
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/90043
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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fix some build warnings and bad code style.
Change-Id: I907296ce0e5437dfd6acd0b2b3c119b6dbde7b1c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/89634
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add checks to ensure host1x is powered when DSI is used.
Change-Id: I2e61abdd5c0741571fb18262fd2efa16ffee71d9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/86361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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There are HDMI modes which have different margin/sync values
although resolution and pixel clock are the same. One example
is 1080p/24Hz and 1080p/30Hz case.
Those modes are not distinguished when we check if given two
modes are equal. So clocks per frame also should be validated
to decide sameness of the modes.
Bug 950935
Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/89026
(cherry picked from commit b9e6316850a47445be7545aaec85c6a247c44cb9)
Change-Id: I06d3c0f41e63d65f1908614d09df4d16028895f0
Reviewed-on: http://git-master/r/90030
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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We add this variable for two purposes. First, it would remind developer
to make sure actual refresh rate is larger than rated refresh rate.
Second, gralloc would read rated refresh rate for one-shot mode since
actual refresh rates of most devices are expected running at rated
refresh rate.
Bug 946370
Bug 934977
Change-Id: Ib4121337df1a388b40440b22687c39f373f08890
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89871
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Horizontal blank must be greater than phy timing for
HS transmission.
Bug 938043
Change-Id: I5afe68ec04341f7b83c2897c586d4618bd518222
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/89789
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding support to accomodate hw increment to
phy timing reg values.
Bug 938043
Change-Id: I8de14648c0994b03c37a2ee455a656ff11c3cc34
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/89741
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 951626
Change-Id: Ia7c7474aa0f066cba8bd1519a98e302c4b3992e0
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89076
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Remove unnecessary 100ms delay for primary panel since
this is needed for HDMI type only.
Bug 940012
Change-Id: Id27966fb28faa73ade3a868a9f89cadbde76e227
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/87613
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The returned capabilities bitfield is initially 0 (no caps).
bug 942631
Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17
Reviewed-on: http://git-master/r/87088
Tested-by: Adam Cheney <acheney@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
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Add lock to prevent race condition between cancellation of old delayed
work and schedule of new delayed work.
Bug 936337
Change-Id: I52df82e92279163841546127c72be9879ef810d0
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/86730
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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In panel resume path DSI_PAD_CONTROL value gets calibrated,
however later on values are overwritten with bit settings
for ulpm mode.
refactor value for reg write to only change ulpm related bits.
Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855
Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com>
Reviewed-on: http://git-master/r/85873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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