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path: root/drivers/video/tegra/dc
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2012-01-16video: tegra: dc: consolidate underflow codeJon Mayo
Move underflow handling out of the irq handler and into a workqueue. Change-Id: I289d0a4c4e632a229e46d8e7f82e637409813807 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/74427 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Reviewed-on: http://git-master/r/75143 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-12video: tegra: host: Move device data to nvhost_deviceTerje Bergstrom
Move all device data from nvhost_channeldesc, nvhost_moduledesc and nvhost_module to nvhost_device. nvhost_devices are also assigned into a hierarchy to prepare for implementation of runtime power management. Change-Id: I1e18daae8fe538086cd1f453d316e0f73e9d7d92 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/72844 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Reviewed-on: http://git-master/r/74560 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-12Revert "video: tegra: dc: use highest bandwidth setting"Jon Mayo
This reverts commit af9a6eb54c031a8cca1477134d07e1ef2b807be3. Test reports were inconclusive on the effectiveness of this change. Change-Id: I859a14d2e2dcd9eed3a1c64f35e4f1c077660311 Reviewed-on: http://git-master/r/74021 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Reviewed-on: http://git-master/r/74550 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-01-10video: tegra: dc: Fix support for YUV422RFrancis Hart
The tegra display controller supports the YUV422R planar surface format, but this was not handled by the dc driver. This change also fixes the YUV422RA planar format variation. Bug 914375 Change-Id: I73ffd2f7434c71d8353c7e16ada5ac6b13fee86b Reviewed-on: http://git-master/r/69446 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> (cherry picked from commit a085ef1eeb332116f102d82af25f7a6451eb6329) Reviewed-on: http://git-master/r/73950 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-06video: tegra: dsi: Fix mipi continuous clk disableAnimesh Kishore
Fix for stopping mipi high speed continuous clk. Bug 903878 Change-Id: Id318fabd9c6aef116a60608c6f444846172f4803 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/72968 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-01-04video: tegra: dc: use highest bandwidth settingJon Mayo
Apply the highest bandwidth setting before windows are programmed rather than waiting for vblank. Bug 914917 Change-Id: Iaaede9966191fdfc896bbbb19fbbadf9c4598bff Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/72301 Reviewed-by: Michael I Gold <gold@nvidia.com> Tested-by: Michael I Gold <gold@nvidia.com>
2012-01-04video: tegra: host: Move host1x code into own directoryTerje Bergstrom
Move source files related to host1x into an own directory. Bug 871237 Change-Id: I6fa3ef057f8b788c37dd2ab698271cf7508711c6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/71783 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2011-12-30video: tegra: dc: Fix dc stream random failure to stopAnimesh Kishore
Fix dc stream randomly failing to stop. Add stablization delay during dsi interface reset. Bug 913019 Change-Id: I1cf3013659de75d15cb1ff41b27c63abd953d614 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/71952 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-12-21video: tegra: dc: direct dc out pins polarity settingMin-wuk Lee
dc vsync, hsync, DE and pclk polarity in kernel can be different with bootloader setting for a short time when default polarity value is written. This can generate momentary panel flicker in kernel boot. Set the first polarity based on board dc out pin polarity information directly if needed. Bug 891444 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/59895 (cherry picked from commit 8e5bfd5702067309171b62a6be5471bfab68a31e) Change-Id: I80c703792ea5a9596d4cf42ef19115cbf4d556f6 Reviewed-on: http://git-master/r/69711 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com>
2011-12-21video dsi: tegra: Fix support for hs clk in lp modeAnimesh Kishore
Enables high speed clock on mipi lanes in low power mode. Change-Id: I3b05d7f9bc5e8f63483220100f3361904e627c52 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/69951 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-12-15video: tegra: dc: Move DSI clock configuration to DC.Kevin Huang
We'd better place clock set-up in dc as HDMI. It makes code cleaner. Also eliminate a false warning. Bug 902786 Bug 850852 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/65024 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> (cherry picked from commit e570e8dd45a66f11f0fc432f5919c5a036e34ba0) Change-Id: I90d73602048e2b3c706550128ba04665c307da22 Reviewed-on: http://git-master/r/68863 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2011-12-15tegra: HDMI: add underscan capability exposure via sysfsVictor Ryabukhin
TVs/monitors which do not support underscan will crop HDMI picture. Underscan information might be needed in userspace to adjust HDMI resolution so that the picture will be shown correctly on such devices. Bug 911580 Bug 912187 Change-Id: I1eec810d860e13dafef895cb85b32fd8187a4e02 Signed-off-by: Victor Ryabukhin <vryabukhin@nvidia.com> Reviewed-on: http://git-master/r/68616 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-12-08tegra: treewide: Remove unused gpio-names.h includesDan Willemsen
Most places shouldn't be using these macros, they should get the gpio information from the board files. Either way, all of these instances were unused. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Change-Id: Ifb76704dccb24e5e6eab4c06c79bc8e97802c6d3 Reviewed-on: http://git-master/r/68481 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-08video: tegra: dc: use Kconfig to enable nvhdcpJon Mayo
Use TEGRA_NVHDCP to enable/disable support for NVHDCP on HDMI. Change-Id: If65267e7a4c82c5497271c19ac985bfa8881bca1 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/67883 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-08video: tegra: hdmi: change the way hdmi bottom half is cancelledSanjay Singh Rawat
Calling sychronous function cancel_delayed_work from interrupt context will put it on hold till work is cancelled, which is not recommended in ISR. Using similar function __cancel_delayed_work which works asynchronouly. Bug 885275 Change-Id: I356af7bf8a22f14aceda4b0171466884e0080da2 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/67681 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-12-08video: dsi: tegra: Implement panel sanity checkAnimesh Kishore
-Send NOP cmd and BTA -Switch to host operation from any state and switch back on completion. -Optimize for code reusability Bug 880775 Bug 903882 Change-Id: I2f5132d6d72743606696040d6bb6878f5b29418f Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/66826 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-11-30video: tegra: hdmi: Add support to HDMI test in driver.Kevin Huang
Test function is invoked by hdmi test module to test DC1, HDMI and EDID modules. Bug 834332 Reviewed-on: http://git-master/r/56482 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit 8a2ec9a20d88db2f96e17cb7136d81560b989542) Change-Id: I196802fda78a753391298b0c3b6874cedbf1e197 Reviewed-on: http://git-master/r/60467 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R2fb40403527aff9b5ca312df475420c7015c53f5
2011-11-30driver: video: terga: dc: fix switch class dependenciesMursalin Akon
Mark the dependencies of dc driver on switch class explicit, using proper pre-processors. Bug 877239 Change-Id: Ie5931aaf4f279e6379b85a00a30bd3cb910614d0 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/55774 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R229bab237a55cacd22f5071eaca1a60503fdbb0d
2011-11-30HACK: handle DC IRQ when off gracefullyDan Willemsen
Change-Id: I613ad237bda9845c928b27b96db227e484b95f7d Reviewed-on: http://git-master/r/41077 Tested-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Rebase-Id: Rbc20d94729500157b45207bac4ab0d4340297af2
2011-11-30video: tegra: add modeset switch to trigger ueventsDan Willemsen
Original-Change-Id: I3b060b622a593d48319a442072a21d0c4f9527ae Reviewed-on: http://git-master/r/19049 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Ra9c6d91a0cb402b3b660e417a87480b36933a92f
2011-11-30tegra : HDMI: hdmi hot plug detection modificationMinwuk Lee
When tegra_dc_hdmi_detect is triggered with high HPD Interrupt, but there's no previous trigger of low HPD interrupt, by some specific HW design, then, there's no switch change, no hotplug_handling is getting called because 1=>1 change do nothing in switch_set_state. Add this change for safe operation. Bug 779317 Original-Change-Id: I79f9ad24616388a9eb5156d53b12676b96665c38 Reviewed-on: http://git-master/r/16285 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R329952d27a0f27a997489452d47f31b68dbe98bb
2011-11-30Merge branch 'korg-android-tegra-3.1' into after-upstream-androidDan Willemsen
Conflicts: arch/arm/mach-tegra/Kconfig arch/arm/mach-tegra/board-ventana.c drivers/misc/Kconfig drivers/video/tegra/dc/hdmi.c Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-11-30video: tegra: Add new API to set HDA presence detectSumit Bhattacharya
Export a new API from HDMI driver which can be used by HDA driver to forcefully send a new presence detect event. Whenever this API is called HDMI driver will reset presence detect bit and will setup ELD buffer if HDMI device is plugged in. If this API is called while HDMI is not plugged in it will return an error. Tegra HDA controller does not support detection of plug event when HDA clocks are disabled. With help of this API HDA controller will be able to request HDMI driver to generate a new presence detect event after enabling it's clocks so that it can get proper ELD information. Bug 904530 Change-Id: I0c7eb671e2311dbb454b758d21496e6ffd30b0ae Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/66825 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: R85a08fd28f71eaa0e00ab1ac5c682b5095a9647b
2011-11-30video: tegra: Add HDA clock managementSumit Bhattacharya
Add code to manage HDA related clocks from HDMI driver. When no HDMI device is connected to device HDA clocks are disabled to save power. Whenever HDMI hot plug in happend HDMI driver needs to enable these clocks before setting HDA presense bit so that HDA controller recieves the interrupt. Bug 862023 Change-Id: If62113ad2c71657419056000f5dfe363762bd697 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/66091 Reviewed-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R7367eac67b14907effdee571cd71a04b81b6945e
2011-11-30video: tegra: Add support for surface mirroringMichael Frydrych
This adds flags for horizontal and vertical surface mirroring, and updates the ioctl handling code to set the appropriate core dc mirroring flags when the dc_ext mirroring flags are passed. Bug 905578 Change-Id: Idbe0c95cb0807aa9e26ccfdc42cf4ef0dc9eb38f Reviewed-on: http://git-master/r/64110 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R5795faa3988df9f87e669f40aab9b0281111a4b0
2011-11-30video: tegra: Add support for tiled surfacesRobert Morell
This adds a new flags field to the dc_ext flip ioctl, adds a flag for tiled surfaces, and updates the ioctl handling code to set the appropriate core dc tiling flag when the dc_ext tiled flag is passed. Bug 831397 Change-Id: I36cbf4a59173885a98209e559f77404bddcf54cd Reviewed-on: http://git-master/r/64109 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf741be9e6945b6b92699e26fb1745fafef4d8fe4
2011-11-30video: tegra: dsi: Fix read in lp write configAnimesh Kishore
Use separate freq for read and write operation. Freq mentioned in board file. Change-Id: I9d641679d975e18713e147f73960ba584755a663 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/66134 Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Rebase-Id: Ra82e1506f68bd7c598b74b63beee822c9619e0ec
2011-11-30video: tegra: dc: Disable 1080p stereo supportDhiren Bhatia
Temporarily disable support since it appears the modeset to 1080p takes longer than anticipated. Re-enable once issue has been fixed. Bug 869099 Reviewed-on: http://git-master/r/#change,53891 (cherry-picked from change Change-Id: Ifa08a9bd9d0415e0f9f09b13c83e34d3ef4fc1a9) Change-Id: Ic86e9387dd49c28b3dcba028ca2ba95b8e6780fa Reviewed-on: http://git-master/r/65902 Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com> Tested-by: Dhiren Bhatia <dbhatia@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R181b904eb4de4b96c2bf40c6a7797639c8a8d6fd
2011-11-30video: tegra: Change DIDIM Phase InMatt Wagner
phase_in_video (renamed) phase_in_adjustments -Backlight and pixel adjustments step linearly every ADJ_PHASE_STEP frame updates phase_in (renamed) phase_in_settings -Enable/Disable + Agg changes are phased in Reviewed-on: http://git-master/r/64521 (cherry picked from commit 7d8e34986ba49cf3586a155bdf5a6ae8b02639a9) Change-Id: Iaf0c1773ce440d93ecd76beaa877891b47652510 Reviewed-on: http://git-master/r/65619 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd2243cc65151f4bf6a4dc189e52b10e8a7afd389
2011-11-30video: tegra: dc: Reduce crc_checksum_latched to proper permision.Kevin Huang
Bug 891634 Change-Id: I0c9f57bd5686916856cb10e0f37d30962d7f96a7 Reviewed-on: http://git-master/r/62649 Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Greg Lo <glo@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit 50d41a8261ee164ab2e980471e7dc98c2d20c859) Reviewed-on: http://git-master/r/64807 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Rebase-Id: Rae56d882f233f1ac8080610d3afdfe392c956b3c
2011-11-30video: tegra: dc: Skip DIDIM update if DC is disabled.Kevin Huang
Bug 895717 Reviewed-on: http://git-master/r/63688 Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit 8463b51f4279d36074439cdae2c08fc106d34745) Change-Id: I3d68fffe73a01c65698f1a2fb209a6a5447df618 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/64230 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R64eed28c6990da199213f63c6a08305753117efe
2011-11-30video: tegra: dsi: Add support for DCS short write (1 parameter)Ming Wong
Add MIPI DCS short write (1 parameter) support. The cmds sent with this new function will be sent every frame by hardware Bug 884157 Reviewed-on: http://git-master/r/58180 Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit df4679db62b164e33e82fe56a18787cfca431d82) Signed-off-by: Jon Mayo <jmayo@nvidia.com> [jmayo@nvidia.com: cleaned up formatting] Change-Id: Ia2b54c070c91bbb4ba59741c0c5c23dae8f71ce8 Reviewed-on: http://git-master/r/63413 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: R965eb64babd304bd66f2c057721a9dd1eedb17ca
2011-11-30video: tegra: dc: ignore unused overlays for bandwidthJoel Kenny
If an overlay is not being used, do not program the latency allowance. This is to avoid underflows that occur at a resolution of 19x12. When the unused overlays are reenabled, they underflow if the latency allowance has previously been increased to a very high value. Change-Id: Id381a74f5cc602d47199cb42d17f77b1086de70e Reviewed-on: http://git-master/r/58195 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Joel Kenny <jkenny@nvidia.com> Tested-by: Joel Kenny <jkenny@nvidia.com> Tested-by: Gerrit_Virtual_Submit (cherry picked from commit cbc4e10451137a972ef694d7698c7dab26017377) Signed-off-by: Jon Mayo <jmayo@nvidia.com> Change-Id: Id7101997db77e54861ef1045df5eccdfa4ee09eb Reviewed-on: http://git-master/r/64065 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: R8338a8bee51d297d66d8e0708f91627d202269ec
2011-11-30video: tegra: dsi: use mask to control interruptsXin Xie
This patch is based on "video: tegra: dc: use mask to control interrupts", so we do not use DC_CMD_INT_ENABLE to disable IRQ. Bug 888207 Bug 870801 Reviewed-on: http://git-master/r/58176 (cherry picked from commit 6feaad5a74a934f604f5d25220afff478c43736d) Change-Id: I2d7f8575c7d88fa89eb18c88e09cef62228353e8 Signed-off-by: Jon Mayo <jmayo@nvidia.com> [jmayo@nvidia.com: fixed conflicts] Reviewed-on: http://git-master/r/63371 Rebase-Id: R31808eb1648f8634cc183f0d92c763999909d10d
2011-11-30video: tegra: dc: use mask to control interruptsJon Mayo
Use the enable irq register during init, and mask irq register to control the interrupts to avoid a race in clearing interrupt status. Clear mask and enable during DC disable. Bug 888207 Bug 870801 Reviewed-on: http://git-master/r/57603 (cherry picked from commit 4640498bd8d46b6c5c1898d8ca8c9760416d1eae) Change-Id: I8d93746533da5021919cc4152a467adc6889c4c6 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/63370 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: Ra3d62939458871c4c1cc09fe6010922cc95e4a1c
2011-11-30video:fix buffer overflow in nvsd_lut_storeColin Patrick McCabe
Change-Id: Iecd4b7a950c2276c2281d19a8a554b15c3dc0d16 Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com> Reviewed-on: http://git-master/r/63676 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: Rdbc1fd6cb524b2578be33b3a9147b4078c849290
2011-11-30video: tegra: dc: Use FRAME_END_INT to mark completion of frame end.Kevin Huang
V_BLANK_INT was used to mark frame end for other tasks. However, it occurs at frame start. Switch to FRAME_END_INT to mark the end of frame. Bug 875448 Reviewed-on: http://git-master/r/52694 (cherry picked from commit 078a2688c67c46cf840f191405cd4324cb9c4574) Signed-off-by: Jon Mayo <jmayo@nvidia.com> [jmayo@nvidia.com: wrapped commit message, fixed bug in S_TO_MS()] Change-Id: I507148772c2f3037befd30289e5b3a56fe417ee9 Reviewed-on: http://git-master/r/63369 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R5dbcf2d7ff3fd627194ae1a6163a300e6e48ff7c
2011-11-30gcov-kernel: Add GCOV_KERNEL := y to MakefilesJuha Tukkinen
These changes have no effect if CONFIG_GCOV_KERNEL is not set in defconfig. It is easier to trigger GCOV for kernel if this patch is in by only setting the before mentioned flag. Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/62999 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
2011-11-30video: tegra: dc: remove extra call to tegra_periph_reset_assertTom Cherry
During the K39 merge an additional call to tegra_periph_reset_assert was added. The call in this place was moved by the following two commits and needs to be removed from where it currently is. e9f069bc video: tegra: dc: Fix introduced regression. 884cc8a9 tegra: dc: fix dc hang during dc reset Bug 895713 Change-Id: Ibfe1445f23dbc92498696a6d0743f4b5f92e049e Reviewed-on: http://git-master/r/62510 Tested-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: Re923f258ce13fa9c3fc4f9643762784729df63ae
2011-11-30video: tegra: dsi: Refactor code in tegra_dsi_hw_init()Kevin Huang
Reviewed-on: http://git-master/r/54824 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit 4681815651f5949840815a03698d55ec8186796c) Change-Id: I5553b52806c63f8fb1fdc38f151a144ec103bcc5 Reviewed-on: http://git-master/r/61617 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Rf733836f46f9afb42b5d680683d98e04c4a0e776
2011-11-30video: tegra: hdmi: Add support to HDMI test in driver.Kevin Huang
Test function is invoked by hdmi test module to test DC1, HDMI and EDID modules. Bug 834332 Reviewed-on: http://git-master/r/56482 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> (cherry picked from commit 8a2ec9a20d88db2f96e17cb7136d81560b989542) Change-Id: I196802fda78a753391298b0c3b6874cedbf1e197 Reviewed-on: http://git-master/r/60467 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Raea2dcac0ecfca42b8a2a56461828bcd1c7d055f
2011-11-30video: tegra: dsi: Fix value of PKT_WR_FIFO_SEL.Kevin Huang
Bug 834959 Reviewed-on: http://git-master/r/54861 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> (cherry picked from commit 8f2ce3c04c16331332d4ba12f097787fd82af2db) Change-Id: I3e8c9039316459a563a432507e880c29f04260ba Reviewed-on: http://git-master/r/61612 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re5a1aab4caec5539d213697ed2cc90b2255a79be
2011-11-30video: tegra: dsi: Adjust two CSI registers in DSI module.Kevin Huang
Bug 829327 Reviewed-on: http://git-master/r/50871 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> (cherry picked from commit 8d9aa14595348a2daa408710927471169447e73c) Change-Id: Ib3e335dab5329ef29842354dc9934f8213ae3d58 Reviewed-on: http://git-master/r/61603 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R6ec4d12410e956f37db259fb337fd17d86622838
2011-11-30video: tegra: dsi: Adjust CSI register values to follow MIPI spec.Kevin Huang
Bug 829327 Reviewed-on: http://git-master/r/50352 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> (cherry picked from commit 36eb87ff03c2bc6ee5b3821117b3afb225417034) Change-Id: I1533f55d0817c76c3cd75890b13927b81a2f0c4b Reviewed-on: http://git-master/r/61602 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R70593482503bd6de287d3cbf90e4b075c1cfb194
2011-11-30video: tegra: dsi: Code clean-upAnimesh Kishore
Fix indentation Change-Id: I40edd117a454d0307e38bec93729cbe3f3fb86c5 Reviewed-on: http://git-master/r/61868 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Raeb8098dcf39d9a54208cee6ed14e754ea969a4f
2011-11-30video: tegra: dc: support global fbdev gamma tableDavid Schalig
Add support to set a global gamma correction table via fbdev cmap API. The 3 Tegra DC windows have their own local gamma tables, which can either override or alter the global table. Bug 868060 Change-Id: I0be1c5e4afa8fd8c010b772c7808c883c0848ab4 Reviewed-on: http://git-master/r/60201 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R7e613b1c8ac469242172bd81db9dfba25176e0c3
2011-11-30video: tegra: Allow gradual phase in of adjustments on DIDIMMatt Wagner
Adds phase_in_video field that slowly phases in changes to the pixel modification and backlight values. This should only be enabled during video as its results with content that has non-deterministic time between frame updates is sub-optimal. Bug 888294 Reviewed-on: http://git-master/r/58426 (cherry picked from commit 27478be1820740080ed4b2a583846a0bb3c572b6) Change-Id: If6fe099da1d63d742a906ec103911ebc207de644 Reviewed-on: http://git-master/r/60361 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R426a366a34085957659da342b9717bb4d7280898
2011-11-30video: tegra: Add priorities for DIDIM aggressivenessMatt Wagner
Allows DIDIM to keep track of multiple aggressiveness settings based on different priority levels. Four Priority levels are supported and the maximum priority currently specified overrules the other settings. Lowest priority is given to the default kernel value and user specified values. Bug 888292 Reviewed-on: http://git-master/r/58425 (cherry picked from commit 11a602308f6e4d0851c918933c6839b825e00dde) Change-Id: Ic1081e52693e1cdb93501640caf6f12d56f4c58d Reviewed-on: http://git-master/r/60359 Tested-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: Rea5ddc8fe837d2b57c696e80e6ca07e93b4fac38
2011-11-30video: tegra: support display board PM313Hyungwoo Yang
This change supports PM313 with 19X12 panel. The change uses PM313 in "Single input to Dual output" mode Bug ID : 822980 Reviewed-on: http://git-master/r/50215 (cherry picked from commit b83e795747fa860b5b7fb66b2067ebe4f15bcfd0) Change-Id: Iabf707ded2976e9877481c215d0b1f1940781f14 Reviewed-on: http://git-master/r/60085 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re8eadc35c75fa21b0a5f3cb3bee0e8cb77dc3238
2011-11-30video: tegra: dc: preserve gamma/csc over suspendDavid Schalig
Preserve YUV-to-RGB and gamma correction tables over suspend-resume Bug 868060 Change-Id: I5ea2224f7ab0dfbe24d741b89d727034be3ebf68 Reviewed-on: http://git-master/r/58016 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R84115584b766900004b5c6cdc3cc8d693fb0db5a
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-07 23:37:01 +0000