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path: root/drivers/video/tegra/host/nvhost_acm.h
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2012-04-03video: tegra: host: api clean-upMayuresh Kulkarni
- remove redundant 2nd argument to nvhost_module_suspend() - also remove the debug_not_idle() as it redundant after refactor of host1x code - debug_not_idle() iterates through host1x's private instance of channels to find out which client module is active (along with host1x itself). we are going to remove these instances of channels from host1x's device private data - reduce the prints during suspend Bug 871237 Change-Id: I66c7c4d8f35c157b1626784a6a27166442a50557 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/92550 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-03-15video: tegra: host: Replace license informationTerje Bergstrom
Replace license information in nvhost with GPLv2. Also adds copyright year 2012 in files which have been changed in 2012. Change-Id: I86e8ed27095df13d99e0250e57e244d531fdacec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/89735 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-02-16Revert "video: tegra: host: use runtime pm for clock management"Simone Willett
This reverts commit 961c60fe7213d92793d6072abc16f58721a33fed Change-Id: I8ef0fbaee30e94c78b8df609f729953fee6d1583 Reviewed-on: http://git-master/r/84135 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-13video: tegra: host: use runtime pm for clock managementMayuresh Kulkarni
- use runtime pm for clock management of host1x and its clients thus replacing ACM - start a delayed worker after disabling the clock if module supports power gating - in its timeout handler power gate the module after saving its context for next submit - use auto-suspend mode of runtime pm for clock management - pm core seems to keep a ref count on runtime pm thus we cannot use runtime pm's usage_count as an idicator of module idle during suspend - do not use runtime pm call-backs during system suspend. instead manage the clocks directly for context save of modules that support it - enable runtime pm only during boot-up as pm core disables it before suspending the device and enables it after resume for bug 887332 Change-Id: I3b30643e8e75c13684cf4edaaae4429c3a18d6eb Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/79186 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-01-30video: tegra: host: CPU reg read to use power managementTerje Bergstrom
CPU register read did not have access to nvhost power management. Due to this only modules that were powered on previously are actually accessible via the API. This patch refactors CPU access to: * Move mutexes to sync point, as they're sync point operations * Move register address spaces to nvhost_device * Call register read with access to the respective nvhost_device * Initialize module completely at boot-up so that register reads can be done without an initialized channel. Reviewed-on: http://git-master/r/75275 Change-Id: I0db38cef7b2cd92dc64e7f55d227bdd2fdb8f752 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/77764 Reviewed-by: Automatic_Commit_Validation_User
2012-01-12video: tegra: host: Move device data to nvhost_deviceTerje Bergstrom
Move all device data from nvhost_channeldesc, nvhost_moduledesc and nvhost_module to nvhost_device. nvhost_devices are also assigned into a hierarchy to prepare for implementation of runtime power management. Change-Id: I1e18daae8fe538086cd1f453d316e0f73e9d7d92 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/72844 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Reviewed-on: http://git-master/r/74560 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-21video: tegra: host: Register all clients as devicesTerje Bergstrom
Register all host1x client modules as devices to kernel, and a matching driver for each of them. Change-Id: Id3ab2adc860fabfcc1595e0a5dbaeb07575e19e8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/69996 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ken Adams <kadams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-12-15video: tegra: host: Prevent suspend if module is busyTerje Bergstrom
MPE is kept artificially busy if a channel is open. This is done to prevent power management during an encoding process. This patch prevents system suspend if any module is busy. Bug 911477 Change-Id: I943a7e29e473ac33e680281fcdce74618567facb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/69457 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-15video: tegra: host: Fix race in suspend/resumeTerje Bergstrom
Implement proper mutex locking for nvhost_module_suspend(). At the same time the ordering of suspend is changed to first suspend clients and then host1x. This simplifies the power management code, and makes nvhost_resume() a no-op. Bug 906607 Change-Id: I60048773944369f73094140fb16682638966c731 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/68084 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-11-30video: tegra: host: Set power state in boot-upTerje Bergstrom
Set correct power state for modules during boot-up. This is done by splitting nvhost_module_init() into two parts: preinit and init. Preinit sets correct power state, and is called for all modules during boot-up. Init calls pre-init and performs the rest of initialization of nvhost_module structure. Bug 855755 Reviewed-on: http://git-master/r/62102 (cherry picked from commit 003df5ddd4fcffca9b7456cdb1150cfc041f406c) Conflicts: drivers/video/tegra/host/nvhost_acm.c Change-Id: I14e5c4cf5d2c0c79a7492ffa98992329c045a9f5 Reviewed-on: http://git-master/r/63226 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5281ee0c00489c5fb26a602ec49498f8cc018e95
2011-11-30video: tegra: host: Separate clk and power gatingTerje Bergstrom
Separate clock and power gating from each other. There are now two timeout values related to power management: * clockgate_delay: how long to wait before clock gating * powergate_delay: when to save context and power gate If the module does not support power gating, that state is not used. System suspend also explicitly power gates all channels before suspending host1x. Bug 875675 Change-Id: Id27f0fca7914ca2a135b27f623cb67af8a94a0ef Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> (cherry picked from commit eda8a5ccc474bc60d76e241f292573a8b6f30ab6) Reviewed-on: http://git-master/r/59077 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Ra935e74f68b3d56479be1105e9858f2248ef6cd6
2011-11-30nvhost: Add host module clock functionality for T20/T30Vandana Salve
This includes Get/Set clock rate functionality. Removed the abstraction and added functionality for T20 and T30 into nvhost_acm file Bug 887263 Change-Id: I2e8ad3d96fcc3711f99f9aa42150e7d4588910fa Reviewed-on: http://git-master/r/58654 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Vandana Salve <vsalve@nvidia.com> Tested-by: Vandana Salve <vsalve@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R5aebeda335d753d23b0e8704dea949ccf0f7303e
2011-11-30video: tegra: host: Check for allocation failuresTerje Bergstrom
Adds checks for memory allocation failures, and proper propagation of error conditions. Adds clearing of pointers after free or unpin has been called to catch use after free. Bug 877551 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/54027 Reviewed-by: Antti Miettinen <amiettinen@nvidia.com> Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Gerrit_Virtual_Submit (cherry picked from commit bfbf2766d11a5f85781532ddce3a87b7ae762ba3) Change-Id: I04171ee5db6a42bb1689221d4f80d5f3d35e7399 Reviewed-on: http://git-master/r/57462 Rebase-Id: Rc9f43312c8b818869d746f4b73700d8b56e4569d
2011-11-30nvhost: Modularize ACM codeTerje Bergstrom
Refactor nvhost_acm.c so that module specific code can be separated from generic code: * Module clock and power op descriptions added to channelmap table * New module busy/idle interface added * 3D clock scaling for Tegra3 moved behind the module busy/idle API * 3D power off code moved to 3dctx where it belongs * Module power on API removed as there were no users * Get/Set rate moved to Tegra3 specific file Bug 870791 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/51275 Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> (cherry-picked from ebea06768d9c9d351a7d1c8dc6499c97f2f5002d) Change-Id: I5857c7db4bbf936a694239a4a3493f2cb95426a1 Reviewed-on: http://git-master/r/56268 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Reaccd277c8f4fe12a4f7453cc4e787334122a3b8
2011-11-30nvhost: power: Remove minimum clock rateTerje Bergstrom
As each client has its own instance of all shared clocks, minimum clock rates can be removed from nvhost and be delegated to clock subsystem. Bug 868554 Original-Change-Id: Iaa59c8a7f9bd6e992280895acf800594bc3b4508 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/49611 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R692bd4e41b2419a88ab4a50f3abd632b8f5e5e12
2011-11-30nvhost: Set default frequency to maximumTerje Bergstrom
Nvhost has a mechanism to request a frequency to be set to module clocks. When a client connects, it is given default requested frequency, which was lowest possible. When a client exits, the frequency of a module is set to maximum of all requests. As most clients do not set frequency, this caused emc to be set to lowest possible. Introduce a new field, default_rate, which is set at initialization time, and as the requested rate for each client. Client can still override this setting by using clock setting ioctl. Bug 859515 Original-Change-Id: I5c62d4cb81ac29e7c9bc9195353338f0b97ac812 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/48470 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R19cb0ee671a31e3efd156876a0723971cd7cbc15
2011-11-30tegra: nvhost: Set minimum rate for nvhost clocksAlex Frid
Define minimum rate level for nvhost clocks that is applied to all user space clients requests. Actually set minimum rate for EMC clock. Bug 859515 Original-Change-Id: I85a7e835bacb11fd794cda6916e397e0f3cbd728 Reviewed-on: http://git-master/r/48325 Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R76a20140698529ed768b4aa0517628edb98a6cb9
2011-11-30video: tegra: nvhost: add submit timeout supportChris Johnson
In this change, nvhost_cdma starts a timer (if a timeout is specified in the userctx), for the buffer at the head of the sync_queue that has not reached its syncpt threshold. If the timeout fires, nvhost_cdma initiates a channel / module reset. It then detects up to where in the sync_queue it stopped execution (based on the current HW syncpt value). For any remaining uncompleted buffers in the context, nvhost_cdma NOPs the entry and CPU incrs the syncpt to where it should be had it completed. If one of the sync_queue entries belongs to another context, it still does the syncpt incrs for this context, but via the PB as a GATHER opcode, At the end, CDMA is restarted, so buffers are refetched (either with NOP slots, or GATHERs to incr syncpts). This appears as though the buffer has completed (and the associated resources released). For testing, debugfs entries have been added under /d/tegra_nvhost force_timeout_val - set the timeout value, in ms force_timeout_channel - channel ID, were timeouts checks occur force_timeout_pid - process ID to set the userctx The idea is to set the timeout_val, then the timeout_channel (e.g. for 3D, the channel ID is 1) and then the process ID, gotten from running adb shell ps. Bug 625545 Original-Change-Id: I659e9255f1105f3439ce23e9169a19739b83ea52 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/42655 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R89759c129e2db8f7dbf83a6066fc29947f95cc27
2011-11-30video: tegra: host: 3d clock scalingIlan Aelion
Adds support for 3d clock scaling based on the 3d module idle time percentage. Original-Change-Id: I4d3a70d372b9a8bd6f999e71e135fcd35673e18f Reviewed-on: http://git-master/r/41250 Tested-by: Ilan Aelion <iaelion@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R64b86250fce24e3b43d70ffd316e9de518eb24ba
2011-11-30video: tegra: host: Add ioctl to set/get clk ratePrashant Gaikwad
Host modules are initialized to max rate. Not all use cases require clocks at max rate, which increases the power consumption. Modules from user space can request for the lower clk rate using this ioctl. Bug 850467 Original-Change-Id: I1c7a8dfd159460e7c5a27813e3a08a992a20c132 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/44579 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Rebase-Id: R0cffab971c5ac6adde28af4777354a1ecae4c54d
2011-11-30video: tegra: host: separate the different kinds of ACM timeoutsChris Johnson
Let the delay in making sure a module is idle for some amount of time before powering it down be module specific. This typically occurs at the end of a INTR_ACTION_SUBMIT_COMPLETLETE. Some modules have more work (e.g. 3D) to power down, so should have a longer delay than a module with a lower latency (e.g. 2D). This change adds the infrastructure a subsequent change will assign different values. Make use of a separate #define for the timeout used in waiting for a system suspend to go idle. Original-Change-Id: I4d675375e7c2ad841168449bd7f6db3d38d6d6c3 Reviewed-on: http://git-master/r/40044 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rdacbc9caab0bf60064d6c27a7c919b9a759da97a
2011-11-30video: tegra: host: Work towards enabling 3d power gatingShashank Garg
Fixed clock enable/disable balance issue. Added code for power gating 3d1. Power gating still disabled as it won't work for T20 or T30 A01. Original-Change-Id: Idcc5fd9d21d43c796bbeeac378a46f9eca3ab1c9 Reviewed-on: http://git-master/r/31142 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Shashank Garg <sgarg@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R80f171724518d94364e169416788d4ce577b3a66
2011-11-30video: tegra: host: Add emc clock to gr2d, gr3d and mpe modulesAndrew Howe
Add emc to the set of units to power-manage. Original-Change-Id: I9d9624ce3673fc005447df3356867b37f4a75006 Reviewed-on: http://git-master/r/24158 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I75a48f19bd94b832b9f70707806aef26a53cae45 Rebase-Id: Rac3067ac41491e4e3a63f64ff87df851b2e9bc6c
2011-11-30video: tegra: host: Revert previous mergeKishore Kumar Kunche
The proper host driver patches will follow, based on the pre-merge state. also includes: [ARM]: tegra: host disable MPE auto power gate Fixes Random CRC failures on T30. Original-Change-Id: Ib42b8efc30d9e8910934bb9350e8170c9096e614 Reviewed-on: http://git-master/r/18663 Original-Change-Id: I985bfbef277db4d533b67ee674db41d4a8daa18a Reviewed-on: http://git-master/r/24296 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: Iec8ea27d5648b7f9f8ac51f2aca79b5e7cf44879 Rebase-Id: Rcfb56b73d820c182354e6b91afa219148e4000b0
2011-11-30video: tegra: host: add suspend instrumentationVarun Wadekar
cherry-picked and merged http://git-master.nvidia.com/r/6641 and http://git-master.nvidia.com/r/7081 from tegra-2010-07 branch Original-Change-Id: I926062d2d949b4095ad1d5c88145c99a29cec122 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/13795 Reviewed-by: Andrew Howe <ahowe@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R5fbb1564c97e1622143a1eacfed8cca73f67d577
2011-11-30video: tegra: host: Force memory bus to full when using 2d, 3d or mpeColin Cross
Change-Id: I7138af5d26c3f406537bc4b2bc4bb052de37f7bf Signed-off-by: Colin Cross <ccross@android.com>
2011-11-30video: tegra: host1x driverGary King
the graphics and display hardware on tegra SoCs is accessed through a command DMA front-end called host1x host driver clients place commands into memory objects called streams, and submit a stream on one of 8 channels: the assignment of streams-to-channels depends on the hardware module(s) programmed by the stream: for example, all streams which program the 3D hardware are submitted on channel 1. the host1x hardware includes two synchronization primitives to allow command streams to synchronize access to memory or to hardware engines shared across channels (e.g. the 2D blitter): sync points and module mutexes. both primitives can also be used to synchronize with the CPU. the host1x driver performs power management for all modules behind the host block: once a module is idle (i.e., the last stream which accesses it has completed, indicated by a syncpoint) and has remained idle for an extended period of time, the module's clock (and power gate island, if the module is uniquely power-gated) is disabled, and will be automatically re-enabled when a new stream is submitted for that module. includes channel debugging support originally implemented by Erik Gilling <konkers@google.com> Original Author: Antti Hatala <ahatala@nvidia.com> Signed-off-by: Gary King <gking@nvidia.com> Change-Id: Idf0ecc8e7710f3839903a9fbfbe5650990a96b2c
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