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Add parameters in host1x nvhost_device on
* number of sync points
* number of wait bases
* number of channels
* number of mlocks
* client managed bitmask
* naming of sync points
Add automatically generated headers and use symbols from them to
access hardware.
Move host1x device definition from generic host1x to SoC specific
source files t20.c and t30.c.
Bug 982965
Change-Id: Ibec84be22d75b363900d10bcbd59d4d8321d54a1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104974
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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- currently, nvhost_master holds the reference to struct
chip_support
- the struct chip_support hides the chip specific implementation
for channel submit, cdma, push buffer operations etc. so
it exposed all the internal structures through nvhost_master
- move chip_support to be a part of nvhost_bus since it only has
function pointers to chip specific api implementations
- nvhost_master is host1x device specific private data so
ideally it should not hold reference to chip specifics
Bug 871237
Change-Id: I4f3f48ee5fc47a90288d110ea8eef905150275a0
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/94421
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Split host1x_channel_submit() into subfunctions.
Bug 926690
Change-Id: I8be55cbc9d25ee76c758a918de4a9bb27e2ea846
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/90626
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Replace license information in nvhost with GPLv2. Also adds
copyright year 2012 in files which have been changed in 2012.
Change-Id: I86e8ed27095df13d99e0250e57e244d531fdacec
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/89735
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Adds checks for memory allocation failures, and proper propagation
of error conditions. Adds clearing of pointers after free or unpin
has been called to catch use after free.
Bug 877551
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/54027
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
(cherry picked from commit bfbf2766d11a5f85781532ddce3a87b7ae762ba3)
Change-Id: I04171ee5db6a42bb1689221d4f80d5f3d35e7399
Reviewed-on: http://git-master/r/57462
Rebase-Id: Rc9f43312c8b818869d746f4b73700d8b56e4569d
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Context to be restored needs to be reference counted. Otherwise a
sequence of process submitting the work and exiting before hardware
executes the work can result in access to memory that is not mapped
anymore.
Bug 870787
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/55706
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 02331c00e0233c09fdeea8cce65f2c0abc50d358)
Change-Id: I4ff6095932e0db709e01645bf6dc9fe5e496706f
Reviewed-on: http://git-master/r/56198
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R18960ec5074c7e7217a55b6fb40b8eac51325eb8
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The only warnings left are one for
"./nvhost_cdma.c: 609: WARNING: consider using a completion"
and all "over 80 char line" warnings.
Change-Id: I5aa113dac1deb60570c326976baba96386b041ec
Reviewed-on: http://git-master/r/53842
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R83200f349310910a04705d0f7a94d8163e0666fe
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Original-Change-Id: Ia203886a3b013612b4159393ff43a25a313d1ece
Reviewed-on: http://git-master/r/35911
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R01b763362c13e09111f60700c3d3a7d2a9a3fc1c
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Google's 2.6.36 nvhost driver branched from NVIDIA's 2.6.32 nvhost at some
point before it was actually committed to 2.6.32, but the former's
original commit included some fixes that were added to the latter after
that. Confusing... Also Google's version has some changes that we like
so they will remain, but that makes merging difficult.
Anyway, this commit brings the rest of our 2.6.32 changes into 2.6.36
and cleans it up a bit. It might be nicer to break this up into a load
of smaller commits but it turned out to be very difficult to do that.
Original-Change-Id: I828b624b089b811d6130173e55258da8f52a5cc2
Reviewed-on: http://git-master/r/12563
Tested-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Wei Sun <wsun@nvidia.com>
Original-Change-Id: I72fbcff16ec6df62cc7299052a84b91db252c8d1
Rebase-Id: Rb3aa29f2ecbecf889bbc6ccf7d0b26925f7b94fb
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the graphics and display hardware on tegra SoCs is accessed
through a command DMA front-end called host1x
host driver clients place commands into memory objects called
streams, and submit a stream on one of 8 channels: the assignment
of streams-to-channels depends on the hardware module(s) programmed
by the stream: for example, all streams which program the 3D
hardware are submitted on channel 1.
the host1x hardware includes two synchronization primitives to
allow command streams to synchronize access to memory or to
hardware engines shared across channels (e.g. the 2D blitter):
sync points and module mutexes. both primitives can also be
used to synchronize with the CPU.
the host1x driver performs power management for all modules
behind the host block: once a module is idle (i.e., the
last stream which accesses it has completed, indicated by
a syncpoint) and has remained idle for an extended period
of time, the module's clock (and power gate island, if the
module is uniquely power-gated) is disabled, and will be
automatically re-enabled when a new stream is submitted for
that module.
includes channel debugging support originally implemented
by Erik Gilling <konkers@google.com>
Original Author: Antti Hatala <ahatala@nvidia.com>
Signed-off-by: Gary King <gking@nvidia.com>
Change-Id: Idf0ecc8e7710f3839903a9fbfbe5650990a96b2c
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