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page list array size greater than PAGE_SIZE should use vmalloc.
Change-Id: Ic03668ba7ff716bfb3cc08aaef5f86214ee0a9df
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116875
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit ddacaacd2a9fff10187e026eaa0d898694eeb95f)
Reviewed-on: http://git-master/r/118194
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NVMAP_CONVERT_CARVEOUT_TO_IOVMM is only available for IOMMU less SoCs.
This was introduced by:
commit b8b0b4c42fc77d94b8deadaa46f795784f3bbb5e
video: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig
Bug 1017112
Change-Id: I2a6f101b15085ece600f77690bc77adc042eb29f
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/117976
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Meghana Kankarej <mkankarej@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.
Bug 1013172
Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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- host1x_save_context() explicitly updated the ref count on context
- with the re-factoring of nvhost_job code, nvhost_job_alloc()
takes a ref count on context
- this caused the explicit ref count in host1x_save_context()
redundant and lead to memory leak. hence remove it
Bug 1015924
Change-Id: Id18c74412e8659b60288700972690d1b895de4c1
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/116409
(cherry picked from commit c98d0cfbbdacdda8e540b5d9e0d513e279b3b2f5)
Reviewed-on: http://git-master/r/117326
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This was accidently reverted to be set to max with commit 9774bbe31a.
With 2d clock at max, there is a hit on video power numbers.
Change-Id: Iaf73c6f7800d56229d35fb6a2b00f61d460e986d
Reviewed-on: http://git-master/r/117589
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
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Send host commands to panel during vertical blanking
of a frame. Implementation is generic enough to
handle both long and short packets.
Bug 1009863
Change-Id: I9a80641df2d8b67eb3649d220c028543b246a5f3
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/114990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Ported Peter's original change 86413 to main.
board-p1852-panel.c:
Add support for primary and secondary LVDS displays, and secondary HDMI display.
board-p1852-pinmux.c:
Add configuration for HDMI and LVDS
board-p1852.c:
board-p1852.h:
Support for determining which p1852 sku is in use
hdmi.c:If no edid retrieved, but there's a hardwired mode, enable it
(used to support HDMI->LVDS output on p1852 sku 2)
devices.c:added secondary display data.
Bug 977859
Bug 994011
Change-Id: Ide8fb6bf7dd873b1d50269fb98d7c1687e4d9073
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/100438
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This patch allows nvmap to use the standard IOMMU API as its backend
engine instead of the legacy tegra IOVMM by Kconfig.
Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config, and it
automatically disables IOVMM, instead.
Change-Id: I71112ef8072591aac4a93075623ca31c8851a960
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Without the CONFIG_SWITCH enabled, there are multiple unused
variable warnings that get treated as error.
bug 949219
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I39512367fa4bbd3b00a435d0d7a31cfede9e712f
Reviewed-on: http://git-master/r/115428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
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Use the right number of parameters for tegra_dc_calc_fresh() when called from
print_mode(). This code is only used for debug.
Change-Id: I4d0bb8b1700f670644057039fe8d0bc315b27c1d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/115485
Reviewed-by: Automatic_Commit_Validation_User
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After making pclk output ahead of LVDS_SHDN# , data output is later than
panel ready then caused partial black screen. Force triggered data output to
get it fixed.
Bug 972377
Bug 976081
Bug 1001434
Change-Id: Icd455d7439f622e46295158a5435286c521526aa
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/113164
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This is similar to commit a62be5b5595ad86411ced81bceeb3d6a693426d2
pushed for rel-14 branch.
Bug 1004341
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/111227
(cherry-picked from fbfce3106da8dad18948103c812bdd9d45ffdd06)
Change-Id: Ib459094fd6499b3cc63bc534bf36e57dc98ce62b
Reviewed-on: http://git-master/r/114584
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Allows overidding the default disp mode without having to recompile
the kernel. Boot args can be specified in the following format:
disp_params=<rgb|hdmi|dsi>:pclk,h_active,v_active,h_ref_to_sync,
v_ref_to_sync,h_sync_width,v_sync_width,h_back_porch,v_back_porch,
h_front_porch,v_front_porch;<rgb|hdmi|dsi>:pclk,h_active,...
Bug 969088
Change-Id: Id0acf608de145493f6749d5b799d4bbb8162ba72
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/104604
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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- Adding flag to treat warning as error.
- Handled warning of unused function.
bug 949219
Change-Id: Ic6edfc28bae95b8395cbd51e80f14aa4aa663f61
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/114624
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Introduce IOMMU backend functions which use DMA API familiy
internally. Replace tegra_iovmm_*() API with arm_iommu_*iova*() and
dma_(un)map_page_(at)().
Change-Id: I0b014926ffedc12bf8f868b163982c6082d050b6
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114216
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Allow tegra_iovmm_alloc_client() to take struct device * instead of
const char *name w/ __tegra_iovmm_alloc_client(). This is necessary to
support IOVMM and IOMMU simultaneously.
Change-Id: I18df5001bfe0ece8f9f15b636eb11def9f228dfb
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114215
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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This change is for programming VI and EPP through ISP channel
to support RGB input and dual video capturing.
1. Added syncpt in the ISP channel to submit the channel.
2. Added epp clock to use VI2EPP for RGB capture.
Note: To use this channel, EPP should be free from 2D.
Bug 988546
Change-Id: I17fe278c9325aac2ea1e29cbaf50c8a4499d8551
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/113965
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- Handled warning of, possible use of uninitialized variable and unused
function.
bug 949219
Change-Id: I0d7d345e66774f08e52a12e653a5e7aa6a7a8591
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/113905
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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- Handled warning of unused label.
bug 949219
Change-Id: I72e22063b199562c4a4c065419c1656e3e8ff7ff
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/113880
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Freeze vblank worker while suspending by adding the work into
system freezewq. This eliminates a kernel panic caused by nvsd
reading brightness valuesfrom display while clock gated.
Bug 1006180
Bug 1003969
Bug 1003730
Change-Id: Ice9bfb18e5c826ae063c2b901421b1047ff9d2f0
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/112880
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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- Gpio freeing function does disabling job.
- If backlight pin is an sfio, we have to claim the gpio. So that we can use
the gpio api's to configure it as sfio.
bug 984440
bug 858120
Change-Id: I583bf4a486d2d9a6d9b78ee459b1962379eafd3b
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/109564
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Moved mode setting code into mode.c
Move window code info window.c
Moved clock related code into clock.c
Moved LUT and gamma related code into lut.c
Moved csc(color space conversion) into csc.c
Removed unnecessary static function prototypes from header.
Moved many short inline functions to dc_priv.h
Cleaned up copyright headings.
Cleaned up formatting and indent in all files.
Fixed build warnings.
Bug 870907
Change-Id: I6ccc37150191765394f0b5629423eafd4e5e5792
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/111371
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Send specified DC frames to 720p panel during power up/down sequencing.
Bug 997484.
Change-Id: I3927e98322ec93f68cabf635c71485b64750d7f9
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/109917
(cherry picked from commit e1d10bc056031fbc2f68101978d76317c44fc7af)
Reviewed-on: http://git-master/r/111944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Force serialization of 2D jobs by inserting a host wait for previous
maximum at the beginning of the job.
Bug 1002293
Change-Id: I667ad4565cc32186ea7ccf16845c68d1b1bbdf78
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/111475
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Daniel Parker <dparker@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Francis Hart <fhart@nvidia.com>
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- Grouping variables around bitwise operators for safe operation.
bug 949219
Change-Id: I8edf7fb241eb79ac07b63ab856d206fc453308f1
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/109577
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This patch removes the possibility to disable the second GPU of T30
using a fuse.
Change-Id: I73cd4b7bd52035322e5fc1b040ffeda6d600a90e
Reviewed-on: http://git-master/r/109434
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: I6584c856356d6be123a66731bde414e4925ffe07
Reviewed-on: http://git-master/r/111184
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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We support 3 different aggressiveness levels of disabling DSI runtime.
The larger the aggressive level is, the higher DSI power we can save.
Bug 936337
Change-Id: Idadcb49b364e29ddd0a05dde1c6d3dfda6cd493e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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It seems with building with different tool chains, when compiling
nvhost_acm it doesn't end up with drivers/video/tegra/host in its
include path and therefore it fails to find some header files.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ic3d72c863d4b5e501222d21077ba9735315ec65c
Reviewed-on: http://git-master/r/110592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 961009
Change-Id: Ifdcc7bc8a40d270e70a63329f46caff541bf01e2
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Part of panel settings need to be done before/after pixel clock
is disabled. Add support for these actions to meet panel
spec.
bug 976081
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102542
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit dcecdc64d4d0fd4d9f69df52c9d200dfbf1dd7fc)
Change-Id: Ibfede68d67a4815156f73c2d1cdca90f3f771755
Reviewed-on: http://git-master/r/110296
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- add public APIs for power & sync-point management
- all these APIs end with string _ext
- all these APIs can be found in linux/nvhost.h
- all these APIs take nvhost_device as first argument
- all these APIs are based on the fact that host1x hardware
driver is parent of all the host1x client driver
- this allows clients of host1x which are outside host1x
driver code to just include nvhost.h & use host1x driver
interfaces
- this also hides the implementation details of power &
sync-point inside host1x driver code
- move sync point ids for dc and nvavp to nvhost.h
Bug 961009
Change-Id: I1a9ca074df87656c4d4bd246853e039a7850d56a
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109219
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Bug 1000789
Bug 1003730
Change-Id: I7fbd703dde2044f2790e6a9b356ef8dca89ad8f3
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/110146
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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During programming of a frame or at frame end, force the use of the new EMC
bandwidth instead of the previous frame's bandwidth.
Moved copy of new_bandwidth out of tegra_dc_set_latency_allowance() to match
the semantics of the rest of tegra_dc_program_bandwidth().
bug 949015
Change-Id: I881f3a2c75f3438e3bbb3208b518f15a4574bc91
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/110149
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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Compile power management suspend and resume functions only when
CONFIG_PM is enabled.
Change-Id: If349984d62ed002594ba60ac25cd4dddd956aa6c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109425
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: I2a5f0c9305bd53c42df181556d97efa5d6792ad7
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
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When a DC window is being released, a NULL flip is used to indicate
that the window should be disabled. To disable a window, 0 is
written to WIN_OPTIONS.
The MC_DECERR on window shutdown is a symptom of forgetting step 2)
below when disabling windows, leaving no indication that there is
anything to wait for. This causes DC to erroneously unpin the
scanout buffer while the buffer is still actively being used.
Summary of flip (window update) synchronization in DC:
1) program some window registers
2) set win->dirty=1
3) schedule the activation of the registers
4) request VBLANK or HBLANK interrupts
5) wait for win->dirty==0
In the trigger_windows ISR (every VBLANK or HBLANK):
1) if there is no window update pending in HW, clear dirty flag to
indicate that ACTIVE registers are up-to-date.
bug 991572
bug 995614
bug 989119
bug 983251
bug 960424
bug 866711
Change-Id: I8b710aac874b202838c3989608b7e0bd15425382
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/109370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Make all chip specific functions static. Include the chip specific
functions in SoC files after including the hardware headers. This
makes the chip specific functions to be compiled per SoC, and with
the correct hardware definitions.
Bug 982965
Change-Id: I4774d4dc351951cb886d9d4da66cf021f3f0121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/107581
Reviewed-by: Automatic_Commit_Validation_User
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Give names to the structures inside nvhost_chip_support. This way
they can be referred to individually.
Change-Id: I9b727bfc232d11957a8bd3e3570583d47cff778e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109103
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Remove unused functions in CDMA and debug. They were left unused
when debug dump started using sync queue instead of channel
registers for detecting current position.
Change-Id: Ib1f0bc8f702667d0453079e6d5f5d8ca08f8db09
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109102
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Call drain fifo and save context functions via nvhost_chip_support.
Earlier client drivers called into host1x code directly, which
makes each client driver SoC specific.
Change-Id: I4f805abad21012e59e11bf6a98fa46441c71c51a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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this commit exposes following power management parameter through
sysfs:
- clockgate_delay: delay after which module is clock gated after
it goes idle. this read/write attribute & unit is ms.
- powergate_delay: delay after which module is power gated after
it is clock gated. this is read/write attribute & unit is ms.
- refcount: current reference count on the module. this is
read-only attribute.
path is: /sys/devices/host1x/<device-name>/acm/ where
<device-name> = name of device node like gr2d or gr3d etc
Bug 845598
Change-Id: I6011eb90ee85b5fc576320272e657ce31f9e264d
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/108827
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Francis Hart <fhart@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove version from nvhost_device name, and use a new field,
version, to distinguish between IP versions. This restores the
sysfs API for 3D clock scaling back to its original path.
Change-Id: I444ef728b7cab9e5ea3a08f3c7be0f1661209686
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/108501
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Move #include directives for nvhost headers from dc_priv.h to the
source files that need the #includes. This allows #including
dc_priv.h without access to all nvhost headers.
Also adds nvhost to the #include path of dc to allow making dev.h a
stub in a later commit.
Bug 982965
Change-Id: Icfe7084d295f57926195b178174f81047eb01187
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/108225
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add parameters in host1x nvhost_device on
* number of sync points
* number of wait bases
* number of channels
* number of mlocks
* client managed bitmask
* naming of sync points
Add automatically generated headers and use symbols from them to
access hardware.
Move host1x device definition from generic host1x to SoC specific
source files t20.c and t30.c.
Bug 982965
Change-Id: Ibec84be22d75b363900d10bcbd59d4d8321d54a1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104974
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Move the device structures to the driver source code files. Register
all nvhost_device's in one loop which is called from board file.
host1x driver code is moved to live under host1x, too. This causes
a need to add host to include path of tegradc and nvavp.
Bug 982965
Change-Id: If99cf9d1ef6bc24663ee8294c19370429ed04ca7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The tegra_dc_trigger_windows function was improperly using the
WIN_x_UPDATE bits to determine when a flip has occurred instead of the
WIN_x_ACT_REQ bits. Without this change, it's possible for the postflip
syncpoint for a buffer to get incremented before it actually flips.
Still need to figure out why that's even possible...
Fixes bug 902955
Change-Id: I67ba093a0114646977cc8cb95a040ec4178cebfc
Reviewed-on: http://git-master/r/65389
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nate Huang <nhuang@nvidia.com>
Tested-by: Nate Huang <nhuang@nvidia.com>
Reviewed-on: http://git-master/r/98024
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 990586
Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/107714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Add configuration variable for default timeout for clients. Set it to
30s for silicon and infinity for simulation.
Change-Id: I08c1fd234f738c4919adfe482dfc50948dc2f862
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Bug 936337
Bug 899053
Change-Id: I2b3d8cfc8a00881338c1e17d03f2844d15ba7d3e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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