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Change-Id: I6584c856356d6be123a66731bde414e4925ffe07
Reviewed-on: http://git-master/r/111184
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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We support 3 different aggressiveness levels of disabling DSI runtime.
The larger the aggressive level is, the higher DSI power we can save.
Bug 936337
Change-Id: Idadcb49b364e29ddd0a05dde1c6d3dfda6cd493e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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It seems with building with different tool chains, when compiling
nvhost_acm it doesn't end up with drivers/video/tegra/host in its
include path and therefore it fails to find some header files.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ic3d72c863d4b5e501222d21077ba9735315ec65c
Reviewed-on: http://git-master/r/110592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 961009
Change-Id: Ifdcc7bc8a40d270e70a63329f46caff541bf01e2
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Part of panel settings need to be done before/after pixel clock
is disabled. Add support for these actions to meet panel
spec.
bug 976081
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102542
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit dcecdc64d4d0fd4d9f69df52c9d200dfbf1dd7fc)
Change-Id: Ibfede68d67a4815156f73c2d1cdca90f3f771755
Reviewed-on: http://git-master/r/110296
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- add public APIs for power & sync-point management
- all these APIs end with string _ext
- all these APIs can be found in linux/nvhost.h
- all these APIs take nvhost_device as first argument
- all these APIs are based on the fact that host1x hardware
driver is parent of all the host1x client driver
- this allows clients of host1x which are outside host1x
driver code to just include nvhost.h & use host1x driver
interfaces
- this also hides the implementation details of power &
sync-point inside host1x driver code
- move sync point ids for dc and nvavp to nvhost.h
Bug 961009
Change-Id: I1a9ca074df87656c4d4bd246853e039a7850d56a
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109219
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Bug 1000789
Bug 1003730
Change-Id: I7fbd703dde2044f2790e6a9b356ef8dca89ad8f3
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/110146
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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During programming of a frame or at frame end, force the use of the new EMC
bandwidth instead of the previous frame's bandwidth.
Moved copy of new_bandwidth out of tegra_dc_set_latency_allowance() to match
the semantics of the rest of tegra_dc_program_bandwidth().
bug 949015
Change-Id: I881f3a2c75f3438e3bbb3208b518f15a4574bc91
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/110149
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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Compile power management suspend and resume functions only when
CONFIG_PM is enabled.
Change-Id: If349984d62ed002594ba60ac25cd4dddd956aa6c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109425
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: I2a5f0c9305bd53c42df181556d97efa5d6792ad7
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
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When a DC window is being released, a NULL flip is used to indicate
that the window should be disabled. To disable a window, 0 is
written to WIN_OPTIONS.
The MC_DECERR on window shutdown is a symptom of forgetting step 2)
below when disabling windows, leaving no indication that there is
anything to wait for. This causes DC to erroneously unpin the
scanout buffer while the buffer is still actively being used.
Summary of flip (window update) synchronization in DC:
1) program some window registers
2) set win->dirty=1
3) schedule the activation of the registers
4) request VBLANK or HBLANK interrupts
5) wait for win->dirty==0
In the trigger_windows ISR (every VBLANK or HBLANK):
1) if there is no window update pending in HW, clear dirty flag to
indicate that ACTIVE registers are up-to-date.
bug 991572
bug 995614
bug 989119
bug 983251
bug 960424
bug 866711
Change-Id: I8b710aac874b202838c3989608b7e0bd15425382
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/109370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Make all chip specific functions static. Include the chip specific
functions in SoC files after including the hardware headers. This
makes the chip specific functions to be compiled per SoC, and with
the correct hardware definitions.
Bug 982965
Change-Id: I4774d4dc351951cb886d9d4da66cf021f3f0121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/107581
Reviewed-by: Automatic_Commit_Validation_User
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Give names to the structures inside nvhost_chip_support. This way
they can be referred to individually.
Change-Id: I9b727bfc232d11957a8bd3e3570583d47cff778e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109103
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Remove unused functions in CDMA and debug. They were left unused
when debug dump started using sync queue instead of channel
registers for detecting current position.
Change-Id: Ib1f0bc8f702667d0453079e6d5f5d8ca08f8db09
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109102
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Call drain fifo and save context functions via nvhost_chip_support.
Earlier client drivers called into host1x code directly, which
makes each client driver SoC specific.
Change-Id: I4f805abad21012e59e11bf6a98fa46441c71c51a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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this commit exposes following power management parameter through
sysfs:
- clockgate_delay: delay after which module is clock gated after
it goes idle. this read/write attribute & unit is ms.
- powergate_delay: delay after which module is power gated after
it is clock gated. this is read/write attribute & unit is ms.
- refcount: current reference count on the module. this is
read-only attribute.
path is: /sys/devices/host1x/<device-name>/acm/ where
<device-name> = name of device node like gr2d or gr3d etc
Bug 845598
Change-Id: I6011eb90ee85b5fc576320272e657ce31f9e264d
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/108827
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Francis Hart <fhart@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove version from nvhost_device name, and use a new field,
version, to distinguish between IP versions. This restores the
sysfs API for 3D clock scaling back to its original path.
Change-Id: I444ef728b7cab9e5ea3a08f3c7be0f1661209686
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/108501
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Move #include directives for nvhost headers from dc_priv.h to the
source files that need the #includes. This allows #including
dc_priv.h without access to all nvhost headers.
Also adds nvhost to the #include path of dc to allow making dev.h a
stub in a later commit.
Bug 982965
Change-Id: Icfe7084d295f57926195b178174f81047eb01187
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/108225
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add parameters in host1x nvhost_device on
* number of sync points
* number of wait bases
* number of channels
* number of mlocks
* client managed bitmask
* naming of sync points
Add automatically generated headers and use symbols from them to
access hardware.
Move host1x device definition from generic host1x to SoC specific
source files t20.c and t30.c.
Bug 982965
Change-Id: Ibec84be22d75b363900d10bcbd59d4d8321d54a1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104974
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Move the device structures to the driver source code files. Register
all nvhost_device's in one loop which is called from board file.
host1x driver code is moved to live under host1x, too. This causes
a need to add host to include path of tegradc and nvavp.
Bug 982965
Change-Id: If99cf9d1ef6bc24663ee8294c19370429ed04ca7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The tegra_dc_trigger_windows function was improperly using the
WIN_x_UPDATE bits to determine when a flip has occurred instead of the
WIN_x_ACT_REQ bits. Without this change, it's possible for the postflip
syncpoint for a buffer to get incremented before it actually flips.
Still need to figure out why that's even possible...
Fixes bug 902955
Change-Id: I67ba093a0114646977cc8cb95a040ec4178cebfc
Reviewed-on: http://git-master/r/65389
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nate Huang <nhuang@nvidia.com>
Tested-by: Nate Huang <nhuang@nvidia.com>
Reviewed-on: http://git-master/r/98024
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 990586
Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/107714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Add configuration variable for default timeout for clients. Set it to
30s for silicon and infinity for simulation.
Change-Id: I08c1fd234f738c4919adfe482dfc50948dc2f862
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Bug 936337
Bug 899053
Change-Id: I2b3d8cfc8a00881338c1e17d03f2844d15ba7d3e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Abstract nvmap support to one file, and use it via function pointers
from other parts of nvhost.
Bug 965206
Change-Id: I4e5e7de4271e0797d117ac8210af4732b6018973
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105665
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Initialize host1x generic irq at bootup.
Bug 971602
Change-Id: I03fb426a0538c1549fdb5360166c4e4b516e75d6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/106167
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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Clear out all overlays and disable DC on .shutdown
Change-Id: I4bc78fddb0ed8bd621733df191f305ecb279e3f7
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/106549
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Move bandwidth calculation logic into its own file.
Change-Id: I57f58a6399805eede8783fea922c6f07dcbd54cb
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/106291
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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removed tegra_dc_hdmi_mode_equal.
It was replaced by tegra_dc_hdmi_cvt_mode_equal
Change-Id: I7988d02a1c0b91eed88fdf573d8c993b6ee7be8d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/106074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
GVS: Gerrit_Virtual_Submit
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remove and rename unused variable in tega_dc_get_stride
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Change-Id: I0d101de22c08609f9727469ad7e4708de8de59ef
Reviewed-on: http://git-master/r/106072
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Conflicts:
drivers/media/video/tegra/nvavp/nvavp_dev.c
Change-Id: I7779b0ce58004f80cccf6193148ac49551ce5da5
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The function tegra_dc_host_trigger() is no longer used, removing it.
Change-Id: I929450bdf0224779910e8569bc8d1b3edb93f12d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/106075
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Added void to function prototypes and initialized some variables.
Change-Id: I69250f5e17560f900fffddec9697e496af6ad4d2
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/106073
Reviewed-by: Automatic_Commit_Validation_User
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Bug 992947
Change-Id: I0d1ecc9f8f042956cbe631779260a38573936616
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/105776
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Change to correct behavior for changing settings while
phase_in_adjustments is set. Manual K values should not be overridden
in the case where DIDIM was on and aggressiveness was changed.
They should maintain state to avoid flickering.
Bug 992995
Change-Id: Ic35c32a0fd5c6caaeee147dff114649ea25770c5
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/105523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Change-Id: I762929a0d72a0b26aa1451a946993f4a57806fd4
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/104292
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Remove BUG_ON()s in error cases:
* If IOCTL size is too large, return error instead
* If sync point id is out of range, return error. Prevents panics in
sanity checks nvhost_cdma.
Bug 993642
Change-Id: I3cfa7a23dc557c811e20b726885f82666437de7f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105866
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Register access (read/write) to modules MPE, ISP and VI lack sanity
check for the register number. Add checks to ensure only aperture is
accessed. Also make sure that the check accounts for wrapping of
values of offset and count.
Also fixes the register offset for reads which are done in multiple
blocks.
Bug 992938
Change-Id: I35f30cbd1dda31956286e48c5995b24fd262d1ae
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105585
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Add config option to enable/disable cache maintenance by set/ways.
Change-Id: Ie795e19650b2c05cd4789dbc1e8f04f9edc70bf1
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/104290
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
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Remove nvhost dsi driver. Real dsi driver is in tegradc.
Bug 982965
Change-Id: I86044ba586d796ae8d049471a154dcf37bd0e6ed
Reviewed-on: http://git-master/r/104975
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Convert the jiffies to msecs when assigning a channel the default
timeout.
Change-Id: If9b6fb7c695e9621a0c50d99d4d1362b6dd214b6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105022
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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When a submit fails, the related nvhost_job is not freed. Add an
explicit free. Also, 3D is mapping the save buffer, but it is not
unmapped.
Bug 991972
Change-Id: Ie335adb5e64f54557e76d12dfb6a9a1557781e8d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105152
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Dump contents of sync queue when debug dump is requested, either
because of a stuck sync point, or when the debugfs entry is accessed.
Exclude FIFO from normal debugfs dump. Dumping FIFO is invasive and
actually changes how the channel behaves. It's safe to dump only when
system is in fault condition.
Change-Id: I12c68e8186acd7bd17e4ab52b2589f765396ed17
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104970
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Implement per channel counter for jobs in each priority level. If
there are jobs active with higher priority than the one being
submitted, throttle.
Bug 926690
Change-Id: I5fed341e3f248325873b31d1c53bf57bf0a78074
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104939
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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Remove nvmap_pin_array() and nvmap_patch_word() and their utility
functions.
Bug 965206
Change-Id: I217a427934b0b99b5252b33ab3ac4eaaa8c7e076
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104451
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Replace usage of nvmap_pinarray_elem with own nvhost_reloc and
nvhost_reloc_shift structs.
Bug 965206
Change-Id: I90618d8a34d79156d8880d9925dadbf416353811
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104450
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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Job pinning and relocation already maps the gather buffers to
kernel memory. Move waitchk to be done at the same time so that we
do not need to re-map the memory to patch expired waits.
Bug 965206
Change-Id: I23634b501a45de080200e57d3debf267b39fea38
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104415
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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This reverts commit 5bdd03b21f625d0a07c66e4894b79e557287a3a1.
The reverted commit kept vcore at 1.2 volts whenever 2D engine is on
and increased power consumption for use cases that utilize 2D but
doesn't require its full speed.
Bug 979545
Change-Id: I4297ab1fb83558501ff620952284c8590dc5f1dd
Signed-off-by: Wen Yi <wyi@nvidia.com>
Reviewed-on: http://git-master/r/104293
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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