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jiffies_to_msecs used instead of msecs_to_jiffies. This mistake has been fixed.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Added "x_mem=" option (e.g. video=mxcepdcfb:E60,bpp=16,x_mem=10000)
to configure extra FB memory for X-accel.
Signed-off-by: r80085 <thomas.peng@freescale.com>
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When update X coordinate is an odd number and the update region width
is a multiple of 8, the screen shows garbage due to a bug in how the
driver handles this corner case. The fix is to identify and handle
this case in the driver.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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vpu: free the IRQ in the remove function and remove the MXC_INT_VPU
define dependency.
kpp: remove MXC_INT_KPP define dependency
nand: remove the MXC_INT_NANDFC define dependency
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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ipu: pass csi clock in platform data
ipu: use ipu hw rev instead of chip version
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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In rotation case, we need to swap width and height in HW_PXP_OUTSIZE.
It can be done in PxP driver. However, since EPDC driver did this swap itself.
Here, just do so for V4L2 to make things easy to go.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add ePxP V4L2 output driver, which calls ePxP DMAEngine internally.
Support rotation, overlay, alpha-blending, colorkey, etc.
Signed-off-by: Robby Cai <R63905@freescale.com>
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I2C transfer will be always fail if miss ack happen.
i2cdump will be fail after i2cdetect.
Reset i2c module when MISS ACK irq issue.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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turn off PxP clock when PxP is inactive for about 4s.
turn on PxP clock when a new PxP task is submitted.
Signed-off-by: Robby Cai <R63905@freescale.com>
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In order to provide more flexibility to the user, the pan API should not
automatically trigger a full-screen panel update. No update will
be performed, and the user will have to submit a SEND_UPDATE to update
the screen after panning.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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The driver can not dump registers during probe time because
some clocks needed for register read/write are still not enabled
or the system may hang.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Due to the SDIO interrupt of esdhc is implemented in edge trigger
mode, the interrupt may be lost in some critical cases.
This may cause SDIO cards such as WiFi has the possiblity to hang
during a long-term transferring.
Using D3CD to manually driver the HW to re-sample the SDIO interrupt
on bus one more time to guarantee the SDIO interrupt signal sent
from card during the interrupt signal disabled period will not
be lost.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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add the ocotp module for Kconfig and Makefile.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Add a new driver for On-Chip OTP controller. The driver
will register all the register names of all the banks to /sys/.
You can use the following commands to manipulate the OTP banks:
read:
#cat HW_OCOTP_MAC0
write:
#echo 0x11223344 > HW_OCOTP_MAC0
Signed-off-by: Huang Shijie <b32955@freescale.com>
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fix suspend/wakeup warning message
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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The OTG driver will be loaded before usb host driver, at OTG driver
the usb host data structure can only be used after usb host driver
finishes initialization.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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If IPU clock is disabled, enable it when configuring the CSI module.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Crash averted by preventing the case where a NULL string (representing
the panel selected via command line) is passed through strcmp().
If no command line panel selected, the default will be the first panel
defined in the platform data (the 6.0" E Ink panel for MX50 ARM2).
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Add support for 9.7" E Ink panel.
Expand driver support for multiple panels by storing platform data
containing all variable panel parameters. Removed hard-coded reg values
for 6" panel.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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The usb system error can't be recoveried, So it is better having an
error message notice when this error occurs. For mx508, if the dma
buffer is the invalid address(usb subsystem can't visit this address),
There will be a system error interrupt, but the usb still will transfer data
to host, so the software needs to check usb dma buffer address.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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1. When the usb is not in use, the usb can be put into low power mode
(usb related clock are off, and phcd = 1)
2. When the usb is in low power mode, the usb wakeup irq can be triggered,
and let the usb return to normal mode
3. The flag device_can_wakeup(struct device *dev) is standing for the device
has(and will use) the abilities for waking up the whole system, not means
the device has the abilities for waking up itself.
4. During the pm process, wakeup is only needed to enable when the user
needs usb device to wakeup the whole system.
5. The initialization changes a little, for evk board is not connected to pc
as an example:
Loading the driver:
1. Clear phcd and Open clock
2. init usb registers
3. vbus is not valid, and go to low power mode
connect usb line to pc:
1. Wakeup irq happens
2. usb goes to normal mode
3. vbus irq happens(at the same interrupt)
4. set run_stop bit
5. enumeration begins
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Huhui <b29976@freescale.com>
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MX50 Z160 has higher gradient/texture precision than MX51/53.
Signed-off-by: Jie Zhou <b30303@freescale.com>
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The L2 Switch can get mac address from platform data.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
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add suspend/resume for LED driver
disable debug uart for suspend
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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In order to enable full use of GPU, framebuffer surfaces must adhere
to GPU alignment restrictions. Width must be 32-byte aligned and
height must be 128-byte aligned (4K buffer alignment). Code modified to
meet these restrictions.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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4-bit ECC is not set correctly on MX5 when do driver
consolidation. This patch fix it
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add support for platform-level selection of PMIC pass version. 1 and 2
supported currently. Also support platform-level selection of VCOM
voltage value.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Ability added to control the delay between all updates being complete
and the EPDC powering down. This provides user space control over
how frequently the EPDC is undertaking a time-consuming enable/disable
process.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Ported DCP driver to MX50
Added clock gating functionality when DCP is not in use
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Changed gfp flag directly in dma_alloc_coherent in
drivers/media/video/videobuf-dma-contig.c
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit b5cfb266e2e2d40568d060b0426e6c4239a34a78)
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It's easy to reproduce by run below cmd:
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 1024 -oh 768 -fr 80 -d 3
qvga.yuv
For performance, we did not check display in IC interrupt handle before.
Output must sync to display.
In this patch:
1. make stream begin with one buffer.
2. change timer_work name to icbypass_work.
3. add display sync to timer interrupt handler.
Signed-off-by: Jason Chen <b02280@freescale.com>
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If dual display enabled, the second one may not be able to set
correct clock rate if it's from ext clk.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Enable the configurations of the boot enable on the eMMC cards.
Add the interface that used to configure the boot_bus_width
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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In fact, NAND driver always do clk_enable when use NAND
and clk_disable when not use. But there is one open issue
in nand_base.c community code for multiple NAND scan, it
call multiple chip->select_chip(mtd, i); but only call one
time for chip->select_chip(mtd, -1); which will cause the nfc
clock count not equal to zero after multiple cs NAND scan
Signed-off-by:Jason Liu <r64343@freescale.com>
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There will be one oops when no NAND found for GPMI,
This patch fix it
Signed-off-by:Jason Liu <r64343@freescale.com>
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FEC on MX28 will go to MII mode after the FEC reset
which lead to PHY not work correctly for next link set up.
We need to reconfigure the MII/RMII mode according
the platform data setting after FEC reset
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add sii9022 driver support.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Add ability to claim/release EPDC pins when turning
enabling/disabling EPDC. This is important for EPDC
power management.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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When FB console is enabled, the EPDC will perform a full-screen update
after completing register_framebuffer(). This update will show
the Linux logo if it has been selected.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Max Data length of can frame is 8 Byte. If previous transfer size
is 8, the length will exceed 8 if next package data size is 7 byte.
0x8|0x7 = 0xF, length will be 0xf then kernal oops happen.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Define suspend resume functions only when CONFIG_PM is set
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Adopt the mainline RNGC driver for RNGB hw
Add clock gating on suspend resume
Signed-off-by: Anish Trivedi <anish@freescale.com>
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cdc-acm needs to set a flag during open to tell the
tty layer that the device is initialized
Signed-off-by: Oliver Neukum <oliver@neukum.org>
Cc: Marcel Holtmann <marcel@holtmann.org>
Cc: Paul Martin <pm@debian.org>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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If enabled MMU, there is AXI read/write error on MX508 when run
OpenVG CTS.
Besides, change EMEM1 size to 10MB by default to make gpu driver
work on MX50_ARM2 board with 128MB memory installed.
Signed-off-by: Jie Zhou <b30303@freescale.com>
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Remove GSL_MMU_TRANSLATION_ENABLED macro originally used for conditional
compile, and replace it with runtime check to support one mx5x image
Signed-off-by: Jie Zhou <b30303@freescale.com>
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There is no fec platform data for MX51 EVK board, so
memcpy(fec_mac_default, pdata->mac, sizeof(fec_mac_default));
will cause memory issues and lead to the following oops:
FEC Ethernet Driver
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT
Modules linked in:
CPU: 0 Not tainted (2.6.31-00836-gb471a66 #233)
PC is at memcpy+0x8c/0x330
This patch fix this issue which induced by commit
1f128b74b0dad4596ece46baf242562b093d2544
Signed-off-by:Jason Liu <r64343@freescale.com>
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This will cause the esdhc clock registerd in the kernel clock tree
to be always enabled which will block the sysem to disable PLL2 in
LPAPM mode.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Add GPMI RAW NAND driver support for MX50
This patch only support the basic NAND feature on MX50
Signed-off-by:Jason Liu <r64343@freescale.com>
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This patch keeps TVE variable screeninfo when the TVE driver
reconfigures TVE framebuffer so that the pixel format of the
framebuffer will not be changed.
This patch fixes the wrong pixel format issue when start to
play video on TVE framebuffer with TVE framebuffer in blanked
status.
Signed-off-by: Liu Ying <b17645@freescale.com>
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There are not MX28/MX23 power/wakeup node at sys directory.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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