Age | Commit message (Collapse) | Author |
|
In the probe function of the bq20z75 driver, check for the presence of the
bq20z75. If there is no response from device, terminate the driver
initialization.
Bug 932030
Change-Id: I6608eaea6b6b37b18d3f77f40d58c1f8e9b05b3c
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/78750
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
|
|
Add runtime PM support for tegra uart high speed driver.
Bug 887359
Reviewed-on: http://git-master/r/76805
Change-Id: I3439435eb40d36d66182a19011791399b6e65655
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78713
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Added GLPM(Global Low-Power Mode) to support Low-Power Mode
during sleep mode.
Bug 924686
Reviewed-on: http://git-master/r/75627
Change-Id: Ia4be1b6b24de95f29ac173bed71c045a246cbcde
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78701
Reviewed-by: Automatic_Commit_Validation_User
|
|
Enable wake from LP1 on KP interrupt when scan timeout
is set to zero.
Bug 921161
Reviewed-on: http://git-master/r/78146
Change-Id: I6f28f0da971bd159b40412608fca2615a70f6988
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78700
Reviewed-by: Automatic_Commit_Validation_User
|
|
tegra_sdhci_suspend() had code to disable the same regulators
twice. Remove one instance of the code to avoid warnings
during system suspend.
Change-Id: I71789b40a6d5e5c500c57b8323b9f4bc79634886
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78682
Reviewed-by: Automatic_Commit_Validation_User
|
|
Removing commented and unused code from the driver
Bug 926128
Reviewed-on: http://git-master/r/77038
Change-Id: I373112b09cdb5bcb25f409e31da17f678590aaa1
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78438
Reviewed-by: Automatic_Commit_Validation_User
|
|
Don't check if dc is NULL after we've already dereferenced it.
Reviewed-on: http://git-master/r/63647
Change-Id: I0af6c829b6143b21a1f7de47a1ccfeac4bda99e0
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78434
Reviewed-by: Automatic_Commit_Validation_User
|
|
This is the first step in defining a dma buffer sharing mechanism.
A new buffer object dma_buf is added, with operations and API to allow easy
sharing of this buffer object across devices.
The framework allows:
- creation of a buffer object, its association with a file pointer, and
associated allocator-defined operations on that buffer. This operation is
called the 'export' operation.
- different devices to 'attach' themselves to this exported buffer object, to
facilitate backing storage negotiation, using dma_buf_attach() API.
- the exported buffer object to be shared with the other entity by asking for
its 'file-descriptor (fd)', and sharing the fd across.
- a received fd to get the buffer object back, where it can be accessed using
the associated exporter-defined operations.
- the exporter and user to share the scatterlist associated with this buffer
object using map_dma_buf and unmap_dma_buf operations.
Atleast one 'attach()' call is required to be made prior to calling the
map_dma_buf() operation.
Couple of building blocks in map_dma_buf() are added to ease introduction
of sync'ing across exporter and users, and late allocation by the exporter.
For this first version, this framework will work with certain conditions:
- *ONLY* exporter will be allowed to mmap to userspace (outside of this
framework - mmap is not a buffer object operation),
- currently, *ONLY* users that do not need CPU access to the buffer are
allowed.
More details are there in the documentation patch.
This is based on design suggestions from many people at the mini-summits[1],
most notably from Arnd Bergmann <arnd@arndb.de>, Rob Clark <rob@ti.com> and
Daniel Vetter <daniel@ffwll.ch>.
The implementation is inspired from proof-of-concept patch-set from
Tomasz Stanislawski <t.stanislaws@samsung.com>, who demonstrated buffer sharing
between two v4l2 devices. [2]
[1]: https://wiki.linaro.org/OfficeofCTO/MemoryManagement
[2]: http://lwn.net/Articles/454389
Change-Id: I8ebd858ad86242ee7b02d5f42bb25c3edbd64fca
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-and-Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[Hiroshi DOYU: Backported from v3.3-rc1]
Reviewed-on: http://git-master/r/78384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
|
|
The mainline IOMMU API v3.3-rc1 has been changed so that bytes are
used in mapping size instead of page order and page-by-page iteration
is taken care of by iommu core.
Change-Id: Ib331b6f3f7075385499eb13dd040c80444d706a8
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/78139
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
The mainline IOMMU API v3.3-rc1 has been changed so that bytes are
used in mapping size instead of page order and page-by-page iteration
is taken care of by iommu core.
The rest are mostly for maintainability:
$ git co iommu/next drivers/iommu/tegra-smmu.c
Change-Id: Ib4fdee4a637b3065a1eab6c56923b05f46b3b582
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/78137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
The dma client should use the tegra_dma_dequeue_req() for
dequeue the dma request.
Change-Id: I1f433c85ffec997d8c608e08509c48c72b27120a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77804
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
The dma client should use the tegra_dma_dequeue_req() for
dequeue the dma request.
Change-Id: I1bfdca4810a61cb9f9699dabafb2ba045d2c6bd5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77803
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
|
|
android-tegra-nv-3.1
Change-Id: I9001bb291779f107bbcb593d48f9f0f734074d0e
|
|
Used run time apis for clock controls i.e. clock enable/
disable in place of direct clock apis.
Using of runtime pm api was already implemented but it was
missed on probe where it was calling clock_disable.
Fixing this issue.
bug 928541
Change-Id: I511467bd1cbe05f2a05d219d19236426a30d05d5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78156
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
|
|
Save and restore new gr3d registers. This is a workaround for
hardware not always initializing the registers to proper state
after un-powergating.
Bug 914785
Reviewed-on: http://git-master/r/75698
Change-Id: Id9d65d93d16daf68e29b1433b7dd3284cb439ffc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78025
Reviewed-by: Automatic_Commit_Validation_User
|
|
Enabling power rails when the card is present
which reduces power consumption
Bug 924888
Reviewed-on: http://git-master/r/75653
Change-Id: If9cbd02b49821954646845bd889501e9159c7b8c
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78023
Reviewed-by: Automatic_Commit_Validation_User
|
|
Enable SDR104 and SDR50 support for Tegra3.
Bug 920089
Bug 913598
Reviewed-on: http://git-master/r/75248
Change-Id: Ib7e7d15f1a42a14bb1ecb3e0f25934309ec43534
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78022
Reviewed-by: Automatic_Commit_Validation_User
|
|
When SD 3.0 cards operate in UHS DDR50 mode, set the
card state to ddr mode to select the proper frequency.
Bug 925326
Reviewed-on: http://git-master/r/72628
Change-Id: I9370ab402eb0c39f603555eccdcb49723ac4910f
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78021
Reviewed-by: Automatic_Commit_Validation_User
|
|
patch is for following feature
1) use set_power() defined in platform file to
switch on/off BT.
2) send_ll_cmd according to state
Reviewed-on: http://git-master/r/77318
Change-Id: I48ccb310ee4ce97c82835ef5701673c6f40231d4
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78018
Reviewed-by: Automatic_Commit_Validation_User
|
|
Reviewed-on: http://git-master/r/77465
Change-Id: I653afbb6f766493e5d458b2ba4babb8e400c30c1
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78016
Reviewed-by: Automatic_Commit_Validation_User
|
|
Defer tx urb submit to work function to avoid problems with autopm
not fully resumed.
BUG 929408
Reviewed-on: http://git-master/r/77228
Change-Id: Id559d65384780067e48faee6c79134eb35d298fc
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78014
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Reviewed-on: http://git-master/r/77403
Change-Id: If51967720de2f4dc1634906fa263c693aef87d75
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78012
Reviewed-by: Automatic_Commit_Validation_User
|
|
This ensures that host1x's name is host1x, and not host1x.0
Reviewed-on: http://git-master/r/75505
Change-Id: I91d9dcbec108ee7f35dc638ed9370552f6eaa164
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78009
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Add a mutex_unlock() that was missing in the failure case of
the mediasrv_unlocked_ioctl() function.
Bug 918148
Reviewed-on: http://git-master/r/71470
Change-Id: Id935e2eadfcd5ca3ebf7a086afbcfd4224c52604
Signed-off-by: Ron Vaughn <rvaughn@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78008
Reviewed-by: Automatic_Commit_Validation_User
|
|
This is Synaptics' open source driver except one line
change to accomodate an SPI kernel driver feature
which does not accomodate optional byte-delay. It
will be fully original driver when we add byte-delay
into Tegra SPI kernel drivers.
Bug 912775
Reviewed-on: http://git-master/r/74642
Change-Id: I0f39928c48bc0e633de0d2c1f595bcef47268d52
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77774
Reviewed-by: Automatic_Commit_Validation_User
|
|
CPU register read did not have access to nvhost power management.
Due to this only modules that were powered on previously are actually
accessible via the API. This patch refactors CPU access to:
* Move mutexes to sync point, as they're sync point operations
* Move register address spaces to nvhost_device
* Call register read with access to the respective nvhost_device
* Initialize module completely at boot-up so that register reads
can be done without an initialized channel.
Reviewed-on: http://git-master/r/75275
Change-Id: I0db38cef7b2cd92dc64e7f55d227bdd2fdb8f752
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77764
Reviewed-by: Automatic_Commit_Validation_User
|
|
Grouphold gain and coarse_time register writes.
Make gain and coarse_time set in one ioctl call.
Bug 924213
Reviewed-on: http://git-master/r/74622
Change-Id: I648e4c24c1a048629757abc21afba092d1484d04
Signed-off-by: Yining Deng <ydeng@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77762
Reviewed-by: Automatic_Commit_Validation_User
|
|
Flushing pending urb requests on disconnection.
Blocks usb requests on usb device disconnection.
BUG 919270
Reviewed-on: http://git-master/r/72832
Change-Id: I9ae10685d9517e0626338cfd42b21479d7d480eb
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77760
Reviewed-by: Automatic_Commit_Validation_User
|
|
Reviewed-on: http://git-master/r/77504
Change-Id: Iafe31126fbcec1bfd01b51e0c122b44d3a71bbda
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77759
Reviewed-by: Automatic_Commit_Validation_User
|
|
Allowing user to write sysfs nodes breaks CTS. 3D scaling should be
enabled in all current power modes and does not need to be toggled
by user / system code. Hence disabling user write permission.
Bug 906796
Reviewed-on: http://git-master/r/77058
Change-Id: I164926b5e65a05d63928c9e7c5970ea930cde37b
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77754
Reviewed-by: Automatic_Commit_Validation_User
|
|
Add KEEPALIVE functionality to Tegra WDT driver for use by user space
applications.
Bug 887733
Reviewed-on: http://git-master/r/77135
Change-Id: I966371bc5db34416de08c8dc2af9069b4bd34c5d
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77750
Reviewed-by: Automatic_Commit_Validation_User
|
|
Mark host1x as busy only when clocks are enabled, instead of
unconditionally at load/unload and suspend/resume time. Shutdown
the avp device entirely during suspend, and restart it on resume if
if necessary.
Bug 929279
Reviewed-on: http://git-master/r/77054
Change-Id: I0c66c26302fe307bea396e1c547a67b3417e26ec
Signed-off-by: Isaac Richards <irichards@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77749
Reviewed-by: Automatic_Commit_Validation_User
|
|
Correcting the strobe and SOFs behaviour. This avoids run-stop
bit to start before actual bus_reset. Also, pullup the
strobe signal during idle and wait for connect detect
after bus idle.
Bug 898008
Bug 922444
Reviewed-on: http://git-master/r/73261
Change-Id: I01999521013677f159ee9c12f2d7bcb453c3b39d
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77748
Reviewed-by: Automatic_Commit_Validation_User
|
|
Do not submit rx urb if usb interface is disconnected.
BUG 922418
Reviewed-on: http://git-master/r/74880
Change-Id: I42fa715307275b9d1175ef624acef6c098732261
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77746
Reviewed-by: Automatic_Commit_Validation_User
|
|
Dont fail if there is no regulator device.
For all other cases return failure.
Bug 898252
Reviewed-on: http://git-master/r/73026
Change-Id: Iab987a5d948cd7f3c3373cd3d12f52d480767772
Signed-off-by: Nitin Pai <npai@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77745
Reviewed-by: Automatic_Commit_Validation_User
|
|
Check the state machine before poweron the modem by device
attribute change routine. Maintain the state machine to
avoid crash after writing state change to
/sys/devices/platform/baseband_xmm_power/xmm_onoff
Also cancel workqueue at module unload to avoid
possible crash.
Bug 898008
Reviewed-on: http://git-master/r/72934
Change-Id: I0d8286774040f155c930ecb0bb69778de6c606ac
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77744
Reviewed-by: Automatic_Commit_Validation_User
|
|
Added i2c high speed support.
Bug 873879
Reviewed-on: http://git-master/r/71997
Change-Id: I5a2c5f272485e6f7c8bb6c11d7c3b6850fdcd768
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77741
Reviewed-by: Automatic_Commit_Validation_User
|
|
Before making a transfer, is_suspended is checked to make sure the
device is alive. However this check is done without holding the lock
that the suspend and resume functions hold to change the suspend state,
creating the possibility of a race condition.
Bug 916336
Reviewed-on: http://git-master/r/70488
Change-Id: I7b4e52f686b0b372f3fc8ba7c7a4e4fdcdb6ba10
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77740
Reviewed-by: Automatic_Commit_Validation_User
|
|
In timeout, if there were more than one submits in queue, timeout
accumulated the sync point increments incorrectly. Fix accounting
of sync point increments.
Bug 915715
Reviewed-on: http://git-master/r/76831
Change-Id: I03223b1f65a4bdbae19e9c1b927451a80122bec4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77729
Reviewed-by: Automatic_Commit_Validation_User
|
|
tegra_camera_clk_set_rate sets the clock rate which is
equal to or greater than requested clock rate. In this way,
user space code doesn't have to scan through to find next
available higher clock through system call.
Remove setting VI/ICP clock to register directly.
Bug 917641
Reviewed-on: http://git-master/r/75097
Change-Id: Iecbeacecb34c6b6f71228932ba4b046658ff905d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77727
Reviewed-by: Automatic_Commit_Validation_User
|
|
Renaming the variables "table" to "voltage_table" and
"table_len" to "n_voltages" of regulator information
to have more meaningful.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from commit
7d38a3cb9b9f6a6d31b1d19e4f07a7c0b71407d5
Change-Id: I8ef3a7544bf432a3c6efb98d99cb660b6fefde38
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77539
Reviewed-by: Automatic_Commit_Validation_User
|
|
Initializing the number of voltages supported by different
rails of pmic device tps65911.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
51ced5e288b4381705df173fb05f561dea35bfac
Change-Id: I85ec3261125291f9862f9746ef7ec97e09fa375b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77538
Reviewed-by: Automatic_Commit_Validation_User
|
|
Adding missing regulator info for VRTC rail for device
tps65911. The regulator voltage rail index start from
VRTC which is defined as 0.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
c2f8efd7641b1b10b73ffa6f216a45209a5705dd
Change-Id: I7e544ea2f0b3df677ad75bbca38b744c9a6f71da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77537
Reviewed-by: Automatic_Commit_Validation_User
|
|
Count of selector voltage is required for regulator_set_voltage
to work via set_voltage_sel. VDD1/2 currently have it as zero,
so regulator_set_voltage won't work for VDD1/2.
Update count (n_voltages) for VDD1/2.
Output Voltage = (step value * 12.5 mV + 562.5 mV) * gain
With above expr, number of voltages that can be selected is
step value count * gain count
constant for gain count will be called VDD1_2_NUM_VOLT_COARSE
existing constant for step value count is VDD1_2_NUM_VOLTS,
use VDD1_2_NUM_VOLT_FINE instead to make clear that step value
is not the only component in deciding selectable voltage count
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit
780dc9ba4eb682a89be48d5b814feae6722a19e0
Change-Id: I1c246a02f1c647fe3c647b3dde2a0633c2783764
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77536
Reviewed-by: Automatic_Commit_Validation_User
|
|
Create an array of fixed size for the platform to pass regulator
initalization data through.
Passing an array of pointers to init data also allows more flexible
definition of init data as well as prevents reading past the end of the
array should the platform define an incorrectly sized array.
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline's commit
c1fc1480249dfe059254779a4bb7ca27cf5f8038
Change-Id: Ia298bbd2828e644d24e10ab67ff76f1169cf7f51
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77535
Reviewed-by: Automatic_Commit_Validation_User
|
|
Move the regulator defintions to the header so that platform board file
can use them to configure specific regulators.
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry picked from mainline's commit:
72c108cc4947db2fcdd3f3e8a2b60bd65e74a1cc
Change-Id: I7659c33cab6f20c91dc4bf36e1c157e1878993ab
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77534
Reviewed-by: Automatic_Commit_Validation_User
|
|
TPS65910 can be used without interrupts.
Hence let probe succeed in case interrupt can't be
configured and let Kernel only to complain about it
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
cherry picked from mainline's commit
1e351a95b6fda20e16b64a698bae505765080308
Change-Id: Ib619d906f0cc9668c08e156d85eb940f29945771
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77529
Reviewed-by: Automatic_Commit_Validation_User
|
|
The function is not actually cleaing the bitmask.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
cherry picked from mainline's commit:
8f6a459a9daa6ce76d7c192f2cb3047fffb45ec8
Change-Id: I53d59ba72ecca513ef4b1ad265d578e493007660
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77528
Reviewed-by: Automatic_Commit_Validation_User
|
|
CONFIG_TEGRA_IOMMU_GART has to be selected explicitly because there's
2 IOMMU framewrok existing in Tegra, CONFIG_TEGRA_IOVMM_{GART,SMMU}
and CONFIG_TEGRA_IOMMU_{GART,SMMU}.
Change-Id: I6f1a0ad8e321c5ad5378baa6bc4a9bcecad9d4d2
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/77513
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
As this dirver is back ported from kernel mainline, the function
regulator_register() have one extra argument.
Removing this extra argument.
Change-Id: I615f995184e4908c399b9ccc91e090e49f10aec3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I999307c90092c3cc816952c948e04c170fc4303d
Reviewed-on: http://git-master/r/77343
Reviewed-by: Automatic_Commit_Validation_User
|