Age | Commit message (Collapse) | Author |
|
regmap_config.reg_stride is introduced. All extant register addresses
are a multiple of this value. Users of serial-oriented regmap busses will
typically set this to 1. Users of the MMIO regmap bus will typically set
this based on the value size of their registers, in bytes, so 4 for a
32-bit register.
Throughout the regmap code, actual register addresses are used. Wherever
the register address is used to index some array of values, the address
is divided by the stride to determine the index, or vice-versa. Error-
checking is added to all entry-points for register address data to ensure
that register addresses actually satisfy the specified stride. The MMIO
bus ensures that the specified stride is large enough for the register
size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit f01ee60fffa4dc6c77122121233a793f7f696e67)
Change-Id: I634977dcb0fe9ff95c7932e9195a2c1918eb1c18
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96510
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Commit 79c64d5 "regmap: allow regmap instances to be named" changed the
prototype of regmap_debugfs_init, but didn't update the dummy inline used
when !CONFIG_DEBUGFS. Fix this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit abec95adefaeb2229cb28de65f3d32cd149b9dd9)
Change-Id: Ieb049fa9ed0dd26d21a37592ecb25488b0909c0b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96509
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Some devices have multiple separate register regions. Logically, one
regmap would be created per region. One issue that prevents this is that
each instance will attempt to create the same debugfs files. Avoid this
by allowing regmaps to be named, and use the name to construct the
debugfs directory name.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry-picked form mainline d3c242e
Change-Id: Ia3301fb4d28645f1d3593e547f9409ce20c0acfe
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96508
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
val_len should be a multiple of val_bytes. If it's not, error out early.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 851960ba7cb38a6a108d102e4c8b0ab702972e22)
Change-Id: Ic17d4bd832b5ea3e426d00ff5d0ae342b8abba45
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96507
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
These error checks are implemented in regmap core. Remove the duplicate
code from regmap-mmio.c
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 9878647f4349dbaa46b4026ed9bbf8acfc0de34c)
Change-Id: I32979da1bbca852470c0cb8d8d997b2c77d6703f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96506
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Some of the error conditions detected by regmap_mmio_*() are pure internal
errors, rather than user-/client-triggerable conditions. Convert these to
BUG().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 40606dba450830e50420599c52a86cf6ce5c6a14)
Change-Id: Ibf926ca6774e4b3d3dd855d42814065858318628
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96505
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
This is a basic memory-mapped-IO bus for regmap. It has the following
features and limitations:
* Registers themselves may be 8, 16, 32, or 64-bit. 64-bit is only
supported on 64-bit platforms.
* Register offsets are limited to precisely 32-bit.
* IO is performed using readl/writel, with no provision for using the
__raw_readl or readl_relaxed variants.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 45f5ff8107a845854b1d1812ab1d9c5541f08b4d)
Change-Id: Ia84cf3fec838ee687e5b77ce771fc2450abe8436
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96504
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Some bus types have very fast IO. For these, acquiring a mutex for every
IO operation is a significant overhead. Allow busses to indicate their IO
is fast, and enhance regmap to use a spinlock for those busses.
[Currently limited to native endian registers -- broonie]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bacdbe077342ecc9e7b3e374cc5a41995116706a)
Change-Id: I337f27a09f2b176b46e8f6d05401957a1abc0609
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96503
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
The only context needed by I2C and SPI bus definitions is the device
itself; this can be converted to an i2c_client or spi_device in order
to perform IO on the device. However, other bus types may need more
context in order to perform IO. Enable this by having regmap_init accept
a bus_context parameter, and pass this to all bus callbacks. The
existing callbacks simply pass the struct device here. Future bus types
may pass something else.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 0135bbcc7a0cc056f0203ff839466236b8e3dc19)
Change-Id: I36b3fb3433af6e6f1e673fc6c73ba21f7eb4d054
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96502
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
|
|
If there are no nodes in the cache, nodes will be 0, so calculating
"registers / nodes" will cause division by zero.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
(cherry picked from commit c04c1b9ee8f30c7a3a25e20e406247003f634ebe)
Change-Id: I30047f1e0bd08417794c3d19e2fe1d480a74e083
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96501
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
regcache_sync_region() isn't going to be useful to most drivers if we
don't export it since otherwise they can't use it when built modular.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit e466de05194b666114713b753e2f4be1d4200140)
Change-Id: I38b12c791f0a462ebbbfbe4a6b25cfa3265ffacc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96500
Reviewed-by: Automatic_Commit_Validation_User
|
|
This change combines any padding bits into the register address bits when
determining register format handlers to use the next byte-divisible
register size.
A reg_shift member is introduced to the regmap struct to enable fixup
of the reg format.
Format handlers now take an extra parameter specifying the number of
bits to shift the value by.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit d939fb9a78b4743bc4bc3cc415894ed42050c5cc)
Change-Id: I80921cfa4dd6aea5e7038927a313baeb347689e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96499
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Add support for devices with 24 data bits.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit ea279fc5619e2541a0c28196b0fa06447d9ad026)
Change-Id: I69ccd494eb8622c442d55294c24ecd6acd78cfcb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96498
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
The code currently passes the register offset in the current block to
regcache_lookup_reg. This works fine as long as there is only one block and with
base register of 0, but in all other cases it will look-up the default for a
wrong register, which can cause unnecessary register writes. This patch fixes
it by passing the actual register number to regcache_lookup_reg.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: <stable@vger.kernel.org>
(cherry picked from commit 4b4e9e43fd210e0cd2a5d29357e7c000e13e08ae)
Change-Id: Ibed70828471423df5432fea67316ca9ad8aeb52a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96497
Reviewed-by: Automatic_Commit_Validation_User
|
|
Remove for_each_set_bit_cont() after confirming that no one uses
for_each_set_bit_cont() anymore.
[sfr@canb.auug.org.au: regmap: cope with bitops API change]
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cherry-pick from mainline 0a329d2
Change-Id: I6655096e5d58a1215b225035daa8dd8a2f6327d9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96496
Reviewed-by: Automatic_Commit_Validation_User
|
|
[Fix for breakage which will be introduced during the merge window via
header reworks in another tree, the regmap tree does include device.h
but Paul's tree breaks that. Reworded subject to reflect -- broonie]
regmap.s uses devres_alloc() and others that are prototyped in device.h.
Include that to solve the following:
drivers/base/regmap/regmap.c: In function 'devm_regmap_init':
drivers/base/regmap/regmap.c:331:2: error: implicit declaration of function 'devres_alloc' [-Werror=implicit-function-declaration]
drivers/base/regmap/regmap.c:338:3: error: implicit declaration of function 'devres_add' [-Werror=implicit-function-declaration]
drivers/base/regmap/regmap.c:340:3: error: implicit declaration of function 'devres_free' [-Werror=implicit-function-declaration]
drivers/base/regmap/regmap.c: In function '_regmap_raw_write':
drivers/base/regmap/regmap.c:421:5: error: implicit declaration of function 'dev_err' [-Werror=implicit-function-declaration]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit f5d6eba74b8aac7d4bf646c5445807aa6a247e6c)
Change-Id: I38c390fb5085bf3e815aa5c4048d4f89d8698563
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96495
|
|
Otherwise we'll end up running with bogus register numbers.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit f9353e70bcebd00cd182d946083afd7d8eddd259)
Change-Id: I7615fd2d63ec29dd869585fb20a151067b53c72a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96494
Reviewed-by: Automatic_Commit_Validation_User
|
|
Most of the current users have register 0 as a volatile register or don't
have a register 0 so it's not been apparent that it's not getting synced.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 994f5db65ef4b83db0321842bd43c6bc0a51f000)
Change-Id: Iaada5ae8ba705f45049eb1c85a1909a9f192f765
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96493
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Remove unused module.h and/or replace with export.h
as required.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 19694b5ea1d3a723dafe9544b5ee9a935414dc28)
Change-Id: Icf76b35f6d0d1f4720ca6d51fa9b2ebf123604b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96492
Reviewed-by: Automatic_Commit_Validation_User
|
|
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit a0941e562e8008804f9fe4400315ceb164752fac)
Change-Id: Ic582509f74612ddc48f854116553e2f40954e4ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96491
Reviewed-by: Automatic_Commit_Validation_User
|
|
Provide a regcache_sync_region() operation which allows drivers to
write only part of the cache back to the hardware. This is intended
for use in cases like power domains or DSP memories where part of the
device register map may be reset without fully resetting the device.
Fully supporting these devices is likely to require additional work to
make specific regions of the register map cache only while they are in
reset, but this is enough for most devices.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 4d4cfd1656b5f6c88eae51c40741a695b108b006)
Change-Id: Ia8cccf7986611485ae090e234bb68084671d7641
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
In order to allow us to support partial sync operations add minimum and
maximum register arguments to the sync operation and update the rbtree
and lzo caches to use this new information. The LZO implementation is
obviously not good, we could exit the iteration earlier, but there may
be room for more wide reaching optimisation there.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit ac8d91c801905a061ca883dca427a5e19602a1e7)
Change-Id: I92ceee1c704ea7c864bff0559d36cf34554c3ba5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96489
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Useful for figuring out where the hardware interaction went or came from.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e)
Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96488
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Previously the cache would never be marked clean, meaning syncs would
never be suppressed which isn't the end of the world but could be
inefficient.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa)
Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96487
Reviewed-by: Automatic_Commit_Validation_User
|
|
It's not used as all cache types have sync operations so it's just dead
code which never gets tested.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567)
Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96486
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Saves some I/O when resyncing; we assume that syncs start from the device
reset state.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit a3c3774176838bbfa4f6e48133644903818e56dc)
Change-Id: Ib4471bd06856ccd2652f21dd0d9d51319df00939
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96485
Reviewed-by: Automatic_Commit_Validation_User
|
|
Add a file called 'name' containing the name of the driver.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit f0c2319f9f196726ebe4d7508fd8fbd804988db3)
Change-Id: Id67e73cfd573a71377fe6bbc5c3068718822ef38
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96484
Reviewed-by: Automatic_Commit_Validation_User
|
|
To enable writing to the regmap debugfs registers file users will
need to modify the source directly and #define REGMAP_ALLOW_WRITE_DEBUGFS.
The reason for this is that it is dangerous to expose this
functionality in general where clients could potentially be PMICs.
[A couple of minor style updates -- broonie]
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 09c6ecd394105c4864a0e409e181c9b1578c2a63)
Change-Id: Ia9408880e25d5060796ab79812a023def00b10bc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96483
Reviewed-by: Automatic_Commit_Validation_User
|
|
Fall back to a register by register read to do so; most likely we'll be
cache only so the overhead will be low.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit b8fb5ab156055b745254609f4635fcfd6b7dabc8)
Change-Id: I9f3b6011f4704987c5a014de8b30a2e6e3196d21
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96482
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Generic infrastructure based on top of regmap may want to operate on
blocks of data and therefore find it useful to find the size of the
register values. Provide an accessor operation for this.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-pick from mainline a6539c3
Change-Id: I455ace158eea38f6a92938f6330ec074bc18f0da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96481
Reviewed-by: Automatic_Commit_Validation_User
|
|
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc)
Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96480
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Enabled hw reset in tsensor if temperature exceeds given
temperature limit.
bug 966994
Change-Id: I2444c97c97c45b2d190a224388876d592d983c7f
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/93030
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
|
|
Enable Custom Regulatory Domain(CRD) support, only if
BCMDHD_CUSTOM_REGULATORY_DOMAIN kernel config is set.
By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled.
Bug 947472
Change-Id: I40ea3c3c531d4e309c0928db396b9cc832be43cc
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/88266
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no
longer supported.
Change-Id: Ic47d0aa16c555bd7821416fff29d723924c6118b
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95645
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Simple tracepoints for measuring CPU scaling latencies.
Bug 960307
Change-Id: I6fd4e67e352a2ff134da58866d943457506d080b
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/93080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
|
|
Re-arranged standard and modified ehci functions into
two separate groups, for more readability
Change-Id: I320a50ed44c3f0990692ae38b55dc6a04fe7c378
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92823
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Bug 924863
Change-Id: I10d3036ce19f8c1f37e57998c204f3a72bd42f85
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/89718
Reviewed-by: Automatic_Commit_Validation_User
|
|
Enchancement to support user space tests such as OFB, CTR, sha1,
sha224,sha256, sha384, sha512.
BUG 903375
Change-Id: I52767978bd3758671ec6fff988223ac046f5579c
Reviewed-on: http://git-master/r/84296
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Provide /sys/class/graphics/fb0/device/nvdps to change video mode
on-the-fly without resetting window layout like fb_set_var(). This
allows flicker free changes in refresh rate.
nvdps sysfs file takes an integer, and selects the closest matching mode
with the same or higher refresh rate. Reading the file displays the
current refresh rate.
Bug 560152
Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/95473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during
vblank). This elimiates the work around that requires disabling then
enabling display to change modes.
Adds a spinlock to protect irq code from updates to tegra_dc_mode structure.
Bug 560152
Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/90688
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
bug 949219
Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92310
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Correct max17048_read_word() function related i2c error handling
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/93702
(cherry picked from commit ba8bdc020c6e2ed57255786b3d61b870b0b5a516)
Change-Id: Ice9845bb39288442bd6637eedeaf6de6ad1acbda
Reviewed-on: http://git-master/r/95346
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
|
|
Addition of health and capacity level properties
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/93532
(cherry picked from commit 9892e1c30828bdcbf6ae53af72bb1a39cd19993e)
Change-Id: I28e9822772316ba7389a3c9518cf4778606dbfb7
Reviewed-on: http://git-master/r/95345
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
|
|
Removing the checking whether dma req queue is empty or not
before canceling/stopping dma.
This function cannot guarantee correct result as there may be the
race between hw and sw status update.
If client wants to cancel dma req, it can directly call tegra_dma_cancel().
As the function tegra_dma_is_empty() does not return correct result,
it will be depreciated from the dma apis.
Change-Id: I3f5ebee8a7be345b02fcd8a69530c9b53207ef28
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/95090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Adding the regulator driver specific information and passing
this information through regulator driver data. This struture
is containing delay operation which is require to voltage to
be settle down after enabling rail.
Bug 939242
Change-Id: I7da6ec487fe5f04857d3fd5f06a383b4a8fbcc7b
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/94500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
- as of now the resources needed by all the host1x
modules are part of resource list of host1x device
- now that each module is a nvhost_device of its own,
so it should hold the resources it needs instead of
host1x device holding it for them
- each device that needs its resources gets it in its
_probe() using a helper API in bus_client.c
Bug 871237
Change-Id: Ia7c63fcf40cbc5db76d4d8339294a0e9ce75e352
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/94166
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Add wake_avp ioctl which provides way for user-mode driver to
simply wake-up the AVP.
bug 914504
Change-Id: I3075ba944d39749559f2c340a4851902821c344f
Signed-off-by: Mandar Potdar <mpotdar@nvidia.com>
Reviewed-on: http://git-master/r/93877
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1.
In order to work around bug 869099,
this mode has been temporarily disabled.
Since the bug is not so visible, enable again.
Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497
Reviewed-on: http://git-master/r/92157
Reviewed-by: Alok Ahuja <alahuja@nvidia.com>
Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Following tegra USB UTMIP issues are fixed:
1. Clear run bit directly in the command
register instead of updating the shadow variable.
2. Reset EHCI while resuming from LP0 for
tegra 2.
3. Wait for 25ms to ensure port is resumed.
Bug 912880
Reviewed-on: http://git-master/r/92565
(cherry picked from commit 928ad32858af191fb9d90d736b910499121e10df)
Change-Id: I676f7f23fd8833a179e1670e6aed28a01baaf15b
Reviewed-on: http://git-master/r/94829
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Change to using kbytes/sec to avoid overflowing 32-bit integer in
bandwidth calculation.
Changing efficiency adjustment to ~35%.
Bug 958016
Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92658
Reviewed-by: Automatic_Commit_Validation_User
|