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This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1.
In order to work around bug 869099,
this mode has been temporarily disabled.
Since the bug is not so visible, enable again.
Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497
Reviewed-on: http://git-master/r/92157
Reviewed-by: Alok Ahuja <alahuja@nvidia.com>
Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Following tegra USB UTMIP issues are fixed:
1. Clear run bit directly in the command
register instead of updating the shadow variable.
2. Reset EHCI while resuming from LP0 for
tegra 2.
3. Wait for 25ms to ensure port is resumed.
Bug 912880
Reviewed-on: http://git-master/r/92565
(cherry picked from commit 928ad32858af191fb9d90d736b910499121e10df)
Change-Id: I676f7f23fd8833a179e1670e6aed28a01baaf15b
Reviewed-on: http://git-master/r/94829
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Change to using kbytes/sec to avoid overflowing 32-bit integer in
bandwidth calculation.
Changing efficiency adjustment to ~35%.
Bug 958016
Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92658
Reviewed-by: Automatic_Commit_Validation_User
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Context handler init functions are referred to from non-init section.
The functions should not have __init attribute, even though they're
only used in init time.
Change-Id: I1b6bca48504fd7989edaa037c4b022a76244b0f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to allow passing client/target specific information associated
with the data transfer.
Modify all affected DMA engine drivers.
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline
185ecb5f4fd43911c35956d4cc7d94a1da30417f
Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94464
Reviewed-by: Automatic_Commit_Validation_User
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Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline commit
16052827d98fbc13c31ebad560af4bd53e2b4dd5
Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463
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The gpio_switch regulator is NV driver developed during
tegra3 bringup time. The driver functionality is upstreamed
to mainline into fixed regulator and it is accepted by community.
The required functionality is also downstream and required client
driver is moved to use the fixed regulator. Hence this driver
is just duplicating functionality with fixed regulator and hence
removing this.
Change-Id: I893328497644612a2267f2c24298ff2f668e75d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94198
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Boost CPU rate floor ( based upon
TEGRA_GADGET_BOOST_CPU_FREQ ) before any transaction
starts and remove the boost once the transaction completes.
Bug 923594
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/88247
(cherry picked from commit cfb0c2d7bc7c00962c97c895958e2e0a13a14cfd)
Change-Id: I6c7524dbf90d6c3c8840ee8cd88e896dde6aa041
Reviewed-on: http://git-master/r/94173
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 958089
(cherry-picked from commit 7f4c6d6b9dd2b06984b59dcd60d92026cab4c87c)
Reviewed-on: http://git-master/r/92053
Change-Id: I0f2bdb5482fdcb508808d2d58771d74a05b5597f
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94117
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Print only a warning message if vdd regulator is not registered.
Some board do not have a seperate vdd regulator and hence
print only a warning message in such cases.
Bug 961258
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I953d17ae14650c622e06febe415362e5cb096236
Reviewed-on: http://git-master/r/93777
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Initialize scale3d worker even though scale3d would be disabled.
Bug 954879
Change-Id: Iaf3a12740d1d377d949cdfbf7e11fa00568e72fe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93488
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Expose sync point current and max values through sysfs.
Bug 957639
Change-Id: I2a3b914d404bb8d7bbed86d383c859bd8237a278
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/92778
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add support for protocol mangling "I2C_M_REV_DIR_ADDR"
Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92572
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.
Change-Id: I2e2c5d68dee64da02370beca6f61c650049402a2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91753
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
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To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.
Change-Id: I297e67433a2118377ecb9b028dcf8fa82e09f0e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91752
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
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Enabled recovery of DC from resetting. When underflow triggered serveral
times(current > 4 for tegra2), DC driver will reset itself to prevent
data corruption. Reopend nvhost connection when resetting finished. That
helps system to show frames instead of a blank screen again.
Fixed Bug 936613
Change-Id: I314c37258a4a446dc07167ac60d0420e79a5fb2d
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/89406
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Adding flag on fixed regulator board configuration structure
to specify whether gpio is open drain type or not.
Passing this information to gpio library when requesting
gpio so that gpio driver can set the pin state accordingly,
for open drain type:
- Pin can be set HIGH as setting as input, PULL UP on
pin make this as HIGH.
- Pin can be set LOW as setting it as output and drive to LOW.
The non-open drain pin can be set HIGH/LOW by setting it to
output and driving it to HIGH/LOW.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
a4d9f179cc788b7f4b735d32c2e4a3b2562e8240
Change-Id: I2ee7789db67fdeea77c0d6ac2b44876af36c803e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94150
Reviewed-by: Automatic_Commit_Validation_User
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- remove redundant 2nd argument to nvhost_module_suspend()
- also remove the debug_not_idle() as it redundant after
refactor of host1x code
- debug_not_idle() iterates through host1x's private instance
of channels to find out which client module is active (along
with host1x itself). we are going to remove these instances of
channels from host1x's device private data
- reduce the prints during suspend
Bug 871237
Change-Id: I66c7c4d8f35c157b1626784a6a27166442a50557
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92550
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Check returned value from BPC set limit api, and re-try again
on error. Keep CPU throttled while re-trying.
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 8d5e5a36a03587e3e9374ad8cec6958bd3617f0c)
Change-Id: I29b24a92b87cbd41d68473d0c9ef4c8d6add992f
Reviewed-on: http://git-master/r/93732
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Enable AHB prefetch and call dma_sync
to avoid memory coherency issues
Bug 921109
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/92257
(cherry picked from commit e8fac4b6f3460928442d6c9dadec301ccf57fb0b)
Change-Id: I2788e94d3609bfdd6d112f0b5386a653af15075e
Reviewed-on: http://git-master/r/93819
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Request complete may be called when there is no valid usb config
Avoid access to config when not required.
Bug 949543
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/91151
(cherry picked from commit 08bc68164d0bd90c84a8ea82f87f9f44e4341df2)
Change-Id: I5969144aaa9bcffddefa7933d43bfd3690814fba
Reviewed-on: http://git-master/r/93816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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nvmap_ioctl.h intended to be included by both kernel and
userspace code.
Change-Id: I8cccef5e3bc02f3271f471155b2e36126c68017a
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/93329
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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In S2R all DMA registers are reset by hardware and thus they are required to be
reprogrammed. The channels which aren't reprogrammed are channel configuration
and interrupt enable registers, which are currently programmed at chan_alloc
time.
This patch creates another routine to initialize a channel. It will try to
initialize channel on every dwc_dostart() call. If channel is already
initialised then it simply returns, otherwise it configures registers.
This routine will also initialize registers on wakeup from S2R, as we mark
channels as uninitialized on suspend.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline 61e183f8306934a9f66557f69f1f0f56f18dca06
Change-Id: I4ede3e1db8844533161bd4a836b1fece0d0ee716
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93784
Reviewed-by: Automatic_Commit_Validation_User
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Provide a common function to initialize a channels cookie values.
Change-Id: Idc822d69971d7a6d26ffea8809df4825b87020e5
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit
d3ee98cdcd6198ea1cf75c603178acc8a805b69b)
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Id7d52f05b78d15b0c61cb04122b19810e78b9269
Reviewed-on: http://git-master/r/93783
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Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status. We also provide
a separate helper to set the residue for cookies which are still in
progress.
Change-Id: I4b7672bbd17d072bfde348d04481c8db48e814c4
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit
96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd)
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ifdb55d85eb4789f221679f1f38f5566168e5c643
Reviewed-on: http://git-master/r/93782
Reviewed-by: Automatic_Commit_Validation_User
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Provide a common function to do the cookie mechanics for completing
a DMA descriptor.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline commit
f7fbce07c6ce26a25b4e0cb5f241c361fde87901
Change-Id: I0b0a9d4ad538db4fda227cc91436c44bc4a6f206
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93781
Reviewed-by: Automatic_Commit_Validation_User
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Everyone deals with assigning DMA cookies in the same way (it's part of
the API so they should be), so lets consolidate the common code into a
helper function to avoid this duplication.
Change-Id: I730882ff0f84f9ae42dd137a8926b7ae10868370
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit 884485e1f12dcd39390f042e772cdbefc9ebb750)
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ifc4a395a5dbafad03f8b28e052ad0e7ea5d90163
Reviewed-on: http://git-master/r/93780
Reviewed-by: Automatic_Commit_Validation_User
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Add a local private header file to contain definitions and declarations
which should only be used by DMA engine drivers.
We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against
multiple inclusion.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit d2ebfb335b0426deb1a4fb14e4e926d81ecd8235)
Change-Id: I91b051537fa1890e2651ebe0409fa97cbc9191dd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93779
Reviewed-by: Automatic_Commit_Validation_User
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Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures. This is pointless, and
forces driver specific code. Move this out into the common dma_chan
structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline
4d4e58de32a192fea65ab84509d17d199bd291c8
Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93778
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It is not recommended to use the flag I2C_M_NOSTART in first
message.
The documentation kernel/Documentation/i2c/i2c-proocol says:
Flag I2C_M_NOSTART:
In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
point. For example, setting I2C_M_NOSTART on the second partial message
generates something like:
S Addr Rd [A] [Data] NA Data [A] P
If you set the I2C_M_NOSTART variable for the first partial message,
we do not generate Addr, but we do generate the startbit S. This will
probably confuse all other clients on your bus, so don't try this.
Change-Id: I8a8a4f6f91a1b53b6d443588ab18704cf100fd50
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93187
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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Bug 949759
Add new 1080p timing support, or 1080p playback is not available on
some monitors like Acer H243HX
Change-Id: I8a8a3a5b2de71d5a56dad233f953e09176f85b76
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/91732
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Because of race condition between isr and tx fifo fill,
duplicate data is being written. So added locking to make
Tx fifo fill as atomic.
Change-Id: Ia99466adadfb6d86a6f238ec4cd0aa13bd36e434
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/90870
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Dvc I2C_DONE_INTR_EN interrupt bit is always enable into dvc
control register3. During normal transaction on dvc i2c bus
sometimes one transaction written two times in TX fifo buffer
because of triggered dvc interrupt. This is causing to corrupt
the next transaction header and send wrong address over dvc
i2c bus. To solve this issue dvc i2c interrupt has to disable
during filling of Tx fifo and enable after that.
Updated the following things in code:
(1) Add the code to mask/unmask I2C_DONE_INTR_EN into dvc control reg3
writing into Tx Fifo register.
(2) Put delay before resetting the controller
Hand-picked this change from: http://git-master/r/#change,39997
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Change-Id: I16b5821e1d0d0cf8419ce9d239e794de9d5b47be
Reviewed-on: http://git-master/r/89456
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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WAR to enable console prints when console service is not started
for port type TEGRA.
Bug 958959
Change-Id: I51e582d16195171f1f8bae9324e2ddece4638281
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/92814
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Cha <joshuac@nvidia.com>
Tested-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding the suspend_fail flag to proprogate the
bus suspend failure to the ehci suspend. This
ensure the proper synchronization between two
suspend calls.
Bug 932020
Reviewed-on: http://git-master/r/92286
(cherry picked from commit 9548deb7f4dfda95067731744b3122a47be3f654)
Change-Id: I00cc062888fcf7085be7aa3556ae500e0e457cd1
Reviewed-on: http://git-master/r/93130
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Modified multiple if conditions to switch case.
Included a new OTG state case: undefined
Change-Id: Iba4cf1a79b8c220fc873966bd8a89f43a5648863
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92832
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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With this patch:
1. Renamed structure and function names to be more meaningful.
2. Removed unnecessary local variables.
Change-Id: I0684d840c1b8c606c1643e1e2517e083be825787
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Remove old overlay interface, it is replaced with TEGRA_DC_EXTENSIONS
External functions made static now that overlay.c no longer needs them.
Change-Id: I5d080ceb19ad90d3b5cc4bf20494c967687293a5
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92661
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Michael I Gold <gold@nvidia.com>
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>
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bug 949219
Change-Id: I56904b3607c92281076ae3245ee1071922763eb8
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92557
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
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The slave address of device to be configured in packet
header as follows:
7 bit address: PacketHeader3[7:1]
10 bit address: PacketHeader3[9:0]
Fixing the code to make packet header3 properly.
Change-Id: I1797066d23ada5d4d7b14710201a1fb17566b78b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Removing interrupt key driver as this duplicates the
gpio_keys driver. Desired functionality can be achieve
through the gpio_keys.
Change-Id: I7e5bc18d4b30c64fa08bb64cdceffe2193c43c8f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92462
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Remove the check and debug dump for cases where we compare against
an old syncpt value. Also removes an extra check that is already done
by wait_event_interruptible_timeout();
Bug 941327
Change-Id: Icbaf70b04a8bd070c3fdd3467b981de11219d2b9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/92283
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Refactor page pool code.
Add page pool support for all memory types.
Add support to enable/disable page pools.
Add support to allow configuring page pool size.
Change-Id: I07c79004542efdd5909547928b3aa5d470e38909
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/91914
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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This patch fixes the GetStatus always reports self powered.
As per USB compliance update, a device that is actively drawing
more than 100mA from USB must report itself as bus-powered in
the GetStatus(DEVICE) call.
Bug 928340
Change-Id: Iefd1577a2ff2f301add98b14a402ed8eacc3aa28
Signed-off-by: ahcheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/91404
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This patch add CFI version 1.5 support. It replaces
classic word programming by write buffer programming
and sets the FFS write size to 512 bytes.
The patch taken from spansion
bug 906309
Reviewed-on: http://git-master/r/89412
(cherry picked from commit 733c7ef4b9bdc52ac95095436a5cf83aa0296da5)
Change-Id: I63cbd0bad077e055d6efd4e2b4c7d26c608d1b66
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91307
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Initialize pm_caps and pm_flags through platform
data.
Bug 956238
Change-Id: I400f6e92541fa2e63ccc7f829e204d5eef4697fc
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90790
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Add ID of BCM4330 to supported chips.
Remove ID of BCM4329 as it is not supported.
Bug 956238
Change-Id: I5c9e809245161d76c3decab3e5252ce111a2a07d
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90657
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Observed interrupt not getting enabled properly.
hence fixing it.
bug 937221
Change-Id: If852c9cd40fc98711fe12a124b533ee8ee99eb3c
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/83992
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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- if user space does not open 3d channel, 3d scaling
algorithm is not initialized. so return safely when
3d scaling is disabled
- also do not call nvhost_module_suspend() explicitly
for host1x client modules. nvhost_channel_suspend()
takes care to suspend the module if ref count = 0
- call nvhost_module_suspend() only for host1x device
as it does not use actual hardware channel
Bug 953451
Change-Id: Iba2b771b71d9b41c8ed978112566181872c56259
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92506
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peer Chen <pchen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Emily Jiang <ejiang@nvidia.com>
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Print only a warning message if usb_bat_chg regulator is not registered.
Some boards do not support usb charging and for such boards
usb_bat_chg regulator will not be registered.
Hence print only a warning message in such cases.
Bug 956558
Signed-off-by: Preetham Chandru <pchandru@nvidia.com>
Change-Id: I64c727f122c09d3865d649f3529b053bc65615ad
Reviewed-on: http://git-master/r/91521
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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