Age | Commit message (Collapse) | Author |
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Previously the driver gets the framebuffer start address at probe time.
But this address might be changed if the framebuffer drivers re-allocate
the frame buffers due to the application changes the yres_virtual.
As a result, some garbage data can be observed on display.
This patch adjusts the way to detect the start address at run time to
fix this problem.
Signed-off-by: Robby Cai <R63905@freescale.com>
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* Add missing clock control
* Set ASRC clock to 7.5MHz as 3.0.35 does
* Use the same divisor for ideal ratio mode as 3.0.35 does
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Since commit 43829731d (workqueue: deprecate flush[_delayed]_work_sync()),
flush_work() should be used instead of flush_work_sync().
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit e6a35a1d00670415901747a5c1cb06f024d695f9)
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Add GFP_KERNEL flag for dma_alloc_writecombine() and dma_alloc_coherent()
to make dma memory allocated via cma. Otherwise it's from dma pool whose
size is too small by default (256KB) and will cause allocation failure unless
use 'coherent_pool=xxM' in cmdline. We prefer cma now.
Signed-off-by: Robby Cai <R63905@freescale.com>
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There is a pending TD which is not freed after request finishes,
we do this due to a controller bug. This TD needs to be freed when
the driver is removed. It prints below error message when unload
chipidea driver at current code:
"ci_hdrc ci_hdrc.0: dma_pool_destroy ci_hw_td, b0001000 busy"
It indicates the buffer at dma pool are still in use.
This commit will free the pending TD at driver's removal procedure,
it can fix the problem described above.
Acked-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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fix SabreAuto random system hang issue, easy catch
this hang by monkey test on 1080p display, monkey
test command "while true;do monkey -v 100000;done".
Signed-off-by: Richard Liu <r66033@freescale.com>
Acked-by: Shawn Guo
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The random hang is still found in one SabreSD RevB board
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Shawn Guo
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The baseAddress of contiguousVidMem is the actual physical address
which is not subtracted by gpu baseAddress, but the allocated physical address
has been subtracted by gpu baseAddress in gckVIDMEM_Lock,
so the invalid offset is produced and used to calculate the logical address.
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Shawn Guo
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this issue cause system boot with multi-user switch on JB4.3,
root cause is gpu memory cannot be multi-locked in same process,
gpu memory lock reference is added to allow multi-lock in kernel driver.
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Jason Liu
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gpu virtual memory cannot be allocated for external use
this issue occurs in ARD board with 2G above memory address
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Jason Liu
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The following commit introduced a wrong sanity check for
the io_regulator which is intended to be got from device tree.
a364635a535705a8c16df49ff9bc7b9362b083ec
This patch corrects the sanity check.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Copied file from 3.5.7 Kernel
commit de6459732a23402cbe520812bf4202299330fd68
Author: Oliver Brown <oliver.brown@freescale.com>
Date: Mon Jun 24 16:41:17 2013 -0500
Added missing call to clk_disable_unprepare() in adv7180_probe.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Copied file from 3.5.7 Kernel:
commit 0682e12bf9a3b5085fe5dd70574fe856340894d0
Author: Liu Ying <Ying.Liu@freescale.com>
Date: Thu May 16 12:02:14 2013 +0800
-Added function and file name to some error messages that are
in multiple places.
-Added calls to clk_prepare_enable() and clk_disable_unprepare()
in ov5640_probe() to manage the sensor clock.
-Added missing sanity check for "io_regulator"
-Fixed several whitespace errors
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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By later initialization for camera dev (to call int_dev_init), the driver
works well whether the master (csi_v4l2_capture) or the slave (ov5640)
has been attached first. In this way, the driver can stick to the philosophy
for the V4L2_INT_DEVICE framework (the attach sequence shouldn't matter).
The following way to insert modules should work:
$ insmod fsl_csi.ko
$ insmod ov5640_camera.ko
$ insmod csi_v4l2_capture.ko
or,
$ insmod fsl_csi.ko
$ insmod csi_v4l2_capture.ko
$ insmod ov5640_camera.ko
Signed-off-by: Robby Cai <R63905@freescale.com>
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When the camera driver is built as module and done 'insmod' command,
the camera will not be detected. The error message is as follows.
$ insmod ov5640_camera.ko
ov5640 2-003c: cannot get io voltage
ov5640_read_reg:write reg error:reg=300a
camera ov5640 is not found
The reason is the mclk need to be enabled before read camera registers.
This patch fixes it.
To balance the usecount for the mclk, we need disable the mclk afterwards.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Copied file from 3.5.7 Kernel:
commit 0682e12bf9a3b5085fe5dd70574fe856340894d0
Author: Liu Ying <Ying.Liu@freescale.com>
Date: Thu May 16 12:02:14 2013 +0800
-Added calls to clk_prepare_enable() and clk_disable_unprepare()
in ov5642_probe() to manage the sensor clock.
-Fixed whitespace errors
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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fix error for 'make modules':
ENROR: "csi_dmareq_rff_enable"
[drivers/media/platform/mxc/capture/csi_v4l2_capture.ko] undefined!
ERROR: "csi_dmareq_rff_disable"
[drivers/media/platform/mxc/capture/csi_v4l2_capture.ko] undefined!
ERROR: "csi_regbase"
[drivers/media/platform/mxc/capture/csi_v4l2_capture.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
Signed-off-by: Robby Cai <R63905@freescale.com>
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Copied files from
commit 0339bfd7164324c5c0208cf6467ef244f714c43a
Author: Liu Ying <Ying.Liu@freescale.com>
Date: Wed Sep 4 13:21:21 2013 +0800
-Added function and file names to error messages that are similar
-Changed mxc_v4l_open to use clk_prepare_enable()
-Changed mxc_v4l_open to use clk_disable_unprepare()
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Copied mipi_csi.h from:
commit 50ca92f4010a93be265de7aad501b4dcae095a63
Author: Sheng Nan <b38800@freescale.com>
Date: Thu Mar 7 13:39:54 2013 +0800
ARM: include: remove definition of mipi-csi2 platform data
Other files copied files from:
commit 1fb93870965b7d8d67b4db6233a30c06d82f84fc
Author: Liu Ying <Ying.Liu@freescale.com>
Date: Thu Mar 21 12:15:52 2013 +0800
MIPI-CSI2:Fix a build warning
- Changed includes files for 3.10
- Dropped deprecated __devexit
- Added generic error message if probe fails
- Added configuration and set default to 'n'
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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This patch add the crypto/caam driver support
Signed-off-by: Kudrick Jeffery <B37172@freescale.com>
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We observed on some sd3.0 cards(Toshiba SDHC U1) that it may require
to reset host controller before sending the next tuning command
or the tuning may fail and cause the card can not work on uhs mode.
The root cause why the card fails on tuning without reset is still unknow.
This could be treated as a workaround before finding root cause.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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This enables access the actual_clock via sys.
root@imx6qsabreauto:~# cat /sys/kernel/debug/mmc0/ios
clock: 198000000 Hz
actual clock: 198000000 Hz
vdd: 17 (2.9 ~ 3.0 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 6 (sd uhs SDR104)
signal voltage: 0 (1.80 V)
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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According to spec, the pre_div for imx6q should be 1, or the biggest clock
rate we can get is a half of host clock rate.
This may cause we can not get the proper clock rate as we want.
e.g. if the desired clock is 200Mhz, however, the host clock is 200Mhz too,
then it causes the actual clock we get is 100Mhz due to pre_div is 2.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.
This patch add pinctrl state switch code according to different
uhs mode include 100mhz sate, 200mhz sate and normal state
(50Mhz and below).
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from
the standard tuning process defined in host controller spec v3.0.
Thus we use platform_execute_tuning instead of standard sdhci tuning.
The main difference are:
1) not only generate Buffer Read Ready interrupt when tuning is performing.
It generates all other DATA interrupts like the normal data command.
2) SDHCI_CTRL_EXEC_TUNING is not automatically cleared by HW,
instead it's controlled by SW.
3) SDHCI_CTRL_TUNED_CLK is not automatically set by HW,
it's controlled by SW.
4) the clock delay for every tuning is set by SW.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The signal voltage switch follow requires to shutdown and output
clock in a specific sequence according to standard host controller
v3.0 spec. In that timing, the card must really receive clock or not.
However, for i.MX6Q, the uSDHC will not output clock even the clock
is enabled until there is command or data in transfer on the bus,
which will then cause singal voltage switch always to fail.
For i.MX6Q, we clear ESDHC_VENDOR_SPEC_FRC_SDCLK_ON bit to let
controller to gate off clock automatically and set that bit
to force clock output if clock is on.
This is required by SD3.0 support.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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We need a lot of imx6 specific things into common esdhc_set_clock
for support SD3.0 and eMMC DDR mode which is not needed for power pc
platforms, so esdhc_set_clock seems not so common anymore.
Instead of keeping add platform specfics things into this common API,
we choose to move that code into platform driver itself to handle.
This can also exclude the dependency between imx and power pc on this
headfile and is easy for maintain in the future.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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It helps for platform code to use it send tuning commands.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The tuning of some platforms may not follow the standard host control
spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL.
Add a hook here to allow execute platform specific tuning instead of
standard host controller tuning.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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from commit 9293d3aaef4886eae9a500f0dabdcd2b679422b4
and commit cb1d78fc935fa00be03ae1a7b66477ad518a09dc, branch imx_3.5.7
This patch also does
- use module_i2c_driver() instead of module_init/exit.
- set the regulator reference pointer to NULL if it's not found in DT.
Otherwise call regulator_enable/disable() on it will cause dump
since the codes only check the regulator against NULL before the call
and it's not NULL but still invalid.
- drop gpo regulator definition and operations since it's of no use
Signed-off-by: Robby Cai <R63905@freescale.com>
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- change the includes
<asm/uaccess.h> to <linux/uaccess.h>
<mach/ipu-v3.h> to <linux/ipu-v3.h>
<mach/dma.h> to <linux/platform_data/dma-imx.h>
- add an extra parameter for device_prep_slave_sg() as the prototype's changed.
- drop csi_mclk_recalc() func since there's no divider in CSI module
- drop deprecated __devinit, __devexit and __devexit_p
- use module_platform_driver()
- use of_match_table()
- replace ioremap() with devm_ioremap()
- replace clk_get() with devm_clk_get()
- replace clk_enable/disable() with clk_prepare_enable/clk_disable_unprepare()
- add check for no camera attached on board
- drop function csi_mclk_enable(), csi_mclk_enable() in fsl_csi.c,
and move clock enable/disable to csi_v4l2_capture.c
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add chip ID check in probe function. The mma8450 is
on the E-INK daughter board. When the daughter board
is not pluged, there would be polling error log
continuously. Add the check to avoid this.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
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The auto cmd23 can not work well on imx6q with an eMMC cards.
The error message is:
mmc0: Timeout waiting for hardware interrupt
The root cause is still unkown.
This is a workaround and the quirk will be removed once we
find the root cause and fix the issue later.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The auto cmd23 function on some platforms may not work well,
add a quirk to allow them to work without auto cmd23.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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delay is required after REF_CLK_EN of GPR1 is set.
otherwise, system would be hang when access the registers
of PCIe RC when the EARLY_PRINTK is not enabled.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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- Add sii902x hdmi chip driver.
- Sii902x initialized as I2C device.
- Support resolution change by application or FB command line.
- Max support resolution 1080p60.
- Support read EDID from hdmi sink.
- Support hdmi cable hotplug.
- Support default video mode read from dts.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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- Original frame buffer size is fixed in SZ_2M when driver probing,
that can not support more resolution, such as 720p and 1080p.
Add function mxsfb_map_videomem/mxsfb_unmap_videomem to replace
fixed frame buffer size. Frame buffer size can change with resolution
change and application requirement.
- Add fb_mmap function implement.
- Remove member variable sync from struct mxsfb_info, align the sync
definition with mxc_cea_mode[] in mxc_edid.c.
- Set recovery from underflow bit.
- Fix xres_virtual yres_virtual check issue in function mxsfb_check_var().
Signed-off-by: Sandor Yu <R01008@freescale.com>
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If not, the PHY will be active even the controller is not in use.
We find this issue due to the PHY's clock refcount is not correct
due to -EPROBE_DEFER return after phy's init.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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With the auto setting, the PHY's clock and power can be
recovered correctly from low power mode, it is ganranteed by IC logic.
Besides, we enable the IC fixes for this PHY at mx6 platform.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add suspend/resume API for system suspend/resume procedure.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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It is used to let the PHY enters low power mode at
controller suspend routine.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Like vbus, the dr_mode and phy_mode are also got from glue layer's
platform data or device node.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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It needs to free ci->hw_bank.regmap explicitly since it is not managed
resource.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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When we rmmod gadget, the ci->driver needs to be cleared.
Otherwise, when we plug in usb cable again, the driver will
consider gadget is there, and go to enumeration procedure,
but in fact, it was removed.
ci_hdrc ci_hdrc.0: Connected to host
Unable to handle kernel paging request at virtual address 7f02a42c
pgd = 80004000
[7f02a42c] *pgd=3f13d811, *pte=00000000, *ppte=00000000
Internal error: Oops: 7 [#1] SMP ARM
Modules linked in: usb_f_acm u_serial libcomposite configfs [last unloaded: g_serial]
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0+ #42
task: 807dba88 ti: 807d0000 task.ti: 807d0000
PC is at udc_irq+0x8fc/0xea4
LR is at l2x0_cache_sync+0x5c/0x6c
pc : [<803de7f4>] lr : [<8001d0f0>] psr: 20000193
sp : 807d1d98 ip : 807d1d80 fp : 807d1df4
r10: af809900 r9 : 808184d4 r8 : 00080001
r7 : 00082001 r6 : afb711f8 r5 : afb71010 r4 : ffffffea
r3 : 7f02a41c r2 : afb71010 r1 : 807d1dc0 r0 : afb71068
Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 3f01804a DAC: 00000017
Process swapper/0 (pid: 0, stack limit = 0x807d0238)
Stack: (0x807d1d98 to 0x807d2000)
1d80: 00000000 afb71014
1da0: 000040f6 00000000 00000001 00000000 00007530 00000000 afb71010 001dcd65
1dc0: 01000680 00400000 807d1e2c afb71010 0000004e 00000000 00000000 0000004b
1de0: 808184d4 af809900 807d1e0c 807d1df8 803dbc24 803ddf04 afba75c0 0000004e
1e00: 807d1e44 807d1e10 8007a19c 803dbb9c 8108e7e0 8108e7e0 9ceddce0 af809900
1e20: 0000004e 807d0000 0000004b 00000000 00000010 00000000 807d1e5c 807d1e48
1e40: 8007a334 8007a154 af809900 0000004e 807d1e74 807d1e60 8007d3b4 8007a2f0
1e60: 0000004b 807cce3c 807d1e8c 807d1e78 80079b08 8007d300 00000180 807d8ba0
1e80: 807d1eb4 807d1e90 8000eef4 80079aec 00000000 f400010c 807d8ce4 807d1ed8
1ea0: f4000100 96d5c75d 807d1ed4 807d1eb8 80008600 8000eeac 8042699c 60000013
1ec0: ffffffff 807d1f0c 807d1f54 807d1ed8 8000e180 800085dc 807d1f20 00000046
1ee0: 9cedd275 00000010 8108f080 807de294 00000001 807de248 96d5c75d 00000010
1f00: 00000000 807d1f54 00000000 807d1f20 8005ff54 8042699c 60000013 ffffffff
1f20: 9cedd275 00000010 00000005 8108f080 8108f080 00000001 807de248 8086bd00
1f40: 807d0000 00000001 807d1f7c 807d1f58 80426af0 80426950 807d0000 00000000
1f60: 808184c0 808184c0 807d8954 805b886c 807d1f8c 807d1f80 8000f294 80426a44
1f80: 807d1fac 807d1f90 8005f110 8000f288 807d1fac 807d8908 805b4748 807dc86c
1fa0: 807d1fbc 807d1fb0 805aa58c 8005f068 807d1ff4 807d1fc0 8077c860 805aa530
1fc0: ffffffff ffffffff 8077c330 00000000 00000000 807bef88 00000000 10c53c7d
1fe0: 807d88d0 807bef84 00000000 807d1ff8 10008074 8077c594 00000000 00000000
Backtrace:
[<803ddef8>] (udc_irq+0x0/0xea4) from [<803dbc24>] (ci_irq+0x94/0x14c)
[<803dbb90>] (ci_irq+0x0/0x14c) from [<8007a19c>] (handle_irq_event_percpu+0x54/0x19c)
r5:0000004e r4:afba75c0
[<8007a148>] (handle_irq_event_percpu+0x0/0x19c) from [<8007a334>] (handle_irq_event+0x50/0x70)
[<8007a2e4>] (handle_irq_event+0x0/0x70) from [<8007d3b4>] (handle_fasteoi_irq+0xc0/0x16c)
r5:0000004e r4:af809900
[<8007d2f4>] (handle_fasteoi_irq+0x0/0x16c) from [<80079b08>] (generic_handle_irq+0x28/0x38)
r5:807cce3c r4:0000004b
[<80079ae0>] (generic_handle_irq+0x0/0x38) from [<8000eef4>] (handle_IRQ+0x54/0xb4)
r4:807d8ba0 r3:00000180
[<8000eea0>] (handle_IRQ+0x0/0xb4) from [<80008600>] (gic_handle_irq+0x30/0x64)
r8:96d5c75d r7:f4000100 r6:807d1ed8 r5:807d8ce4 r4:f400010c
r3:00000000
[<800085d0>] (gic_handle_irq+0x0/0x64) from [<8000e180>] (__irq_svc+0x40/0x54)
Exception stack(0x807d1ed8 to 0x807d1f20)
1ec0: 807d1f20 00000046
1ee0: 9cedd275 00000010 8108f080 807de294 00000001 807de248 96d5c75d 00000010
1f00: 00000000 807d1f54 00000000 807d1f20 8005ff54 8042699c 60000013 ffffffff
r7:807d1f0c r6:ffffffff r5:60000013 r4:8042699c
[<80426944>] (cpuidle_enter_state+0x0/0xf4) from [<80426af0>] (cpuidle_idle_call+0xb8/0x174)
r9:00000001 r8:807d0000 r7:8086bd00 r6:807de248 r5:00000001
r4:8108f080
[<80426a38>] (cpuidle_idle_call+0x0/0x174) from [<8000f294>] (arch_cpu_idle+0x18/0x5c)
[<8000f27c>] (arch_cpu_idle+0x0/0x5c) from [<8005f110>] (cpu_startup_entry+0xb4/0x148)
[<8005f05c>] (cpu_startup_entry+0x0/0x148) from [<805aa58c>] (rest_init+0x68/0x80)
r7:807dc86c
[<805aa524>] (rest_init+0x0/0x80) from [<8077c860>] (start_kernel+0x2d8/0x334)
[<8077c588>] (start_kernel+0x0/0x334) from [<10008074>] (0x10008074)
Code: e59031e0 e51b203c e24b1034 e2820058 (e5933010)
---[ end trace f874b2c5533c04bc ]---
Kernel panic - not syncing: Fatal exception in interrupt
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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The udc-core will call gadget's driver->disconnect, so we should avoid
calling gadget's disconnect again at ci_udc_stop in case the gadget's
unbind free some structs which is still used at gadget's disconnect.
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Now, chipidea host has already depended on USB_EHCI_HCD
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Enable the function by SNVS which located in snvs-rtc driver
Signed-off-by: Robin Gong <b38343@freescale.com>
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To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
Signed-off-by: Anson Huang <b20788@freescale.com>
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To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Enable OT limitation for gc880, without this limitation
3D core may stall system bus when it is running at a very low clock.
Signed-off-by: Loren HUANG <b02279@freescale.com>
Acked-by: Shawn Guo
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